pub fn enable_sp_monitor(&mut self, lower_bound: u32, upper_bound: u32) {
        self.regs()
            .core_0_sp_min()
            .write(|w| unsafe { w.core_0_sp_min().bits(lower_bound) });

        self.regs()
            .core_0_sp_max()
            .write(|w| unsafe { w.core_0_sp_max().bits(upper_bound) });

        self.regs().core_0_montr_ena().modify(|_, w| {
            w.core_0_sp_spill_min_ena()
                .set_bit()
                .core_0_sp_spill_max_ena()
                .set_bit()
        });

        self.clear_sp_monitor_interrupt();

        self.regs().core_0_intr_ena().modify(|_, w| {
            w.core_0_sp_spill_max_intr_ena()
                .set_bit()
                .core_0_sp_spill_min_intr_ena()
                .set_bit()
        });
    }
Enable SP monitoring on main core. When the SP exceeds the
`lower_bound` or `upper_bound` threshold, the module will record the PC
pointer and generate an interrupt.
esp-hal/src/assist_debug.rs