pub fn clear_region0_monitor_interrupt(&mut self) {
        self.regs().core_0_intr_clr().write(|w| {
            w.core_0_area_dram0_0_rd_clr()
                .set_bit()
                .core_0_area_dram0_0_wr_clr()
                .set_bit()
        });
    }
Clear region0 monitoring interrupt on main core.
esp-hal/src/assist_debug.rs