pub fn clear_sp_monitor_interrupt(&mut self) {
        self.regs().core_0_intr_clr().write(|w| {
            w.core_0_sp_spill_max_clr()
                .set_bit()
                .core_0_sp_spill_min_clr()
                .set_bit()
        });
    }
Clear SP monitoring interrupt on main core.
esp-hal/src/assist_debug.rs