pub const fn new_bypass() -> DeadTimeCfg {
        DeadTimeCfg {
            cfg_reg: Self::S0 | Self::S1,
        }
    }
Uses the following configuration:
* Clock: PWM_clk
* Bypass: A & B
* Inputs: A->A, B->B (InSel)
* Outputs: A->A, B->B (OutSwap)
* No Dual-edge B
* No Invert
* FED/RED update mode = immediate
esp-hal/src/mcpwm/operator.rs