pub fn enable_region0_monitor(
        &mut self,
        lower_bound: u32,
        upper_bound: u32,
        reads: bool,
        writes: bool,
    ) {
        self.regs()
            .core_0_area_dram0_0_min()
            .write(|w| unsafe { w.core_0_area_dram0_0_min().bits(lower_bound) });

        self.regs()
            .core_0_area_dram0_0_max()
            .write(|w| unsafe { w.core_0_area_dram0_0_max().bits(upper_bound) });

        self.regs().core_0_montr_ena().modify(|_, w| {
            w.core_0_area_dram0_0_rd_ena()
                .bit(reads)
                .core_0_area_dram0_0_wr_ena()
                .bit(writes)
        });

        self.clear_region0_monitor_interrupt();

        self.regs().core_0_intr_ena().modify(|_, w| {
            w.core_0_area_dram0_0_rd_intr_ena()
                .set_bit()
                .core_0_area_dram0_0_wr_intr_ena()
                .set_bit()
        });
    }
Enable region monitoring of read/write performed by the main CPU in a
certain memory region0. Whenever the bus reads or writes in the
specified memory region, an interrupt will be triggered. Two memory
regions (region0, region1) can be monitored at the same time.
esp-hal/src/assist_debug.rs