fn calibrate(cal_clk: RtcCalSel, slowclk_cycles: u32) -> u32 {
        let xtal_freq = RtcClock::xtal_freq();

        let mut slowclk_cycles = slowclk_cycles;

        // The Fosc CLK of calibration circuit is divided by 32 for ECO1.
        // So we need to divide the calibrate cycles of the FOSC for ECO1 and above
        // chips by 32 to avoid excessive calibration time.
        if Efuse::chip_revision() > 0 && cal_clk == RtcCalSel::RtcCalRcFast {
            slowclk_cycles >>= 5;
        }

        let xtal_cycles = RtcClock::calibrate_internal(cal_clk, slowclk_cycles) as u64;
        let divider = xtal_freq.mhz() as u64 * slowclk_cycles as u64;
        let period_64 = ((xtal_cycles << RtcClock::CAL_FRACT) + divider / 2u64 - 1u64) / divider;

        (period_64 & u32::MAX as u64) as u32
    }
Measure RTC slow clock's period, based on main XTAL frequency

This function will time out and return 0 if the time for the given
number of cycles to be counted exceeds the expected time twice. This
may happen if 32k XTAL is being calibrated, but the oscillator has
not started up (due to incorrect loading capacitance, board design
issue, or lack of 32 XTAL on board).
esp-hal/src/rtc_cntl/rtc/esp32c6.rs