static void ppc_hash64_set_isi(CPUState *cs, CPUPPCState *env,

                               uint64_t error_code)

{

    bool vpm;



    if (msr_ir) {

        vpm = !!(env->spr[SPR_LPCR] & LPCR_VPM1);

    } else {

        vpm = !!(env->spr[SPR_LPCR] & LPCR_VPM0);

    }

    if (vpm && !msr_hv) {

        cs->exception_index = POWERPC_EXCP_HISI;

    } else {

        cs->exception_index = POWERPC_EXCP_ISI;

    }

    env->error_code = error_code;

}

static void ppc_hash64_set_isi(CPUState *cs, CPUPPCState *env,

                               uint64_t error_code)

{

    bool vpm;



    if (msr_ir) {

        vpm = !!(env->spr[SPR_LPCR] & LPCR_VPM1);

    } else {

        vpm = !!(env->spr[SPR_LPCR] & LPCR_VPM0);

    }

    if (vpm && !msr_hv) {

        cs->exception_index = POWERPC_EXCP_HISI;

    } else {

        cs->exception_index = POWERPC_EXCP_ISI;

    }

    env->error_code = error_code;

}

static void FUNC_0(CPUState *VAR_0, CPUPPCState *VAR_1,

                               uint64_t VAR_2)

{

    bool vpm;



    if (msr_ir) {

        vpm = !!(VAR_1->spr[SPR_LPCR] & LPCR_VPM1);

    } else {

        vpm = !!(VAR_1->spr[SPR_LPCR] & LPCR_VPM0);

    }

    if (vpm && !msr_hv) {

        VAR_0->exception_index = POWERPC_EXCP_HISI;

    } else {

        VAR_0->exception_index = POWERPC_EXCP_ISI;

    }

    VAR_1->VAR_2 = VAR_2;

}

static void FUNC_0(CPUState *VAR_0, CPUPPCState *VAR_1,
uint64_t VAR_2)
{ bool vpm; if (msr_ir) { vpm = !!(VAR_1->spr[SPR_LPCR] & LPCR_VPM1); } else { vpm = !!(VAR_1->spr[SPR_LPCR] & LPCR_VPM0); } if (vpm && !msr_hv) { VAR_0->exception_index = POWERPC_EXCP_HISI; } else { VAR_0->exception_index = POWERPC_EXCP_ISI; } VAR_1->VAR_2 = VAR_2; }