static void xhci_runtime_write(void *ptr, hwaddr reg,

                               uint64_t val, unsigned size)

{

    XHCIState *xhci = ptr;

    int v = (reg - 0x20) / 0x20;

    XHCIInterrupter *intr = &xhci->intr[v];

    trace_usb_xhci_runtime_write(reg, val);



    if (reg < 0x20) {

        trace_usb_xhci_unimplemented("runtime write", reg);

        return;




    switch (reg & 0x1f) {

    case 0x00: /* IMAN */

        if (val & IMAN_IP) {

            intr->iman &= ~IMAN_IP;


        intr->iman &= ~IMAN_IE;

        intr->iman |= val & IMAN_IE;

        if (v == 0) {

            xhci_intx_update(xhci);


        xhci_msix_update(xhci, v);

        break;

    case 0x04: /* IMOD */

        intr->imod = val;

        break;

    case 0x08: /* ERSTSZ */

        intr->erstsz = val & 0xffff;

        break;

    case 0x10: /* ERSTBA low */

        /* XXX NEC driver bug: it doesn't align this to 64 bytes

        intr->erstba_low = val & 0xffffffc0; */

        intr->erstba_low = val & 0xfffffff0;

        break;

    case 0x14: /* ERSTBA high */

        intr->erstba_high = val;

        xhci_er_reset(xhci, v);

        break;

    case 0x18: /* ERDP low */


            intr->erdp_low &= ~ERDP_EHB;


        intr->erdp_low = (val & ~ERDP_EHB) | (intr->erdp_low & ERDP_EHB);










        break;

    case 0x1c: /* ERDP high */

        intr->erdp_high = val;

        xhci_events_update(xhci, v);

        break;

    default:

        trace_usb_xhci_unimplemented("oper write", reg);


static void xhci_runtime_write(void *ptr, hwaddr reg,

                               uint64_t val, unsigned size)

{

    XHCIState *xhci = ptr;

    int v = (reg - 0x20) / 0x20;

    XHCIInterrupter *intr = &xhci->intr[v];

    trace_usb_xhci_runtime_write(reg, val);



    if (reg < 0x20) {

        trace_usb_xhci_unimplemented("runtime write", reg);

        return;




    switch (reg & 0x1f) {

    case 0x00: 

        if (val & IMAN_IP) {

            intr->iman &= ~IMAN_IP;


        intr->iman &= ~IMAN_IE;

        intr->iman |= val & IMAN_IE;

        if (v == 0) {

            xhci_intx_update(xhci);


        xhci_msix_update(xhci, v);

        break;

    case 0x04: 

        intr->imod = val;

        break;

    case 0x08: 

        intr->erstsz = val & 0xffff;

        break;

    case 0x10: 

        



        intr->erstba_low = val & 0xfffffff0;

        break;

    case 0x14: 

        intr->erstba_high = val;

        xhci_er_reset(xhci, v);

        break;

    case 0x18: 


            intr->erdp_low &= ~ERDP_EHB;


        intr->erdp_low = (val & ~ERDP_EHB) | (intr->erdp_low & ERDP_EHB);










        break;

    case 0x1c: 

        intr->erdp_high = val;

        xhci_events_update(xhci, v);

        break;

    default:

        trace_usb_xhci_unimplemented("oper write", reg);


static void FUNC_0(void *VAR_0, hwaddr VAR_1,

                               uint64_t VAR_2, unsigned VAR_3)

{

    XHCIState *xhci = VAR_0;

    int VAR_4 = (VAR_1 - 0x20) / 0x20;

    XHCIInterrupter *intr = &xhci->intr[VAR_4];

    trace_usb_xhci_runtime_write(VAR_1, VAR_2);



    if (VAR_1 < 0x20) {

        trace_usb_xhci_unimplemented("runtime write", VAR_1);

        return;




    switch (VAR_1 & 0x1f) {

    case 0x00: 

        if (VAR_2 & IMAN_IP) {

            intr->iman &= ~IMAN_IP;


        intr->iman &= ~IMAN_IE;

        intr->iman |= VAR_2 & IMAN_IE;

        if (VAR_4 == 0) {

            xhci_intx_update(xhci);


        xhci_msix_update(xhci, VAR_4);

        break;

    case 0x04: 

        intr->imod = VAR_2;

        break;

    case 0x08: 

        intr->erstsz = VAR_2 & 0xffff;

        break;

    case 0x10: 

        



        intr->erstba_low = VAR_2 & 0xfffffff0;

        break;

    case 0x14: 

        intr->erstba_high = VAR_2;

        xhci_er_reset(xhci, VAR_4);

        break;

    case 0x18: 


            intr->erdp_low &= ~ERDP_EHB;


        intr->erdp_low = (VAR_2 & ~ERDP_EHB) | (intr->erdp_low & ERDP_EHB);










        break;

    case 0x1c: 

        intr->erdp_high = VAR_2;

        xhci_events_update(xhci, VAR_4);

        break;

    default:

        trace_usb_xhci_unimplemented("oper write", VAR_1);


static void FUNC_0(void *VAR_0, hwaddr VAR_1,
uint64_t VAR_2, unsigned VAR_3)
{ XHCIState *xhci = VAR_0; int VAR_4 = (VAR_1 - 0x20) / 0x20; XHCIInterrupter *intr = &xhci->intr[VAR_4]; trace_usb_xhci_runtime_write(VAR_1, VAR_2); if (VAR_1 < 0x20) { trace_usb_xhci_unimplemented("runtime write", VAR_1); return; switch (VAR_1 & 0x1f) { case 0x00:
if (VAR_2 & IMAN_IP) { intr->iman &= ~IMAN_IP; intr->iman &= ~IMAN_IE; intr->iman |= VAR_2 & IMAN_IE; if (VAR_4 == 0) { xhci_intx_update(xhci); xhci_msix_update(xhci, VAR_4); break; case 0x04:
intr->imod = VAR_2; break; case 0x08:
intr->erstsz = VAR_2 & 0xffff; break; case 0x10:
intr->erstba_low = VAR_2 & 0xfffffff0; break; case 0x14:
intr->erstba_high = VAR_2; xhci_er_reset(xhci, VAR_4); break; case 0x18:
intr->erdp_low &= ~ERDP_EHB; intr->erdp_low = (VAR_2 & ~ERDP_EHB) | (intr->erdp_low & ERDP_EHB); break; case 0x1c:
intr->erdp_high = VAR_2; xhci_events_update(xhci, VAR_4); break; default:
trace_usb_xhci_unimplemented("oper write", VAR_1);