xilinx_axidma_data_stream_push(StreamSlave *obj, unsigned char *buf, size_t len,

                               uint32_t *app)

{

    XilinxAXIDMAStreamSlave *ds = XILINX_AXI_DMA_DATA_STREAM(obj);

    struct Stream *s = &ds->dma->streams[1];

    size_t ret;



    if (!app) {

        hw_error("No stream app data!\n");

    }

    ret = stream_process_s2mem(s, buf, len, app);

    stream_update_irq(s);

    return ret;

}

xilinx_axidma_data_stream_push(StreamSlave *obj, unsigned char *buf, size_t len,

                               uint32_t *app)

{

    XilinxAXIDMAStreamSlave *ds = XILINX_AXI_DMA_DATA_STREAM(obj);

    struct Stream *s = &ds->dma->streams[1];

    size_t ret;



    if (!app) {

        hw_error("No stream app data!\n");

    }

    ret = stream_process_s2mem(s, buf, len, app);

    stream_update_irq(s);

    return ret;

}

FUNC_0(StreamSlave *VAR_0, unsigned char *VAR_1, size_t VAR_2,

                               uint32_t *VAR_3)

{

    XilinxAXIDMAStreamSlave *ds = XILINX_AXI_DMA_DATA_STREAM(VAR_0);

    struct Stream *VAR_4 = &ds->dma->streams[1];

    size_t ret;



    if (!VAR_3) {

        hw_error("No stream VAR_3 data!\n");

    }

    ret = stream_process_s2mem(VAR_4, VAR_1, VAR_2, VAR_3);

    stream_update_irq(VAR_4);

    return ret;

}

FUNC_0(StreamSlave *VAR_0, unsigned char *VAR_1, size_t VAR_2,
uint32_t *VAR_3)
{ XilinxAXIDMAStreamSlave *ds = XILINX_AXI_DMA_DATA_STREAM(VAR_0); struct Stream *VAR_4 = &ds->dma->streams[1]; size_t ret; if (!VAR_3) { hw_error("No stream VAR_3 data!\n"); } ret = stream_process_s2mem(VAR_4, VAR_1, VAR_2, VAR_3); stream_update_irq(VAR_4); return ret; }