static void dec_div(DisasContext *dc)

{

    unsigned int u;



    u = dc->imm & 2; 

    LOG_DIS("div\n");



    if (!(dc->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)

          && !((dc->env->pvr.regs[0] & PVR0_USE_DIV_MASK))) {

        tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);

        t_gen_raise_exception(dc, EXCP_HW_EXCP);

    }



    if (u)

        gen_helper_divu(cpu_R[dc->rd], *(dec_alu_op_b(dc)), cpu_R[dc->ra]);

    else

        gen_helper_divs(cpu_R[dc->rd], *(dec_alu_op_b(dc)), cpu_R[dc->ra]);

    if (!dc->rd)

        tcg_gen_movi_tl(cpu_R[dc->rd], 0);

}

static void dec_div(DisasContext *dc)

{

    unsigned int u;



    u = dc->imm & 2; 

    LOG_DIS("div\n");



    if (!(dc->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)

          && !((dc->env->pvr.regs[0] & PVR0_USE_DIV_MASK))) {

        tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);

        t_gen_raise_exception(dc, EXCP_HW_EXCP);

    }



    if (u)

        gen_helper_divu(cpu_R[dc->rd], *(dec_alu_op_b(dc)), cpu_R[dc->ra]);

    else

        gen_helper_divs(cpu_R[dc->rd], *(dec_alu_op_b(dc)), cpu_R[dc->ra]);

    if (!dc->rd)

        tcg_gen_movi_tl(cpu_R[dc->rd], 0);

}

static void FUNC_0(DisasContext *VAR_0)

{

    unsigned int VAR_1;



    VAR_1 = VAR_0->imm & 2; 

    LOG_DIS("div\n");



    if (!(VAR_0->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)

          && !((VAR_0->env->pvr.regs[0] & PVR0_USE_DIV_MASK))) {

        tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);

        t_gen_raise_exception(VAR_0, EXCP_HW_EXCP);

    }



    if (VAR_1)

        gen_helper_divu(cpu_R[VAR_0->rd], *(dec_alu_op_b(VAR_0)), cpu_R[VAR_0->ra]);

    else

        gen_helper_divs(cpu_R[VAR_0->rd], *(dec_alu_op_b(VAR_0)), cpu_R[VAR_0->ra]);

    if (!VAR_0->rd)

        tcg_gen_movi_tl(cpu_R[VAR_0->rd], 0);

}

static void FUNC_0(DisasContext *VAR_0)
{ unsigned int VAR_1; VAR_1 = VAR_0->imm & 2; LOG_DIS("div\n"); if (!(VAR_0->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)
&& !((VAR_0->env->pvr.regs[0] & PVR0_USE_DIV_MASK))) { tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); t_gen_raise_exception(VAR_0, EXCP_HW_EXCP); } if (VAR_1)
gen_helper_divu(cpu_R[VAR_0->rd], *(dec_alu_op_b(VAR_0)), cpu_R[VAR_0->ra]); else
gen_helper_divs(cpu_R[VAR_0->rd], *(dec_alu_op_b(VAR_0)), cpu_R[VAR_0->ra]); if (!VAR_0->rd)
tcg_gen_movi_tl(cpu_R[VAR_0->rd], 0); }