static void omap_mpui_write(void *opaque, target_phys_addr_t addr,

                            uint64_t value, unsigned size)

{

    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;



    if (size != 4) {

        return omap_badwidth_write32(opaque, addr, value);

    }



    switch (addr) {

    case 0x00:	/* CTRL */

        s->mpui_ctrl = value & 0x007fffff;

        break;



    case 0x04:	/* DEBUG_ADDR */

    case 0x08:	/* DEBUG_DATA */

    case 0x0c:	/* DEBUG_FLAG */

    case 0x10:	/* STATUS */

    /* Not in OMAP310 */

    case 0x14:	/* DSP_STATUS */

        OMAP_RO_REG(addr);

    case 0x18:	/* DSP_BOOT_CONFIG */

    case 0x1c:	/* DSP_MPUI_CONFIG */

        break;



    default:

        OMAP_BAD_REG(addr);

    }

}

static void omap_mpui_write(void *opaque, target_phys_addr_t addr,

                            uint64_t value, unsigned size)

{

    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;



    if (size != 4) {

        return omap_badwidth_write32(opaque, addr, value);

    }



    switch (addr) {

    case 0x00:	

        s->mpui_ctrl = value & 0x007fffff;

        break;



    case 0x04:	

    case 0x08:	

    case 0x0c:	

    case 0x10:	

    

    case 0x14:	

        OMAP_RO_REG(addr);

    case 0x18:	

    case 0x1c:	

        break;



    default:

        OMAP_BAD_REG(addr);

    }

}

static void FUNC_0(void *VAR_0, target_phys_addr_t VAR_1,

                            uint64_t VAR_2, unsigned VAR_3)

{

    struct omap_mpu_state_s *VAR_4 = (struct omap_mpu_state_s *) VAR_0;



    if (VAR_3 != 4) {

        return omap_badwidth_write32(VAR_0, VAR_1, VAR_2);

    }



    switch (VAR_1) {

    case 0x00:	

        VAR_4->mpui_ctrl = VAR_2 & 0x007fffff;

        break;



    case 0x04:	

    case 0x08:	

    case 0x0c:	

    case 0x10:	

    

    case 0x14:	

        OMAP_RO_REG(VAR_1);

    case 0x18:	

    case 0x1c:	

        break;



    default:

        OMAP_BAD_REG(VAR_1);

    }

}

static void FUNC_0(void *VAR_0, target_phys_addr_t VAR_1,
uint64_t VAR_2, unsigned VAR_3)
{ struct omap_mpu_state_s *VAR_4 = (struct omap_mpu_state_s *) VAR_0; if (VAR_3 != 4) { return omap_badwidth_write32(VAR_0, VAR_1, VAR_2); } switch (VAR_1) { case 0x00:
VAR_4->mpui_ctrl = VAR_2 & 0x007fffff; break; case 0x04:
case 0x08:
case 0x0c:
case 0x10:
case 0x14:
OMAP_RO_REG(VAR_1); case 0x18:
case 0x1c:
break; default:
OMAP_BAD_REG(VAR_1); } }