static struct omap_lpg_s *omap_lpg_init(target_phys_addr_t base, omap_clk clk)

{

    int iomemtype;

    struct omap_lpg_s *s = (struct omap_lpg_s *)

            qemu_mallocz(sizeof(struct omap_lpg_s));



    s->tm = qemu_new_timer(rt_clock, omap_lpg_tick, s);



    omap_lpg_reset(s);



    iomemtype = cpu_register_io_memory(omap_lpg_readfn,

                    omap_lpg_writefn, s, DEVICE_NATIVE_ENDIAN);

    cpu_register_physical_memory(base, 0x800, iomemtype);



    omap_clk_adduser(clk, qemu_allocate_irqs(omap_lpg_clk_update, s, 1)[0]);



    return s;

}

static struct omap_lpg_s *omap_lpg_init(target_phys_addr_t base, omap_clk clk)

{

    int iomemtype;

    struct omap_lpg_s *s = (struct omap_lpg_s *)

            qemu_mallocz(sizeof(struct omap_lpg_s));



    s->tm = qemu_new_timer(rt_clock, omap_lpg_tick, s);



    omap_lpg_reset(s);



    iomemtype = cpu_register_io_memory(omap_lpg_readfn,

                    omap_lpg_writefn, s, DEVICE_NATIVE_ENDIAN);

    cpu_register_physical_memory(base, 0x800, iomemtype);



    omap_clk_adduser(clk, qemu_allocate_irqs(omap_lpg_clk_update, s, 1)[0]);



    return s;

}

static struct omap_lpg_s *FUNC_0(target_phys_addr_t VAR_0, omap_clk VAR_1)

{

    int VAR_2;

    struct omap_lpg_s *VAR_3 = (struct omap_lpg_s *)

            qemu_mallocz(sizeof(struct omap_lpg_s));



    VAR_3->tm = qemu_new_timer(rt_clock, omap_lpg_tick, VAR_3);



    omap_lpg_reset(VAR_3);



    VAR_2 = cpu_register_io_memory(omap_lpg_readfn,

                    omap_lpg_writefn, VAR_3, DEVICE_NATIVE_ENDIAN);

    cpu_register_physical_memory(VAR_0, 0x800, VAR_2);



    omap_clk_adduser(VAR_1, qemu_allocate_irqs(omap_lpg_clk_update, VAR_3, 1)[0]);



    return VAR_3;

}

static struct omap_lpg_s *FUNC_0(target_phys_addr_t VAR_0, omap_clk VAR_1)
{ int VAR_2; struct omap_lpg_s *VAR_3 = (struct omap_lpg_s *)
qemu_mallocz(sizeof(struct omap_lpg_s)); VAR_3->tm = qemu_new_timer(rt_clock, omap_lpg_tick, VAR_3); omap_lpg_reset(VAR_3); VAR_2 = cpu_register_io_memory(omap_lpg_readfn,
omap_lpg_writefn, VAR_3, DEVICE_NATIVE_ENDIAN); cpu_register_physical_memory(VAR_0, 0x800, VAR_2); omap_clk_adduser(VAR_1, qemu_allocate_irqs(omap_lpg_clk_update, VAR_3, 1)[0]); return VAR_3; }