static void disas_ldst_pair(DisasContext *s, uint32_t insn)

{

    int rt = extract32(insn, 0, 5);

    int rn = extract32(insn, 5, 5);

    int rt2 = extract32(insn, 10, 5);

    int64_t offset = sextract32(insn, 15, 7);

    int index = extract32(insn, 23, 2);

    bool is_vector = extract32(insn, 26, 1);

    bool is_load = extract32(insn, 22, 1);

    int opc = extract32(insn, 30, 2);



    bool is_signed = false;

    bool postindex = false;

    bool wback = false;



    TCGv_i64 tcg_addr; /* calculated address */

    int size;



    if (opc == 3) {

        unallocated_encoding(s);

        return;

    }



    if (is_vector) {

        size = 2 + opc;

    } else {

        size = 2 + extract32(opc, 1, 1);

        is_signed = extract32(opc, 0, 1);

        if (!is_load && is_signed) {

            unallocated_encoding(s);

            return;

        }

    }



    switch (index) {

    case 1: /* post-index */

        postindex = true;

        wback = true;

        break;

    case 0:

        /* signed offset with "non-temporal" hint. Since we don't emulate

         * caches we don't care about hints to the cache system about

         * data access patterns, and handle this identically to plain

         * signed offset.

         */

        if (is_signed) {

            /* There is no non-temporal-hint version of LDPSW */

            unallocated_encoding(s);

            return;

        }

        postindex = false;

        break;

    case 2: /* signed offset, rn not updated */

        postindex = false;

        break;

    case 3: /* pre-index */

        postindex = false;

        wback = true;

        break;

    }



    if (is_vector && !fp_access_check(s)) {

        return;

    }



    offset <<= size;



    if (rn == 31) {

        gen_check_sp_alignment(s);

    }



    tcg_addr = read_cpu_reg_sp(s, rn, 1);



    if (!postindex) {

        tcg_gen_addi_i64(tcg_addr, tcg_addr, offset);

    }



    if (is_vector) {

        if (is_load) {

            do_fp_ld(s, rt, tcg_addr, size);

        } else {

            do_fp_st(s, rt, tcg_addr, size);

        }

    } else {

        TCGv_i64 tcg_rt = cpu_reg(s, rt);

        if (is_load) {

            do_gpr_ld(s, tcg_rt, tcg_addr, size, is_signed, false);

        } else {

            do_gpr_st(s, tcg_rt, tcg_addr, size);

        }

    }

    tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);

    if (is_vector) {

        if (is_load) {

            do_fp_ld(s, rt2, tcg_addr, size);

        } else {

            do_fp_st(s, rt2, tcg_addr, size);

        }

    } else {

        TCGv_i64 tcg_rt2 = cpu_reg(s, rt2);

        if (is_load) {

            do_gpr_ld(s, tcg_rt2, tcg_addr, size, is_signed, false);

        } else {

            do_gpr_st(s, tcg_rt2, tcg_addr, size);

        }

    }



    if (wback) {

        if (postindex) {

            tcg_gen_addi_i64(tcg_addr, tcg_addr, offset - (1 << size));

        } else {

            tcg_gen_subi_i64(tcg_addr, tcg_addr, 1 << size);

        }

        tcg_gen_mov_i64(cpu_reg_sp(s, rn), tcg_addr);

    }

}

static void disas_ldst_pair(DisasContext *s, uint32_t insn)

{

    int rt = extract32(insn, 0, 5);

    int rn = extract32(insn, 5, 5);

    int rt2 = extract32(insn, 10, 5);

    int64_t offset = sextract32(insn, 15, 7);

    int index = extract32(insn, 23, 2);

    bool is_vector = extract32(insn, 26, 1);

    bool is_load = extract32(insn, 22, 1);

    int opc = extract32(insn, 30, 2);



    bool is_signed = false;

    bool postindex = false;

    bool wback = false;



    TCGv_i64 tcg_addr; 

    int size;



    if (opc == 3) {

        unallocated_encoding(s);

        return;

    }



    if (is_vector) {

        size = 2 + opc;

    } else {

        size = 2 + extract32(opc, 1, 1);

        is_signed = extract32(opc, 0, 1);

        if (!is_load && is_signed) {

            unallocated_encoding(s);

            return;

        }

    }



    switch (index) {

    case 1: 

        postindex = true;

        wback = true;

        break;

    case 0:

        









        if (is_signed) {

            

            unallocated_encoding(s);

            return;

        }

        postindex = false;

        break;

    case 2: 

        postindex = false;

        break;

    case 3: 

        postindex = false;

        wback = true;

        break;

    }



    if (is_vector && !fp_access_check(s)) {

        return;

    }



    offset <<= size;



    if (rn == 31) {

        gen_check_sp_alignment(s);

    }



    tcg_addr = read_cpu_reg_sp(s, rn, 1);



    if (!postindex) {

        tcg_gen_addi_i64(tcg_addr, tcg_addr, offset);

    }



    if (is_vector) {

        if (is_load) {

            do_fp_ld(s, rt, tcg_addr, size);

        } else {

            do_fp_st(s, rt, tcg_addr, size);

        }

    } else {

        TCGv_i64 tcg_rt = cpu_reg(s, rt);

        if (is_load) {

            do_gpr_ld(s, tcg_rt, tcg_addr, size, is_signed, false);

        } else {

            do_gpr_st(s, tcg_rt, tcg_addr, size);

        }

    }

    tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);

    if (is_vector) {

        if (is_load) {

            do_fp_ld(s, rt2, tcg_addr, size);

        } else {

            do_fp_st(s, rt2, tcg_addr, size);

        }

    } else {

        TCGv_i64 tcg_rt2 = cpu_reg(s, rt2);

        if (is_load) {

            do_gpr_ld(s, tcg_rt2, tcg_addr, size, is_signed, false);

        } else {

            do_gpr_st(s, tcg_rt2, tcg_addr, size);

        }

    }



    if (wback) {

        if (postindex) {

            tcg_gen_addi_i64(tcg_addr, tcg_addr, offset - (1 << size));

        } else {

            tcg_gen_subi_i64(tcg_addr, tcg_addr, 1 << size);

        }

        tcg_gen_mov_i64(cpu_reg_sp(s, rn), tcg_addr);

    }

}

static void FUNC_0(DisasContext *VAR_0, uint32_t VAR_1)

{

    int VAR_2 = extract32(VAR_1, 0, 5);

    int VAR_3 = extract32(VAR_1, 5, 5);

    int VAR_4 = extract32(VAR_1, 10, 5);

    int64_t offset = sextract32(VAR_1, 15, 7);

    int VAR_5 = extract32(VAR_1, 23, 2);

    bool is_vector = extract32(VAR_1, 26, 1);

    bool is_load = extract32(VAR_1, 22, 1);

    int VAR_6 = extract32(VAR_1, 30, 2);



    bool is_signed = false;

    bool postindex = false;

    bool wback = false;



    TCGv_i64 tcg_addr; 

    int VAR_7;



    if (VAR_6 == 3) {

        unallocated_encoding(VAR_0);

        return;

    }



    if (is_vector) {

        VAR_7 = 2 + VAR_6;

    } else {

        VAR_7 = 2 + extract32(VAR_6, 1, 1);

        is_signed = extract32(VAR_6, 0, 1);

        if (!is_load && is_signed) {

            unallocated_encoding(VAR_0);

            return;

        }

    }



    switch (VAR_5) {

    case 1: 

        postindex = true;

        wback = true;

        break;

    case 0:

        









        if (is_signed) {

            

            unallocated_encoding(VAR_0);

            return;

        }

        postindex = false;

        break;

    case 2: 

        postindex = false;

        break;

    case 3: 

        postindex = false;

        wback = true;

        break;

    }



    if (is_vector && !fp_access_check(VAR_0)) {

        return;

    }



    offset <<= VAR_7;



    if (VAR_3 == 31) {

        gen_check_sp_alignment(VAR_0);

    }



    tcg_addr = read_cpu_reg_sp(VAR_0, VAR_3, 1);



    if (!postindex) {

        tcg_gen_addi_i64(tcg_addr, tcg_addr, offset);

    }



    if (is_vector) {

        if (is_load) {

            do_fp_ld(VAR_0, VAR_2, tcg_addr, VAR_7);

        } else {

            do_fp_st(VAR_0, VAR_2, tcg_addr, VAR_7);

        }

    } else {

        TCGv_i64 tcg_rt = cpu_reg(VAR_0, VAR_2);

        if (is_load) {

            do_gpr_ld(VAR_0, tcg_rt, tcg_addr, VAR_7, is_signed, false);

        } else {

            do_gpr_st(VAR_0, tcg_rt, tcg_addr, VAR_7);

        }

    }

    tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << VAR_7);

    if (is_vector) {

        if (is_load) {

            do_fp_ld(VAR_0, VAR_4, tcg_addr, VAR_7);

        } else {

            do_fp_st(VAR_0, VAR_4, tcg_addr, VAR_7);

        }

    } else {

        TCGv_i64 tcg_rt2 = cpu_reg(VAR_0, VAR_4);

        if (is_load) {

            do_gpr_ld(VAR_0, tcg_rt2, tcg_addr, VAR_7, is_signed, false);

        } else {

            do_gpr_st(VAR_0, tcg_rt2, tcg_addr, VAR_7);

        }

    }



    if (wback) {

        if (postindex) {

            tcg_gen_addi_i64(tcg_addr, tcg_addr, offset - (1 << VAR_7));

        } else {

            tcg_gen_subi_i64(tcg_addr, tcg_addr, 1 << VAR_7);

        }

        tcg_gen_mov_i64(cpu_reg_sp(VAR_0, VAR_3), tcg_addr);

    }

}

static void FUNC_0(DisasContext *VAR_0, uint32_t VAR_1)
{ int VAR_2 = extract32(VAR_1, 0, 5); int VAR_3 = extract32(VAR_1, 5, 5); int VAR_4 = extract32(VAR_1, 10, 5); int64_t offset = sextract32(VAR_1, 15, 7); int VAR_5 = extract32(VAR_1, 23, 2); bool is_vector = extract32(VAR_1, 26, 1); bool is_load = extract32(VAR_1, 22, 1); int VAR_6 = extract32(VAR_1, 30, 2); bool is_signed = false; bool postindex = false; bool wback = false; TCGv_i64 tcg_addr; int VAR_7; if (VAR_6 == 3) { unallocated_encoding(VAR_0); return; } if (is_vector) { VAR_7 = 2 + VAR_6; } else { VAR_7 = 2 + extract32(VAR_6, 1, 1); is_signed = extract32(VAR_6, 0, 1); if (!is_load && is_signed) { unallocated_encoding(VAR_0); return; } } switch (VAR_5) { case 1:
postindex = true; wback = true; break; case 0:
if (is_signed) { unallocated_encoding(VAR_0); return; } postindex = false; break; case 2:
postindex = false; break; case 3:
postindex = false; wback = true; break; } if (is_vector && !fp_access_check(VAR_0)) { return; } offset <<= VAR_7; if (VAR_3 == 31) { gen_check_sp_alignment(VAR_0); } tcg_addr = read_cpu_reg_sp(VAR_0, VAR_3, 1); if (!postindex) { tcg_gen_addi_i64(tcg_addr, tcg_addr, offset); } if (is_vector) { if (is_load) { do_fp_ld(VAR_0, VAR_2, tcg_addr, VAR_7); } else { do_fp_st(VAR_0, VAR_2, tcg_addr, VAR_7); } } else { TCGv_i64 tcg_rt = cpu_reg(VAR_0, VAR_2); if (is_load) { do_gpr_ld(VAR_0, tcg_rt, tcg_addr, VAR_7, is_signed, false); } else { do_gpr_st(VAR_0, tcg_rt, tcg_addr, VAR_7); } } tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << VAR_7); if (is_vector) { if (is_load) { do_fp_ld(VAR_0, VAR_4, tcg_addr, VAR_7); } else { do_fp_st(VAR_0, VAR_4, tcg_addr, VAR_7); } } else { TCGv_i64 tcg_rt2 = cpu_reg(VAR_0, VAR_4); if (is_load) { do_gpr_ld(VAR_0, tcg_rt2, tcg_addr, VAR_7, is_signed, false); } else { do_gpr_st(VAR_0, tcg_rt2, tcg_addr, VAR_7); } } if (wback) { if (postindex) { tcg_gen_addi_i64(tcg_addr, tcg_addr, offset - (1 << VAR_7)); } else { tcg_gen_subi_i64(tcg_addr, tcg_addr, 1 << VAR_7); } tcg_gen_mov_i64(cpu_reg_sp(VAR_0, VAR_3), tcg_addr); } }