static int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb,

                                         unsigned int addr, int option)

{

    sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);

    struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };

    int ret;



    switch (option) {

    case RTAS_EEH_DISABLE:

        op.op = VFIO_EEH_PE_DISABLE;

        break;

    case RTAS_EEH_ENABLE: {

        PCIHostState *phb;

        PCIDevice *pdev;



        /*

         * The EEH functionality is enabled on basis of PCI device,

         * instead of PE. We need check the validity of the PCI

         * device address.

         */

        phb = PCI_HOST_BRIDGE(sphb);

        pdev = pci_find_device(phb->bus,

                               (addr >> 16) & 0xFF, (addr >> 8) & 0xFF);

        if (!pdev) {

            return RTAS_OUT_PARAM_ERROR;

        }



        op.op = VFIO_EEH_PE_ENABLE;

        break;

    }

    case RTAS_EEH_THAW_IO:

        op.op = VFIO_EEH_PE_UNFREEZE_IO;

        break;

    case RTAS_EEH_THAW_DMA:

        op.op = VFIO_EEH_PE_UNFREEZE_DMA;

        break;

    default:

        return RTAS_OUT_PARAM_ERROR;

    }



    ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,

                               VFIO_EEH_PE_OP, &op);

    if (ret < 0) {

        return RTAS_OUT_HW_ERROR;

    }



    return RTAS_OUT_SUCCESS;

}

static int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb,

                                         unsigned int addr, int option)

{

    sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);

    struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };

    int ret;



    switch (option) {

    case RTAS_EEH_DISABLE:

        op.op = VFIO_EEH_PE_DISABLE;

        break;

    case RTAS_EEH_ENABLE: {

        PCIHostState *phb;

        PCIDevice *pdev;



        









        phb = PCI_HOST_BRIDGE(sphb);

        pdev = pci_find_device(phb->bus,

                               (addr >> 16) & 0xFF, (addr >> 8) & 0xFF);

        if (!pdev) {

            return RTAS_OUT_PARAM_ERROR;

        }



        op.op = VFIO_EEH_PE_ENABLE;

        break;

    }

    case RTAS_EEH_THAW_IO:

        op.op = VFIO_EEH_PE_UNFREEZE_IO;

        break;

    case RTAS_EEH_THAW_DMA:

        op.op = VFIO_EEH_PE_UNFREEZE_DMA;

        break;

    default:

        return RTAS_OUT_PARAM_ERROR;

    }



    ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,

                               VFIO_EEH_PE_OP, &op);

    if (ret < 0) {

        return RTAS_OUT_HW_ERROR;

    }



    return RTAS_OUT_SUCCESS;

}

static int FUNC_0(sPAPRPHBState *VAR_0,

                                         unsigned int VAR_1, int VAR_2)

{

    sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(VAR_0);

    struct vfio_eeh_pe_op VAR_3 = { .argsz = sizeof(VAR_3) };

    int VAR_4;



    switch (VAR_2) {

    case RTAS_EEH_DISABLE:

        VAR_3.VAR_3 = VFIO_EEH_PE_DISABLE;

        break;

    case RTAS_EEH_ENABLE: {

        PCIHostState *phb;

        PCIDevice *pdev;



        









        phb = PCI_HOST_BRIDGE(VAR_0);

        pdev = pci_find_device(phb->bus,

                               (VAR_1 >> 16) & 0xFF, (VAR_1 >> 8) & 0xFF);

        if (!pdev) {

            return RTAS_OUT_PARAM_ERROR;

        }



        VAR_3.VAR_3 = VFIO_EEH_PE_ENABLE;

        break;

    }

    case RTAS_EEH_THAW_IO:

        VAR_3.VAR_3 = VFIO_EEH_PE_UNFREEZE_IO;

        break;

    case RTAS_EEH_THAW_DMA:

        VAR_3.VAR_3 = VFIO_EEH_PE_UNFREEZE_DMA;

        break;

    default:

        return RTAS_OUT_PARAM_ERROR;

    }



    VAR_4 = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,

                               VFIO_EEH_PE_OP, &VAR_3);

    if (VAR_4 < 0) {

        return RTAS_OUT_HW_ERROR;

    }



    return RTAS_OUT_SUCCESS;

}

static int FUNC_0(sPAPRPHBState *VAR_0,
unsigned int VAR_1, int VAR_2)
{ sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(VAR_0); struct vfio_eeh_pe_op VAR_3 = { .argsz = sizeof(VAR_3) }; int VAR_4; switch (VAR_2) { case RTAS_EEH_DISABLE:
VAR_3.VAR_3 = VFIO_EEH_PE_DISABLE; break; case RTAS_EEH_ENABLE: { PCIHostState *phb; PCIDevice *pdev; phb = PCI_HOST_BRIDGE(VAR_0); pdev = pci_find_device(phb->bus,
(VAR_1 >> 16) & 0xFF, (VAR_1 >> 8) & 0xFF); if (!pdev) { return RTAS_OUT_PARAM_ERROR; } VAR_3.VAR_3 = VFIO_EEH_PE_ENABLE; break; } case RTAS_EEH_THAW_IO:
VAR_3.VAR_3 = VFIO_EEH_PE_UNFREEZE_IO; break; case RTAS_EEH_THAW_DMA:
VAR_3.VAR_3 = VFIO_EEH_PE_UNFREEZE_DMA; break; default:
return RTAS_OUT_PARAM_ERROR; } VAR_4 = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
VFIO_EEH_PE_OP, &VAR_3); if (VAR_4 < 0) { return RTAS_OUT_HW_ERROR; } return RTAS_OUT_SUCCESS; }