uint64_t helper_st_virt_to_phys (uint64_t virtaddr)

{

    uint64_t tlb_addr, physaddr;

    int index, mmu_idx;

    void *retaddr;



    mmu_idx = cpu_mmu_index(env);

    index = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

 redo:

    tlb_addr = env->tlb_table[mmu_idx][index].addr_write;

    if ((virtaddr & TARGET_PAGE_MASK) ==

        (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {

        physaddr = virtaddr + env->tlb_table[mmu_idx][index].addend;

    } else {

        /* the page is not in the TLB : fill it */

        retaddr = GETPC();

        tlb_fill(virtaddr, 1, mmu_idx, retaddr);

        goto redo;

    }

    return physaddr;

}

uint64_t helper_st_virt_to_phys (uint64_t virtaddr)

{

    uint64_t tlb_addr, physaddr;

    int index, mmu_idx;

    void *retaddr;



    mmu_idx = cpu_mmu_index(env);

    index = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

 redo:

    tlb_addr = env->tlb_table[mmu_idx][index].addr_write;

    if ((virtaddr & TARGET_PAGE_MASK) ==

        (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {

        physaddr = virtaddr + env->tlb_table[mmu_idx][index].addend;

    } else {

        

        retaddr = GETPC();

        tlb_fill(virtaddr, 1, mmu_idx, retaddr);

        goto redo;

    }

    return physaddr;

}

uint64_t FUNC_0 (uint64_t virtaddr)

{

    uint64_t tlb_addr, physaddr;

    int VAR_0, VAR_1;

    void *VAR_2;



    VAR_1 = cpu_mmu_index(env);

    VAR_0 = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

 redo:

    tlb_addr = env->tlb_table[VAR_1][VAR_0].addr_write;

    if ((virtaddr & TARGET_PAGE_MASK) ==

        (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {

        physaddr = virtaddr + env->tlb_table[VAR_1][VAR_0].addend;

    } else {

        

        VAR_2 = GETPC();

        tlb_fill(virtaddr, 1, VAR_1, VAR_2);

        goto redo;

    }

    return physaddr;

}

uint64_t FUNC_0 (uint64_t virtaddr)
{ uint64_t tlb_addr, physaddr; int VAR_0, VAR_1; void *VAR_2; VAR_1 = cpu_mmu_index(env); VAR_0 = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); redo:
tlb_addr = env->tlb_table[VAR_1][VAR_0].addr_write; if ((virtaddr & TARGET_PAGE_MASK) ==
(tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { physaddr = virtaddr + env->tlb_table[VAR_1][VAR_0].addend; } else { VAR_2 = GETPC(); tlb_fill(virtaddr, 1, VAR_1, VAR_2); goto redo; } return physaddr; }