static void openpic_msi_write(void *opaque, hwaddr addr, uint64_t val,

                              unsigned size)

{

    OpenPICState *opp = opaque;

    int idx = opp->irq_msi;

    int srs, ibs;



    DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);

    if (addr & 0xF) {

        return;

    }



    switch (addr) {

    case MSIIR_OFFSET:

        srs = val >> MSIIR_SRS_SHIFT;

        idx += srs;

        ibs = (val & MSIIR_IBS_MASK) >> MSIIR_IBS_SHIFT;

        opp->msi[srs].msir |= 1 << ibs;

        openpic_set_irq(opp, idx, 1);

        break;

    default:

        /* most registers are read-only, thus ignored */

        break;

    }

}

static void openpic_msi_write(void *opaque, hwaddr addr, uint64_t val,

                              unsigned size)

{

    OpenPICState *opp = opaque;

    int idx = opp->irq_msi;

    int srs, ibs;



    DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);

    if (addr & 0xF) {

        return;

    }



    switch (addr) {

    case MSIIR_OFFSET:

        srs = val >> MSIIR_SRS_SHIFT;

        idx += srs;

        ibs = (val & MSIIR_IBS_MASK) >> MSIIR_IBS_SHIFT;

        opp->msi[srs].msir |= 1 << ibs;

        openpic_set_irq(opp, idx, 1);

        break;

    default:

        

        break;

    }

}

    DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);     DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
static void FUNC_0(void *VAR_0, hwaddr VAR_1, uint64_t VAR_2,

                              unsigned VAR_3)

{

    OpenPICState *opp = VAR_0;

    int VAR_4 = opp->irq_msi;

    int VAR_5, VAR_6;



    DPRINTF("%s: VAR_1 " TARGET_FMT_plx " <= %08x\n", __func__, VAR_1, VAR_2);

    if (VAR_1 & 0xF) {

        return;

    }



    switch (VAR_1) {

    case MSIIR_OFFSET:

        VAR_5 = VAR_2 >> MSIIR_SRS_SHIFT;

        VAR_4 += VAR_5;

        VAR_6 = (VAR_2 & MSIIR_IBS_MASK) >> MSIIR_IBS_SHIFT;

        opp->msi[VAR_5].msir |= 1 << VAR_6;

        openpic_set_irq(opp, VAR_4, 1);

        break;

    default:

        

        break;

    }

}

static void FUNC_0(void *VAR_0, hwaddr VAR_1, uint64_t VAR_2,
unsigned VAR_3)
{ OpenPICState *opp = VAR_0; int VAR_4 = opp->irq_msi; int VAR_5, VAR_6; DPRINTF("%s: VAR_1 " TARGET_FMT_plx " <= %08x\n", __func__, VAR_1, VAR_2); if (VAR_1 & 0xF) { return; } switch (VAR_1) { case MSIIR_OFFSET:
VAR_5 = VAR_2 >> MSIIR_SRS_SHIFT; VAR_4 += VAR_5; VAR_6 = (VAR_2 & MSIIR_IBS_MASK) >> MSIIR_IBS_SHIFT; opp->msi[VAR_5].msir |= 1 << VAR_6; openpic_set_irq(opp, VAR_4, 1); break; default:
break; } }