int kqemu_cpu_exec(CPUState *env)

{

    struct kqemu_cpu_state kcpu_state, *kenv = &kcpu_state;

    int ret, cpl, i;

#ifdef CONFIG_PROFILER

    int64_t ti;

#endif

#ifdef _WIN32

    DWORD temp;

#endif



#ifdef CONFIG_PROFILER

    ti = profile_getclock();

#endif

    LOG_INT("kqemu: cpu_exec: enter\n");

    LOG_INT_STATE(env);

    for(i = 0; i < CPU_NB_REGS; i++)

        kenv->regs[i] = env->regs[i];

    kenv->eip = env->eip;

    kenv->eflags = env->eflags;

    for(i = 0; i < 6; i++)

        kqemu_load_seg(&kenv->segs[i], &env->segs[i]);

    kqemu_load_seg(&kenv->ldt, &env->ldt);

    kqemu_load_seg(&kenv->tr, &env->tr);

    kqemu_load_seg(&kenv->gdt, &env->gdt);

    kqemu_load_seg(&kenv->idt, &env->idt);

    kenv->cr0 = env->cr[0];

    kenv->cr2 = env->cr[2];

    kenv->cr3 = env->cr[3];

    kenv->cr4 = env->cr[4];

    kenv->a20_mask = env->a20_mask;

    kenv->efer = env->efer;

    kenv->tsc_offset = 0;

    kenv->star = env->star;

    kenv->sysenter_cs = env->sysenter_cs;

    kenv->sysenter_esp = env->sysenter_esp;

    kenv->sysenter_eip = env->sysenter_eip;

#ifdef TARGET_X86_64

    kenv->lstar = env->lstar;

    kenv->cstar = env->cstar;

    kenv->fmask = env->fmask;

    kenv->kernelgsbase = env->kernelgsbase;

#endif

    if (env->dr[7] & 0xff) {

        kenv->dr7 = env->dr[7];

        kenv->dr0 = env->dr[0];

        kenv->dr1 = env->dr[1];

        kenv->dr2 = env->dr[2];

        kenv->dr3 = env->dr[3];

    } else {

        kenv->dr7 = 0;

    }

    kenv->dr6 = env->dr[6];

    cpl = (env->hflags & HF_CPL_MASK);

    kenv->cpl = cpl;

    kenv->nb_pages_to_flush = nb_pages_to_flush;

    kenv->user_only = (env->kqemu_enabled == 1);

    kenv->nb_ram_pages_to_update = nb_ram_pages_to_update;

    nb_ram_pages_to_update = 0;

    kenv->nb_modified_ram_pages = nb_modified_ram_pages;



    kqemu_reset_modified_ram_pages();



    if (env->cpuid_features & CPUID_FXSR)

        restore_native_fp_fxrstor(env);

    else

        restore_native_fp_frstor(env);



#ifdef _WIN32

    if (DeviceIoControl(kqemu_fd, KQEMU_EXEC,

                        kenv, sizeof(struct kqemu_cpu_state),

                        kenv, sizeof(struct kqemu_cpu_state),

                        &temp, NULL)) {

        ret = kenv->retval;

    } else {

        ret = -1;

    }

#else

    ioctl(kqemu_fd, KQEMU_EXEC, kenv);

    ret = kenv->retval;

#endif

    if (env->cpuid_features & CPUID_FXSR)

        save_native_fp_fxsave(env);

    else

        save_native_fp_fsave(env);



    for(i = 0; i < CPU_NB_REGS; i++)

        env->regs[i] = kenv->regs[i];

    env->eip = kenv->eip;

    env->eflags = kenv->eflags;

    for(i = 0; i < 6; i++)

        kqemu_save_seg(&env->segs[i], &kenv->segs[i]);

    cpu_x86_set_cpl(env, kenv->cpl);

    kqemu_save_seg(&env->ldt, &kenv->ldt);

    env->cr[0] = kenv->cr0;

    env->cr[4] = kenv->cr4;

    env->cr[3] = kenv->cr3;

    env->cr[2] = kenv->cr2;

    env->dr[6] = kenv->dr6;

#ifdef TARGET_X86_64

    env->kernelgsbase = kenv->kernelgsbase;

#endif



    /* flush pages as indicated by kqemu */

    if (kenv->nb_pages_to_flush >= KQEMU_FLUSH_ALL) {

        tlb_flush(env, 1);

    } else {

        for(i = 0; i < kenv->nb_pages_to_flush; i++) {

            tlb_flush_page(env, pages_to_flush[i]);

        }

    }

    nb_pages_to_flush = 0;



#ifdef CONFIG_PROFILER

    kqemu_time += profile_getclock() - ti;

    kqemu_exec_count++;

#endif



    if (kenv->nb_ram_pages_to_update > 0) {

        cpu_tlb_update_dirty(env);

    }



    if (kenv->nb_modified_ram_pages > 0) {

        for(i = 0; i < kenv->nb_modified_ram_pages; i++) {

            unsigned long addr;

            addr = modified_ram_pages[i];

            tb_invalidate_phys_page_range(addr, addr + TARGET_PAGE_SIZE, 0);

        }

    }



    /* restore the hidden flags */

    {

        unsigned int new_hflags;

#ifdef TARGET_X86_64

        if ((env->hflags & HF_LMA_MASK) &&

            (env->segs[R_CS].flags & DESC_L_MASK)) {

            /* long mode */

            new_hflags = HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK;

        } else

#endif

        {

            /* legacy / compatibility case */

            new_hflags = (env->segs[R_CS].flags & DESC_B_MASK)

                >> (DESC_B_SHIFT - HF_CS32_SHIFT);

            new_hflags |= (env->segs[R_SS].flags & DESC_B_MASK)

                >> (DESC_B_SHIFT - HF_SS32_SHIFT);

            if (!(env->cr[0] & CR0_PE_MASK) ||

                   (env->eflags & VM_MASK) ||

                   !(env->hflags & HF_CS32_MASK)) {

                /* XXX: try to avoid this test. The problem comes from the

                   fact that is real mode or vm86 mode we only modify the

                   'base' and 'selector' fields of the segment cache to go

                   faster. A solution may be to force addseg to one in

                   translate-i386.c. */

                new_hflags |= HF_ADDSEG_MASK;

            } else {

                new_hflags |= ((env->segs[R_DS].base |

                                env->segs[R_ES].base |

                                env->segs[R_SS].base) != 0) <<

                    HF_ADDSEG_SHIFT;

            }

        }

        env->hflags = (env->hflags &

           ~(HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK)) |

            new_hflags;

    }

    /* update FPU flags */

    env->hflags = (env->hflags & ~(HF_MP_MASK | HF_EM_MASK | HF_TS_MASK)) |

        ((env->cr[0] << (HF_MP_SHIFT - 1)) & (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK));

    if (env->cr[4] & CR4_OSFXSR_MASK)

        env->hflags |= HF_OSFXSR_MASK;

    else

        env->hflags &= ~HF_OSFXSR_MASK;



    LOG_INT("kqemu: kqemu_cpu_exec: ret=0x%x\n", ret);

    if (ret == KQEMU_RET_SYSCALL) {

        /* syscall instruction */

        return do_syscall(env, kenv);

    } else

    if ((ret & 0xff00) == KQEMU_RET_INT) {

        env->exception_index = ret & 0xff;

        env->error_code = 0;

        env->exception_is_int = 1;

        env->exception_next_eip = kenv->next_eip;

#ifdef CONFIG_PROFILER

        kqemu_ret_int_count++;

#endif

        LOG_INT("kqemu: interrupt v=%02x:\n", env->exception_index);

        LOG_INT_STATE(env);

        return 1;

    } else if ((ret & 0xff00) == KQEMU_RET_EXCEPTION) {

        env->exception_index = ret & 0xff;

        env->error_code = kenv->error_code;

        env->exception_is_int = 0;

        env->exception_next_eip = 0;

#ifdef CONFIG_PROFILER

        kqemu_ret_excp_count++;

#endif

        LOG_INT("kqemu: exception v=%02x e=%04x:\n",

                    env->exception_index, env->error_code);

        LOG_INT_STATE(env);

        return 1;

    } else if (ret == KQEMU_RET_INTR) {

#ifdef CONFIG_PROFILER

        kqemu_ret_intr_count++;

#endif

        LOG_INT_STATE(env);

        return 0;

    } else if (ret == KQEMU_RET_SOFTMMU) {

#ifdef CONFIG_PROFILER

        {

            unsigned long pc = env->eip + env->segs[R_CS].base;

            kqemu_record_pc(pc);

        }

#endif

        LOG_INT_STATE(env);

        return 2;

    } else {

        cpu_dump_state(env, stderr, fprintf, 0);

        fprintf(stderr, "Unsupported return value: 0x%x\n", ret);

        exit(1);

    }

    return 0;

}

int kqemu_cpu_exec(CPUState *env)

{

    struct kqemu_cpu_state kcpu_state, *kenv = &kcpu_state;

    int ret, cpl, i;

#ifdef CONFIG_PROFILER

    int64_t ti;

#endif

#ifdef _WIN32

    DWORD temp;

#endif



#ifdef CONFIG_PROFILER

    ti = profile_getclock();

#endif

    LOG_INT("kqemu: cpu_exec: enter\n");

    LOG_INT_STATE(env);

    for(i = 0; i < CPU_NB_REGS; i++)

        kenv->regs[i] = env->regs[i];

    kenv->eip = env->eip;

    kenv->eflags = env->eflags;

    for(i = 0; i < 6; i++)

        kqemu_load_seg(&kenv->segs[i], &env->segs[i]);

    kqemu_load_seg(&kenv->ldt, &env->ldt);

    kqemu_load_seg(&kenv->tr, &env->tr);

    kqemu_load_seg(&kenv->gdt, &env->gdt);

    kqemu_load_seg(&kenv->idt, &env->idt);

    kenv->cr0 = env->cr[0];

    kenv->cr2 = env->cr[2];

    kenv->cr3 = env->cr[3];

    kenv->cr4 = env->cr[4];

    kenv->a20_mask = env->a20_mask;

    kenv->efer = env->efer;

    kenv->tsc_offset = 0;

    kenv->star = env->star;

    kenv->sysenter_cs = env->sysenter_cs;

    kenv->sysenter_esp = env->sysenter_esp;

    kenv->sysenter_eip = env->sysenter_eip;

#ifdef TARGET_X86_64

    kenv->lstar = env->lstar;

    kenv->cstar = env->cstar;

    kenv->fmask = env->fmask;

    kenv->kernelgsbase = env->kernelgsbase;

#endif

    if (env->dr[7] & 0xff) {

        kenv->dr7 = env->dr[7];

        kenv->dr0 = env->dr[0];

        kenv->dr1 = env->dr[1];

        kenv->dr2 = env->dr[2];

        kenv->dr3 = env->dr[3];

    } else {

        kenv->dr7 = 0;

    }

    kenv->dr6 = env->dr[6];

    cpl = (env->hflags & HF_CPL_MASK);

    kenv->cpl = cpl;

    kenv->nb_pages_to_flush = nb_pages_to_flush;

    kenv->user_only = (env->kqemu_enabled == 1);

    kenv->nb_ram_pages_to_update = nb_ram_pages_to_update;

    nb_ram_pages_to_update = 0;

    kenv->nb_modified_ram_pages = nb_modified_ram_pages;



    kqemu_reset_modified_ram_pages();



    if (env->cpuid_features & CPUID_FXSR)

        restore_native_fp_fxrstor(env);

    else

        restore_native_fp_frstor(env);



#ifdef _WIN32

    if (DeviceIoControl(kqemu_fd, KQEMU_EXEC,

                        kenv, sizeof(struct kqemu_cpu_state),

                        kenv, sizeof(struct kqemu_cpu_state),

                        &temp, NULL)) {

        ret = kenv->retval;

    } else {

        ret = -1;

    }

#else

    ioctl(kqemu_fd, KQEMU_EXEC, kenv);

    ret = kenv->retval;

#endif

    if (env->cpuid_features & CPUID_FXSR)

        save_native_fp_fxsave(env);

    else

        save_native_fp_fsave(env);



    for(i = 0; i < CPU_NB_REGS; i++)

        env->regs[i] = kenv->regs[i];

    env->eip = kenv->eip;

    env->eflags = kenv->eflags;

    for(i = 0; i < 6; i++)

        kqemu_save_seg(&env->segs[i], &kenv->segs[i]);

    cpu_x86_set_cpl(env, kenv->cpl);

    kqemu_save_seg(&env->ldt, &kenv->ldt);

    env->cr[0] = kenv->cr0;

    env->cr[4] = kenv->cr4;

    env->cr[3] = kenv->cr3;

    env->cr[2] = kenv->cr2;

    env->dr[6] = kenv->dr6;

#ifdef TARGET_X86_64

    env->kernelgsbase = kenv->kernelgsbase;

#endif



    

    if (kenv->nb_pages_to_flush >= KQEMU_FLUSH_ALL) {

        tlb_flush(env, 1);

    } else {

        for(i = 0; i < kenv->nb_pages_to_flush; i++) {

            tlb_flush_page(env, pages_to_flush[i]);

        }

    }

    nb_pages_to_flush = 0;



#ifdef CONFIG_PROFILER

    kqemu_time += profile_getclock() - ti;

    kqemu_exec_count++;

#endif



    if (kenv->nb_ram_pages_to_update > 0) {

        cpu_tlb_update_dirty(env);

    }



    if (kenv->nb_modified_ram_pages > 0) {

        for(i = 0; i < kenv->nb_modified_ram_pages; i++) {

            unsigned long addr;

            addr = modified_ram_pages[i];

            tb_invalidate_phys_page_range(addr, addr + TARGET_PAGE_SIZE, 0);

        }

    }



    

    {

        unsigned int new_hflags;

#ifdef TARGET_X86_64

        if ((env->hflags & HF_LMA_MASK) &&

            (env->segs[R_CS].flags & DESC_L_MASK)) {

            

            new_hflags = HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK;

        } else

#endif

        {

            

            new_hflags = (env->segs[R_CS].flags & DESC_B_MASK)

                >> (DESC_B_SHIFT - HF_CS32_SHIFT);

            new_hflags |= (env->segs[R_SS].flags & DESC_B_MASK)

                >> (DESC_B_SHIFT - HF_SS32_SHIFT);

            if (!(env->cr[0] & CR0_PE_MASK) ||

                   (env->eflags & VM_MASK) ||

                   !(env->hflags & HF_CS32_MASK)) {

                









                new_hflags |= HF_ADDSEG_MASK;

            } else {

                new_hflags |= ((env->segs[R_DS].base |

                                env->segs[R_ES].base |

                                env->segs[R_SS].base) != 0) <<

                    HF_ADDSEG_SHIFT;

            }

        }

        env->hflags = (env->hflags &

           ~(HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK)) |

            new_hflags;

    }

    

    env->hflags = (env->hflags & ~(HF_MP_MASK | HF_EM_MASK | HF_TS_MASK)) |

        ((env->cr[0] << (HF_MP_SHIFT - 1)) & (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK));

    if (env->cr[4] & CR4_OSFXSR_MASK)

        env->hflags |= HF_OSFXSR_MASK;

    else

        env->hflags &= ~HF_OSFXSR_MASK;



    LOG_INT("kqemu: kqemu_cpu_exec: ret=0x%x\n", ret);

    if (ret == KQEMU_RET_SYSCALL) {

        

        return do_syscall(env, kenv);

    } else

    if ((ret & 0xff00) == KQEMU_RET_INT) {

        env->exception_index = ret & 0xff;

        env->error_code = 0;

        env->exception_is_int = 1;

        env->exception_next_eip = kenv->next_eip;

#ifdef CONFIG_PROFILER

        kqemu_ret_int_count++;

#endif

        LOG_INT("kqemu: interrupt v=%02x:\n", env->exception_index);

        LOG_INT_STATE(env);

        return 1;

    } else if ((ret & 0xff00) == KQEMU_RET_EXCEPTION) {

        env->exception_index = ret & 0xff;

        env->error_code = kenv->error_code;

        env->exception_is_int = 0;

        env->exception_next_eip = 0;

#ifdef CONFIG_PROFILER

        kqemu_ret_excp_count++;

#endif

        LOG_INT("kqemu: exception v=%02x e=%04x:\n",

                    env->exception_index, env->error_code);

        LOG_INT_STATE(env);

        return 1;

    } else if (ret == KQEMU_RET_INTR) {

#ifdef CONFIG_PROFILER

        kqemu_ret_intr_count++;

#endif

        LOG_INT_STATE(env);

        return 0;

    } else if (ret == KQEMU_RET_SOFTMMU) {

#ifdef CONFIG_PROFILER

        {

            unsigned long pc = env->eip + env->segs[R_CS].base;

            kqemu_record_pc(pc);

        }

#endif

        LOG_INT_STATE(env);

        return 2;

    } else {

        cpu_dump_state(env, stderr, fprintf, 0);

        fprintf(stderr, "Unsupported return value: 0x%x\n", ret);

        exit(1);

    }

    return 0;

}

int FUNC_0(CPUState *VAR_0)

{

    struct kqemu_cpu_state VAR_1, *VAR_2 = &VAR_1;

    int VAR_3, VAR_4, VAR_5;

#ifdef CONFIG_PROFILER

    int64_t ti;

#endif

#ifdef _WIN32

    DWORD temp;

#endif



#ifdef CONFIG_PROFILER

    ti = profile_getclock();

#endif

    LOG_INT("kqemu: cpu_exec: enter\n");

    LOG_INT_STATE(VAR_0);

    for(VAR_5 = 0; VAR_5 < CPU_NB_REGS; VAR_5++)

        VAR_2->regs[VAR_5] = VAR_0->regs[VAR_5];

    VAR_2->eip = VAR_0->eip;

    VAR_2->eflags = VAR_0->eflags;

    for(VAR_5 = 0; VAR_5 < 6; VAR_5++)

        kqemu_load_seg(&VAR_2->segs[VAR_5], &VAR_0->segs[VAR_5]);

    kqemu_load_seg(&VAR_2->ldt, &VAR_0->ldt);

    kqemu_load_seg(&VAR_2->tr, &VAR_0->tr);

    kqemu_load_seg(&VAR_2->gdt, &VAR_0->gdt);

    kqemu_load_seg(&VAR_2->idt, &VAR_0->idt);

    VAR_2->cr0 = VAR_0->cr[0];

    VAR_2->cr2 = VAR_0->cr[2];

    VAR_2->cr3 = VAR_0->cr[3];

    VAR_2->cr4 = VAR_0->cr[4];

    VAR_2->a20_mask = VAR_0->a20_mask;

    VAR_2->efer = VAR_0->efer;

    VAR_2->tsc_offset = 0;

    VAR_2->star = VAR_0->star;

    VAR_2->sysenter_cs = VAR_0->sysenter_cs;

    VAR_2->sysenter_esp = VAR_0->sysenter_esp;

    VAR_2->sysenter_eip = VAR_0->sysenter_eip;

#ifdef TARGET_X86_64

    VAR_2->lstar = VAR_0->lstar;

    VAR_2->cstar = VAR_0->cstar;

    VAR_2->fmask = VAR_0->fmask;

    VAR_2->kernelgsbase = VAR_0->kernelgsbase;

#endif

    if (VAR_0->dr[7] & 0xff) {

        VAR_2->dr7 = VAR_0->dr[7];

        VAR_2->dr0 = VAR_0->dr[0];

        VAR_2->dr1 = VAR_0->dr[1];

        VAR_2->dr2 = VAR_0->dr[2];

        VAR_2->dr3 = VAR_0->dr[3];

    } else {

        VAR_2->dr7 = 0;

    }

    VAR_2->dr6 = VAR_0->dr[6];

    VAR_4 = (VAR_0->hflags & HF_CPL_MASK);

    VAR_2->VAR_4 = VAR_4;

    VAR_2->nb_pages_to_flush = nb_pages_to_flush;

    VAR_2->user_only = (VAR_0->kqemu_enabled == 1);

    VAR_2->nb_ram_pages_to_update = nb_ram_pages_to_update;

    nb_ram_pages_to_update = 0;

    VAR_2->nb_modified_ram_pages = nb_modified_ram_pages;



    kqemu_reset_modified_ram_pages();



    if (VAR_0->cpuid_features & CPUID_FXSR)

        restore_native_fp_fxrstor(VAR_0);

    else

        restore_native_fp_frstor(VAR_0);



#ifdef _WIN32

    if (DeviceIoControl(kqemu_fd, KQEMU_EXEC,

                        VAR_2, sizeof(struct kqemu_cpu_state),

                        VAR_2, sizeof(struct kqemu_cpu_state),

                        &temp, NULL)) {

        VAR_3 = VAR_2->retval;

    } else {

        VAR_3 = -1;

    }

#else

    ioctl(kqemu_fd, KQEMU_EXEC, VAR_2);

    VAR_3 = VAR_2->retval;

#endif

    if (VAR_0->cpuid_features & CPUID_FXSR)

        save_native_fp_fxsave(VAR_0);

    else

        save_native_fp_fsave(VAR_0);



    for(VAR_5 = 0; VAR_5 < CPU_NB_REGS; VAR_5++)

        VAR_0->regs[VAR_5] = VAR_2->regs[VAR_5];

    VAR_0->eip = VAR_2->eip;

    VAR_0->eflags = VAR_2->eflags;

    for(VAR_5 = 0; VAR_5 < 6; VAR_5++)

        kqemu_save_seg(&VAR_0->segs[VAR_5], &VAR_2->segs[VAR_5]);

    cpu_x86_set_cpl(VAR_0, VAR_2->VAR_4);

    kqemu_save_seg(&VAR_0->ldt, &VAR_2->ldt);

    VAR_0->cr[0] = VAR_2->cr0;

    VAR_0->cr[4] = VAR_2->cr4;

    VAR_0->cr[3] = VAR_2->cr3;

    VAR_0->cr[2] = VAR_2->cr2;

    VAR_0->dr[6] = VAR_2->dr6;

#ifdef TARGET_X86_64

    VAR_0->kernelgsbase = VAR_2->kernelgsbase;

#endif



    

    if (VAR_2->nb_pages_to_flush >= KQEMU_FLUSH_ALL) {

        tlb_flush(VAR_0, 1);

    } else {

        for(VAR_5 = 0; VAR_5 < VAR_2->nb_pages_to_flush; VAR_5++) {

            tlb_flush_page(VAR_0, pages_to_flush[VAR_5]);

        }

    }

    nb_pages_to_flush = 0;



#ifdef CONFIG_PROFILER

    kqemu_time += profile_getclock() - ti;

    kqemu_exec_count++;

#endif



    if (VAR_2->nb_ram_pages_to_update > 0) {

        cpu_tlb_update_dirty(VAR_0);

    }



    if (VAR_2->nb_modified_ram_pages > 0) {

        for(VAR_5 = 0; VAR_5 < VAR_2->nb_modified_ram_pages; VAR_5++) {

            unsigned long VAR_6;

            VAR_6 = modified_ram_pages[VAR_5];

            tb_invalidate_phys_page_range(VAR_6, VAR_6 + TARGET_PAGE_SIZE, 0);

        }

    }



    

    {

        unsigned int VAR_7;

#ifdef TARGET_X86_64

        if ((VAR_0->hflags & HF_LMA_MASK) &&

            (VAR_0->segs[R_CS].flags & DESC_L_MASK)) {

            

            VAR_7 = HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK;

        } else

#endif

        {

            

            VAR_7 = (VAR_0->segs[R_CS].flags & DESC_B_MASK)

                >> (DESC_B_SHIFT - HF_CS32_SHIFT);

            VAR_7 |= (VAR_0->segs[R_SS].flags & DESC_B_MASK)

                >> (DESC_B_SHIFT - HF_SS32_SHIFT);

            if (!(VAR_0->cr[0] & CR0_PE_MASK) ||

                   (VAR_0->eflags & VM_MASK) ||

                   !(VAR_0->hflags & HF_CS32_MASK)) {

                









                VAR_7 |= HF_ADDSEG_MASK;

            } else {

                VAR_7 |= ((VAR_0->segs[R_DS].base |

                                VAR_0->segs[R_ES].base |

                                VAR_0->segs[R_SS].base) != 0) <<

                    HF_ADDSEG_SHIFT;

            }

        }

        VAR_0->hflags = (VAR_0->hflags &

           ~(HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK)) |

            VAR_7;

    }

    

    VAR_0->hflags = (VAR_0->hflags & ~(HF_MP_MASK | HF_EM_MASK | HF_TS_MASK)) |

        ((VAR_0->cr[0] << (HF_MP_SHIFT - 1)) & (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK));

    if (VAR_0->cr[4] & CR4_OSFXSR_MASK)

        VAR_0->hflags |= HF_OSFXSR_MASK;

    else

        VAR_0->hflags &= ~HF_OSFXSR_MASK;



    LOG_INT("kqemu: FUNC_0: VAR_3=0x%x\n", VAR_3);

    if (VAR_3 == KQEMU_RET_SYSCALL) {

        

        return do_syscall(VAR_0, VAR_2);

    } else

    if ((VAR_3 & 0xff00) == KQEMU_RET_INT) {

        VAR_0->exception_index = VAR_3 & 0xff;

        VAR_0->error_code = 0;

        VAR_0->exception_is_int = 1;

        VAR_0->exception_next_eip = VAR_2->next_eip;

#ifdef CONFIG_PROFILER

        kqemu_ret_int_count++;

#endif

        LOG_INT("kqemu: interrupt v=%02x:\n", VAR_0->exception_index);

        LOG_INT_STATE(VAR_0);

        return 1;

    } else if ((VAR_3 & 0xff00) == KQEMU_RET_EXCEPTION) {

        VAR_0->exception_index = VAR_3 & 0xff;

        VAR_0->error_code = VAR_2->error_code;

        VAR_0->exception_is_int = 0;

        VAR_0->exception_next_eip = 0;

#ifdef CONFIG_PROFILER

        kqemu_ret_excp_count++;

#endif

        LOG_INT("kqemu: exception v=%02x e=%04x:\n",

                    VAR_0->exception_index, VAR_0->error_code);

        LOG_INT_STATE(VAR_0);

        return 1;

    } else if (VAR_3 == KQEMU_RET_INTR) {

#ifdef CONFIG_PROFILER

        kqemu_ret_intr_count++;

#endif

        LOG_INT_STATE(VAR_0);

        return 0;

    } else if (VAR_3 == KQEMU_RET_SOFTMMU) {

#ifdef CONFIG_PROFILER

        {

            unsigned long pc = VAR_0->eip + VAR_0->segs[R_CS].base;

            kqemu_record_pc(pc);

        }

#endif

        LOG_INT_STATE(VAR_0);

        return 2;

    } else {

        cpu_dump_state(VAR_0, stderr, fprintf, 0);

        fprintf(stderr, "Unsupported return value: 0x%x\n", VAR_3);

        exit(1);

    }

    return 0;

}

int FUNC_0(CPUState *VAR_0)
{ struct kqemu_cpu_state VAR_1, *VAR_2 = &VAR_1; int VAR_3, VAR_4, VAR_5; #ifdef CONFIG_PROFILER
int64_t ti; #endif
#ifdef _WIN32
DWORD temp; #endif
#ifdef CONFIG_PROFILER
ti = profile_getclock(); #endif
LOG_INT("kqemu: cpu_exec: enter\n"); LOG_INT_STATE(VAR_0); for(VAR_5 = 0; VAR_5 < CPU_NB_REGS; VAR_5++) VAR_2->regs[VAR_5] = VAR_0->regs[VAR_5]; VAR_2->eip = VAR_0->eip; VAR_2->eflags = VAR_0->eflags; for(VAR_5 = 0; VAR_5 < 6; VAR_5++) kqemu_load_seg(&VAR_2->segs[VAR_5], &VAR_0->segs[VAR_5]); kqemu_load_seg(&VAR_2->ldt, &VAR_0->ldt); kqemu_load_seg(&VAR_2->tr, &VAR_0->tr); kqemu_load_seg(&VAR_2->gdt, &VAR_0->gdt); kqemu_load_seg(&VAR_2->idt, &VAR_0->idt); VAR_2->cr0 = VAR_0->cr[0]; VAR_2->cr2 = VAR_0->cr[2]; VAR_2->cr3 = VAR_0->cr[3]; VAR_2->cr4 = VAR_0->cr[4]; VAR_2->a20_mask = VAR_0->a20_mask; VAR_2->efer = VAR_0->efer; VAR_2->tsc_offset = 0; VAR_2->star = VAR_0->star; VAR_2->sysenter_cs = VAR_0->sysenter_cs; VAR_2->sysenter_esp = VAR_0->sysenter_esp; VAR_2->sysenter_eip = VAR_0->sysenter_eip; #ifdef TARGET_X86_64
VAR_2->lstar = VAR_0->lstar; VAR_2->cstar = VAR_0->cstar; VAR_2->fmask = VAR_0->fmask; VAR_2->kernelgsbase = VAR_0->kernelgsbase; #endif
if (VAR_0->dr[7] & 0xff) { VAR_2->dr7 = VAR_0->dr[7]; VAR_2->dr0 = VAR_0->dr[0]; VAR_2->dr1 = VAR_0->dr[1]; VAR_2->dr2 = VAR_0->dr[2]; VAR_2->dr3 = VAR_0->dr[3]; } else { VAR_2->dr7 = 0; } VAR_2->dr6 = VAR_0->dr[6]; VAR_4 = (VAR_0->hflags & HF_CPL_MASK); VAR_2->VAR_4 = VAR_4; VAR_2->nb_pages_to_flush = nb_pages_to_flush; VAR_2->user_only = (VAR_0->kqemu_enabled == 1); VAR_2->nb_ram_pages_to_update = nb_ram_pages_to_update; nb_ram_pages_to_update = 0; VAR_2->nb_modified_ram_pages = nb_modified_ram_pages; kqemu_reset_modified_ram_pages(); if (VAR_0->cpuid_features & CPUID_FXSR)
restore_native_fp_fxrstor(VAR_0); else
restore_native_fp_frstor(VAR_0); #ifdef _WIN32
if (DeviceIoControl(kqemu_fd, KQEMU_EXEC,
VAR_2, sizeof(struct kqemu_cpu_state),
VAR_2, sizeof(struct kqemu_cpu_state),
&temp, NULL)) { VAR_3 = VAR_2->retval; } else { VAR_3 = -1; } #else
ioctl(kqemu_fd, KQEMU_EXEC, VAR_2); VAR_3 = VAR_2->retval; #endif
if (VAR_0->cpuid_features & CPUID_FXSR)
save_native_fp_fxsave(VAR_0); else
save_native_fp_fsave(VAR_0); for(VAR_5 = 0; VAR_5 < CPU_NB_REGS; VAR_5++) VAR_0->regs[VAR_5] = VAR_2->regs[VAR_5]; VAR_0->eip = VAR_2->eip; VAR_0->eflags = VAR_2->eflags; for(VAR_5 = 0; VAR_5 < 6; VAR_5++) kqemu_save_seg(&VAR_0->segs[VAR_5], &VAR_2->segs[VAR_5]); cpu_x86_set_cpl(VAR_0, VAR_2->VAR_4); kqemu_save_seg(&VAR_0->ldt, &VAR_2->ldt); VAR_0->cr[0] = VAR_2->cr0; VAR_0->cr[4] = VAR_2->cr4; VAR_0->cr[3] = VAR_2->cr3; VAR_0->cr[2] = VAR_2->cr2; VAR_0->dr[6] = VAR_2->dr6; #ifdef TARGET_X86_64
VAR_0->kernelgsbase = VAR_2->kernelgsbase; #endif
if (VAR_2->nb_pages_to_flush >= KQEMU_FLUSH_ALL) { tlb_flush(VAR_0, 1); } else { for(VAR_5 = 0; VAR_5 < VAR_2->nb_pages_to_flush; VAR_5++) { tlb_flush_page(VAR_0, pages_to_flush[VAR_5]); } } nb_pages_to_flush = 0; #ifdef CONFIG_PROFILER
kqemu_time += profile_getclock() - ti; kqemu_exec_count++; #endif
if (VAR_2->nb_ram_pages_to_update > 0) { cpu_tlb_update_dirty(VAR_0); } if (VAR_2->nb_modified_ram_pages > 0) { for(VAR_5 = 0; VAR_5 < VAR_2->nb_modified_ram_pages; VAR_5++) { unsigned long VAR_6; VAR_6 = modified_ram_pages[VAR_5]; tb_invalidate_phys_page_range(VAR_6, VAR_6 + TARGET_PAGE_SIZE, 0); } } { unsigned int VAR_7; #ifdef TARGET_X86_64
if ((VAR_0->hflags & HF_LMA_MASK) &&
(VAR_0->segs[R_CS].flags & DESC_L_MASK)) { VAR_7 = HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK; } else #endif
{ VAR_7 = (VAR_0->segs[R_CS].flags & DESC_B_MASK)
>> (DESC_B_SHIFT - HF_CS32_SHIFT); VAR_7 |= (VAR_0->segs[R_SS].flags & DESC_B_MASK)
>> (DESC_B_SHIFT - HF_SS32_SHIFT); if (!(VAR_0->cr[0] & CR0_PE_MASK) ||
(VAR_0->eflags & VM_MASK) ||
!(VAR_0->hflags & HF_CS32_MASK)) { VAR_7 |= HF_ADDSEG_MASK; } else { VAR_7 |= ((VAR_0->segs[R_DS].base |
VAR_0->segs[R_ES].base |
VAR_0->segs[R_SS].base) != 0) <<
HF_ADDSEG_SHIFT; } } VAR_0->hflags = (VAR_0->hflags &
~(HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK)) |
VAR_7; } VAR_0->hflags = (VAR_0->hflags & ~(HF_MP_MASK | HF_EM_MASK | HF_TS_MASK)) |
((VAR_0->cr[0] << (HF_MP_SHIFT - 1)) & (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK)); if (VAR_0->cr[4] & CR4_OSFXSR_MASK)
VAR_0->hflags |= HF_OSFXSR_MASK; else
VAR_0->hflags &= ~HF_OSFXSR_MASK; LOG_INT("kqemu: FUNC_0: VAR_3=0x%x\n", VAR_3); if (VAR_3 == KQEMU_RET_SYSCALL) { return do_syscall(VAR_0, VAR_2); } else if ((VAR_3 & 0xff00) == KQEMU_RET_INT) { VAR_0->exception_index = VAR_3 & 0xff; VAR_0->error_code = 0; VAR_0->exception_is_int = 1; VAR_0->exception_next_eip = VAR_2->next_eip; #ifdef CONFIG_PROFILER
kqemu_ret_int_count++; #endif
LOG_INT("kqemu: interrupt v=%02x:\n", VAR_0->exception_index); LOG_INT_STATE(VAR_0); return 1; } else if ((VAR_3 & 0xff00) == KQEMU_RET_EXCEPTION) { VAR_0->exception_index = VAR_3 & 0xff; VAR_0->error_code = VAR_2->error_code; VAR_0->exception_is_int = 0; VAR_0->exception_next_eip = 0; #ifdef CONFIG_PROFILER
kqemu_ret_excp_count++; #endif
LOG_INT("kqemu: exception v=%02x e=%04x:\n",
VAR_0->exception_index, VAR_0->error_code); LOG_INT_STATE(VAR_0); return 1; } else if (VAR_3 == KQEMU_RET_INTR) { #ifdef CONFIG_PROFILER
kqemu_ret_intr_count++; #endif
LOG_INT_STATE(VAR_0); return 0; } else if (VAR_3 == KQEMU_RET_SOFTMMU) { #ifdef CONFIG_PROFILER
{ unsigned long pc = VAR_0->eip + VAR_0->segs[R_CS].base; kqemu_record_pc(pc); } #endif
LOG_INT_STATE(VAR_0); return 2; } else { cpu_dump_state(VAR_0, stderr, fprintf, 0); fprintf(stderr, "Unsupported return value: 0x%x\n", VAR_3); exit(1); } return 0; }