static void digic_uart_write(void *opaque, hwaddr addr, uint64_t value,

                             unsigned size)

{

    DigicUartState *s = opaque;

    unsigned char ch = value;



    addr >>= 2;



    switch (addr) {

    case R_TX:

        if (s->chr) {



            qemu_chr_fe_write_all(s->chr, &ch, 1);

        }

        break;



    case R_ST:

        /*

         * Ignore write to R_ST.

         *

         * The point is that this register is actively used

         * during receiving and transmitting symbols,

         * but we don't know the function of most of bits.

         *

         * Ignoring writes to R_ST is only a simplification

         * of the model. It has no perceptible side effects

         * for existing guests.

         */

        break;



    default:

        qemu_log_mask(LOG_UNIMP,

                      "digic-uart: write access to unknown register 0x"

                      TARGET_FMT_plx, addr << 2);

    }

}
static void digic_uart_write(void *opaque, hwaddr addr, uint64_t value,

                             unsigned size)

{

    DigicUartState *s = opaque;

    unsigned char ch = value;



    addr >>= 2;



    switch (addr) {

    case R_TX:

        if (s->chr) {



            qemu_chr_fe_write_all(s->chr, &ch, 1);

        }

        break;



    case R_ST:

        





















        break;



    default:

        qemu_log_mask(LOG_UNIMP,

                      "digic-uart: write access to unknown register 0x"

                      TARGET_FMT_plx, addr << 2);

    }

}
static void FUNC_0(void *VAR_0, hwaddr VAR_1, uint64_t VAR_2,

                             unsigned VAR_3)

{

    DigicUartState *s = VAR_0;

    unsigned char VAR_4 = VAR_2;



    VAR_1 >>= 2;



    switch (VAR_1) {

    case R_TX:

        if (s->chr) {



            qemu_chr_fe_write_all(s->chr, &VAR_4, 1);

        }

        break;



    case R_ST:

        





















        break;



    default:

        qemu_log_mask(LOG_UNIMP,

                      "digic-uart: write access to unknown register 0x"

                      TARGET_FMT_plx, VAR_1 << 2);

    }

}
static void FUNC_0(void *VAR_0, hwaddr VAR_1, uint64_t VAR_2,
unsigned VAR_3)
{ DigicUartState *s = VAR_0; unsigned char VAR_4 = VAR_2; VAR_1 >>= 2; switch (VAR_1) { case R_TX:
if (s->chr) { qemu_chr_fe_write_all(s->chr, &VAR_4, 1); } break; case R_ST:
break; default:
qemu_log_mask(LOG_UNIMP,
"digic-uart: write access to unknown register 0x"
TARGET_FMT_plx, VAR_1 << 2); } }