static void lx_init(const LxBoardDesc *board, MachineState *machine)

{

#ifdef TARGET_WORDS_BIGENDIAN

    int be = 1;

#else

    int be = 0;

#endif

    MemoryRegion *system_memory = get_system_memory();

    XtensaCPU *cpu = NULL;

    CPUXtensaState *env = NULL;

    MemoryRegion *ram, *rom, *system_io;

    DriveInfo *dinfo;

    pflash_t *flash = NULL;

    QemuOpts *machine_opts = qemu_get_machine_opts();

    const char *cpu_model = machine->cpu_model;

    const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");

    const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");

    const char *dtb_filename = qemu_opt_get(machine_opts, "dtb");

    const char *initrd_filename = qemu_opt_get(machine_opts, "initrd");

    int n;



    if (!cpu_model) {

        cpu_model = XTENSA_DEFAULT_CPU_MODEL;

    }



    for (n = 0; n < smp_cpus; n++) {

        cpu = cpu_xtensa_init(cpu_model);

        if (cpu == NULL) {

            error_report("unable to find CPU definition '%s'",

                         cpu_model);

            exit(EXIT_FAILURE);

        }

        env = &cpu->env;



        env->sregs[PRID] = n;

        qemu_register_reset(lx60_reset, cpu);

        /* Need MMU initialized prior to ELF loading,

         * so that ELF gets loaded into virtual addresses

         */

        cpu_reset(CPU(cpu));

    }



    ram = g_malloc(sizeof(*ram));

    memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size,

                           &error_abort);

    vmstate_register_ram_global(ram);

    memory_region_add_subregion(system_memory, 0, ram);



    system_io = g_malloc(sizeof(*system_io));

    memory_region_init_io(system_io, NULL, &lx60_io_ops, NULL, "lx60.io",

                          224 * 1024 * 1024);

    memory_region_add_subregion(system_memory, 0xf0000000, system_io);

    lx60_fpga_init(system_io, 0x0d020000);

    if (nd_table[0].used) {

        lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,

                xtensa_get_extint(env, 1), nd_table);

    }



    if (!serial_hds[0]) {

        serial_hds[0] = qemu_chr_new("serial0", "null", NULL);

    }



    serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),

            115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);



    dinfo = drive_get(IF_PFLASH, 0, 0);

    if (dinfo) {

        flash = pflash_cfi01_register(board->flash_base,

                NULL, "lx60.io.flash", board->flash_size,

                blk_by_legacy_dinfo(dinfo),

                board->flash_sector_size,

                board->flash_size / board->flash_sector_size,

                4, 0x0000, 0x0000, 0x0000, 0x0000, be);

        if (flash == NULL) {

            error_report("unable to mount pflash");

            exit(EXIT_FAILURE);

        }

    }



    /* Use presence of kernel file name as 'boot from SRAM' switch. */

    if (kernel_filename) {

        uint32_t entry_point = env->pc;

        size_t bp_size = 3 * get_tag_size(0); /* first/last and memory tags */

        uint32_t tagptr = 0xfe000000 + board->sram_size;

        uint32_t cur_tagptr;

        BpMemInfo memory_location = {

            .type = tswap32(MEMORY_TYPE_CONVENTIONAL),

            .start = tswap32(0),

            .end = tswap32(machine->ram_size),

        };

        uint32_t lowmem_end = machine->ram_size < 0x08000000 ?

            machine->ram_size : 0x08000000;

        uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096);



        rom = g_malloc(sizeof(*rom));

        memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size,

                               &error_abort);

        vmstate_register_ram_global(rom);

        memory_region_add_subregion(system_memory, 0xfe000000, rom);



        if (kernel_cmdline) {

            bp_size += get_tag_size(strlen(kernel_cmdline) + 1);

        }

        if (dtb_filename) {

            bp_size += get_tag_size(sizeof(uint32_t));

        }

        if (initrd_filename) {

            bp_size += get_tag_size(sizeof(BpMemInfo));

        }



        /* Put kernel bootparameters to the end of that SRAM */

        tagptr = (tagptr - bp_size) & ~0xff;

        cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL);

        cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY,

                             sizeof(memory_location), &memory_location);



        if (kernel_cmdline) {

            cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE,

                                 strlen(kernel_cmdline) + 1, kernel_cmdline);

        }

        if (dtb_filename) {

            int fdt_size;

            void *fdt = load_device_tree(dtb_filename, &fdt_size);

            uint32_t dtb_addr = tswap32(cur_lowmem);



            if (!fdt) {

                error_report("could not load DTB '%s'", dtb_filename);

                exit(EXIT_FAILURE);

            }



            cpu_physical_memory_write(cur_lowmem, fdt, fdt_size);

            cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,

                                 sizeof(dtb_addr), &dtb_addr);

            cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096);

        }

        if (initrd_filename) {

            BpMemInfo initrd_location = { 0 };

            int initrd_size = load_ramdisk(initrd_filename, cur_lowmem,

                                           lowmem_end - cur_lowmem);



            if (initrd_size < 0) {

                initrd_size = load_image_targphys(initrd_filename,

                                                  cur_lowmem,

                                                  lowmem_end - cur_lowmem);

            }

            if (initrd_size < 0) {

                error_report("could not load initrd '%s'", initrd_filename);

                exit(EXIT_FAILURE);

            }

            initrd_location.start = tswap32(cur_lowmem);

            initrd_location.end = tswap32(cur_lowmem + initrd_size);

            cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,

                                 sizeof(initrd_location), &initrd_location);

            cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096);

        }

        cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL);

        env->regs[2] = tagptr;



        uint64_t elf_entry;

        uint64_t elf_lowaddr;

        int success = load_elf(kernel_filename, translate_phys_addr, cpu,

                &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);

        if (success > 0) {

            entry_point = elf_entry;

        } else {

            hwaddr ep;

            int is_linux;

            success = load_uimage(kernel_filename, &ep, NULL, &is_linux,

                                  translate_phys_addr, cpu);

            if (success > 0 && is_linux) {

                entry_point = ep;

            } else {

                error_report("could not load kernel '%s'",

                             kernel_filename);

                exit(EXIT_FAILURE);

            }

        }

        if (entry_point != env->pc) {

            static const uint8_t jx_a0[] = {

#ifdef TARGET_WORDS_BIGENDIAN

                0x0a, 0, 0,

#else

                0xa0, 0, 0,

#endif

            };

            env->regs[0] = entry_point;

            cpu_physical_memory_write(env->pc, jx_a0, sizeof(jx_a0));

        }

    } else {

        if (flash) {

            MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);

            MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));



            memory_region_init_alias(flash_io, NULL, "lx60.flash",

                    flash_mr, board->flash_boot_base,

                    board->flash_size - board->flash_boot_base < 0x02000000 ?

                    board->flash_size - board->flash_boot_base : 0x02000000);

            memory_region_add_subregion(system_memory, 0xfe000000,

                    flash_io);

        }

    }

}

static void lx_init(const LxBoardDesc *board, MachineState *machine)

{

#ifdef TARGET_WORDS_BIGENDIAN

    int be = 1;

#else

    int be = 0;

#endif

    MemoryRegion *system_memory = get_system_memory();

    XtensaCPU *cpu = NULL;

    CPUXtensaState *env = NULL;

    MemoryRegion *ram, *rom, *system_io;

    DriveInfo *dinfo;

    pflash_t *flash = NULL;

    QemuOpts *machine_opts = qemu_get_machine_opts();

    const char *cpu_model = machine->cpu_model;

    const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");

    const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");

    const char *dtb_filename = qemu_opt_get(machine_opts, "dtb");

    const char *initrd_filename = qemu_opt_get(machine_opts, "initrd");

    int n;



    if (!cpu_model) {

        cpu_model = XTENSA_DEFAULT_CPU_MODEL;

    }



    for (n = 0; n < smp_cpus; n++) {

        cpu = cpu_xtensa_init(cpu_model);

        if (cpu == NULL) {

            error_report("unable to find CPU definition '%s'",

                         cpu_model);

            exit(EXIT_FAILURE);

        }

        env = &cpu->env;



        env->sregs[PRID] = n;

        qemu_register_reset(lx60_reset, cpu);

        





        cpu_reset(CPU(cpu));

    }



    ram = g_malloc(sizeof(*ram));

    memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size,

                           &error_abort);

    vmstate_register_ram_global(ram);

    memory_region_add_subregion(system_memory, 0, ram);



    system_io = g_malloc(sizeof(*system_io));

    memory_region_init_io(system_io, NULL, &lx60_io_ops, NULL, "lx60.io",

                          224 * 1024 * 1024);

    memory_region_add_subregion(system_memory, 0xf0000000, system_io);

    lx60_fpga_init(system_io, 0x0d020000);

    if (nd_table[0].used) {

        lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,

                xtensa_get_extint(env, 1), nd_table);

    }



    if (!serial_hds[0]) {

        serial_hds[0] = qemu_chr_new("serial0", "null", NULL);

    }



    serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),

            115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);



    dinfo = drive_get(IF_PFLASH, 0, 0);

    if (dinfo) {

        flash = pflash_cfi01_register(board->flash_base,

                NULL, "lx60.io.flash", board->flash_size,

                blk_by_legacy_dinfo(dinfo),

                board->flash_sector_size,

                board->flash_size / board->flash_sector_size,

                4, 0x0000, 0x0000, 0x0000, 0x0000, be);

        if (flash == NULL) {

            error_report("unable to mount pflash");

            exit(EXIT_FAILURE);

        }

    }



    

    if (kernel_filename) {

        uint32_t entry_point = env->pc;

        size_t bp_size = 3 * get_tag_size(0); 

        uint32_t tagptr = 0xfe000000 + board->sram_size;

        uint32_t cur_tagptr;

        BpMemInfo memory_location = {

            .type = tswap32(MEMORY_TYPE_CONVENTIONAL),

            .start = tswap32(0),

            .end = tswap32(machine->ram_size),

        };

        uint32_t lowmem_end = machine->ram_size < 0x08000000 ?

            machine->ram_size : 0x08000000;

        uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096);



        rom = g_malloc(sizeof(*rom));

        memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size,

                               &error_abort);

        vmstate_register_ram_global(rom);

        memory_region_add_subregion(system_memory, 0xfe000000, rom);



        if (kernel_cmdline) {

            bp_size += get_tag_size(strlen(kernel_cmdline) + 1);

        }

        if (dtb_filename) {

            bp_size += get_tag_size(sizeof(uint32_t));

        }

        if (initrd_filename) {

            bp_size += get_tag_size(sizeof(BpMemInfo));

        }



        

        tagptr = (tagptr - bp_size) & ~0xff;

        cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL);

        cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY,

                             sizeof(memory_location), &memory_location);



        if (kernel_cmdline) {

            cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE,

                                 strlen(kernel_cmdline) + 1, kernel_cmdline);

        }

        if (dtb_filename) {

            int fdt_size;

            void *fdt = load_device_tree(dtb_filename, &fdt_size);

            uint32_t dtb_addr = tswap32(cur_lowmem);



            if (!fdt) {

                error_report("could not load DTB '%s'", dtb_filename);

                exit(EXIT_FAILURE);

            }



            cpu_physical_memory_write(cur_lowmem, fdt, fdt_size);

            cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,

                                 sizeof(dtb_addr), &dtb_addr);

            cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096);

        }

        if (initrd_filename) {

            BpMemInfo initrd_location = { 0 };

            int initrd_size = load_ramdisk(initrd_filename, cur_lowmem,

                                           lowmem_end - cur_lowmem);



            if (initrd_size < 0) {

                initrd_size = load_image_targphys(initrd_filename,

                                                  cur_lowmem,

                                                  lowmem_end - cur_lowmem);

            }

            if (initrd_size < 0) {

                error_report("could not load initrd '%s'", initrd_filename);

                exit(EXIT_FAILURE);

            }

            initrd_location.start = tswap32(cur_lowmem);

            initrd_location.end = tswap32(cur_lowmem + initrd_size);

            cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,

                                 sizeof(initrd_location), &initrd_location);

            cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096);

        }

        cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL);

        env->regs[2] = tagptr;



        uint64_t elf_entry;

        uint64_t elf_lowaddr;

        int success = load_elf(kernel_filename, translate_phys_addr, cpu,

                &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);

        if (success > 0) {

            entry_point = elf_entry;

        } else {

            hwaddr ep;

            int is_linux;

            success = load_uimage(kernel_filename, &ep, NULL, &is_linux,

                                  translate_phys_addr, cpu);

            if (success > 0 && is_linux) {

                entry_point = ep;

            } else {

                error_report("could not load kernel '%s'",

                             kernel_filename);

                exit(EXIT_FAILURE);

            }

        }

        if (entry_point != env->pc) {

            static const uint8_t jx_a0[] = {

#ifdef TARGET_WORDS_BIGENDIAN

                0x0a, 0, 0,

#else

                0xa0, 0, 0,

#endif

            };

            env->regs[0] = entry_point;

            cpu_physical_memory_write(env->pc, jx_a0, sizeof(jx_a0));

        }

    } else {

        if (flash) {

            MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);

            MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));



            memory_region_init_alias(flash_io, NULL, "lx60.flash",

                    flash_mr, board->flash_boot_base,

                    board->flash_size - board->flash_boot_base < 0x02000000 ?

                    board->flash_size - board->flash_boot_base : 0x02000000);

            memory_region_add_subregion(system_memory, 0xfe000000,

                    flash_io);

        }

    }

}

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static void FUNC_0(const LxBoardDesc *VAR_0, MachineState *VAR_1)

{

#ifdef TARGET_WORDS_BIGENDIAN

    int VAR_2 = 1;

#else

    int VAR_2 = 0;

#endif

    MemoryRegion *system_memory = get_system_memory();

    XtensaCPU *cpu = NULL;

    CPUXtensaState *env = NULL;

    MemoryRegion *ram, *rom, *system_io;

    DriveInfo *dinfo;

    pflash_t *flash = NULL;

    QemuOpts *machine_opts = qemu_get_machine_opts();

    const char *VAR_3 = VAR_1->VAR_3;

    const char *VAR_4 = qemu_opt_get(machine_opts, "kernel");

    const char *VAR_5 = qemu_opt_get(machine_opts, "append");

    const char *VAR_6 = qemu_opt_get(machine_opts, "dtb");

    const char *VAR_7 = qemu_opt_get(machine_opts, "initrd");

    int VAR_8;



    if (!VAR_3) {

        VAR_3 = XTENSA_DEFAULT_CPU_MODEL;

    }



    for (VAR_8 = 0; VAR_8 < smp_cpus; VAR_8++) {

        cpu = cpu_xtensa_init(VAR_3);

        if (cpu == NULL) {

            error_report("unable to find CPU definition '%s'",

                         VAR_3);

            exit(EXIT_FAILURE);

        }

        env = &cpu->env;



        env->sregs[PRID] = VAR_8;

        qemu_register_reset(lx60_reset, cpu);

        





        cpu_reset(CPU(cpu));

    }



    ram = g_malloc(sizeof(*ram));

    memory_region_init_ram(ram, NULL, "lx60.dram", VAR_1->ram_size,

                           &error_abort);

    vmstate_register_ram_global(ram);

    memory_region_add_subregion(system_memory, 0, ram);



    system_io = g_malloc(sizeof(*system_io));

    memory_region_init_io(system_io, NULL, &lx60_io_ops, NULL, "lx60.io",

                          224 * 1024 * 1024);

    memory_region_add_subregion(system_memory, 0xf0000000, system_io);

    lx60_fpga_init(system_io, 0x0d020000);

    if (nd_table[0].used) {

        lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,

                xtensa_get_extint(env, 1), nd_table);

    }



    if (!serial_hds[0]) {

        serial_hds[0] = qemu_chr_new("serial0", "null", NULL);

    }



    serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),

            115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);



    dinfo = drive_get(IF_PFLASH, 0, 0);

    if (dinfo) {

        flash = pflash_cfi01_register(VAR_0->flash_base,

                NULL, "lx60.io.flash", VAR_0->flash_size,

                blk_by_legacy_dinfo(dinfo),

                VAR_0->flash_sector_size,

                VAR_0->flash_size / VAR_0->flash_sector_size,

                4, 0x0000, 0x0000, 0x0000, 0x0000, VAR_2);

        if (flash == NULL) {

            error_report("unable to mount pflash");

            exit(EXIT_FAILURE);

        }

    }



    

    if (VAR_4) {

        uint32_t entry_point = env->pc;

        size_t bp_size = 3 * get_tag_size(0); 

        uint32_t tagptr = 0xfe000000 + VAR_0->sram_size;

        uint32_t cur_tagptr;

        BpMemInfo memory_location = {

            .type = tswap32(MEMORY_TYPE_CONVENTIONAL),

            .start = tswap32(0),

            .end = tswap32(VAR_1->ram_size),

        };

        uint32_t lowmem_end = VAR_1->ram_size < 0x08000000 ?

            VAR_1->ram_size : 0x08000000;

        uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096);



        rom = g_malloc(sizeof(*rom));

        memory_region_init_ram(rom, NULL, "lx60.sram", VAR_0->sram_size,

                               &error_abort);

        vmstate_register_ram_global(rom);

        memory_region_add_subregion(system_memory, 0xfe000000, rom);



        if (VAR_5) {

            bp_size += get_tag_size(strlen(VAR_5) + 1);

        }

        if (VAR_6) {

            bp_size += get_tag_size(sizeof(uint32_t));

        }

        if (VAR_7) {

            bp_size += get_tag_size(sizeof(BpMemInfo));

        }



        

        tagptr = (tagptr - bp_size) & ~0xff;

        cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL);

        cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY,

                             sizeof(memory_location), &memory_location);



        if (VAR_5) {

            cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE,

                                 strlen(VAR_5) + 1, VAR_5);

        }

        if (VAR_6) {

            int VAR_9;

            void *VAR_10 = load_device_tree(VAR_6, &VAR_9);

            uint32_t dtb_addr = tswap32(cur_lowmem);



            if (!VAR_10) {

                error_report("could not load DTB '%s'", VAR_6);

                exit(EXIT_FAILURE);

            }



            cpu_physical_memory_write(cur_lowmem, VAR_10, VAR_9);

            cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,

                                 sizeof(dtb_addr), &dtb_addr);

            cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + VAR_9, 4096);

        }

        if (VAR_7) {

            BpMemInfo initrd_location = { 0 };

            int VAR_11 = load_ramdisk(VAR_7, cur_lowmem,

                                           lowmem_end - cur_lowmem);



            if (VAR_11 < 0) {

                VAR_11 = load_image_targphys(VAR_7,

                                                  cur_lowmem,

                                                  lowmem_end - cur_lowmem);

            }

            if (VAR_11 < 0) {

                error_report("could not load initrd '%s'", VAR_7);

                exit(EXIT_FAILURE);

            }

            initrd_location.start = tswap32(cur_lowmem);

            initrd_location.end = tswap32(cur_lowmem + VAR_11);

            cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,

                                 sizeof(initrd_location), &initrd_location);

            cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + VAR_11, 4096);

        }

        cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL);

        env->regs[2] = tagptr;



        uint64_t elf_entry;

        uint64_t elf_lowaddr;

        int VAR_12 = load_elf(VAR_4, translate_phys_addr, cpu,

                &elf_entry, &elf_lowaddr, NULL, VAR_2, ELF_MACHINE, 0);

        if (VAR_12 > 0) {

            entry_point = elf_entry;

        } else {

            hwaddr ep;

            int VAR_13;

            VAR_12 = load_uimage(VAR_4, &ep, NULL, &VAR_13,

                                  translate_phys_addr, cpu);

            if (VAR_12 > 0 && VAR_13) {

                entry_point = ep;

            } else {

                error_report("could not load kernel '%s'",

                             VAR_4);

                exit(EXIT_FAILURE);

            }

        }

        if (entry_point != env->pc) {

            static const uint8_t VAR_14[] = {

#ifdef TARGET_WORDS_BIGENDIAN

                0x0a, 0, 0,

#else

                0xa0, 0, 0,

#endif

            };

            env->regs[0] = entry_point;

            cpu_physical_memory_write(env->pc, VAR_14, sizeof(VAR_14));

        }

    } else {

        if (flash) {

            MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);

            MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));



            memory_region_init_alias(flash_io, NULL, "lx60.flash",

                    flash_mr, VAR_0->flash_boot_base,

                    VAR_0->flash_size - VAR_0->flash_boot_base < 0x02000000 ?

                    VAR_0->flash_size - VAR_0->flash_boot_base : 0x02000000);

            memory_region_add_subregion(system_memory, 0xfe000000,

                    flash_io);

        }

    }

}

static void FUNC_0(const LxBoardDesc *VAR_0, MachineState *VAR_1)
{ #ifdef TARGET_WORDS_BIGENDIAN
int VAR_2 = 1; #else
int VAR_2 = 0; #endif
MemoryRegion *system_memory = get_system_memory(); XtensaCPU *cpu = NULL; CPUXtensaState *env = NULL; MemoryRegion *ram, *rom, *system_io; DriveInfo *dinfo; pflash_t *flash = NULL; QemuOpts *machine_opts = qemu_get_machine_opts(); const char *VAR_3 = VAR_1->VAR_3; const char *VAR_4 = qemu_opt_get(machine_opts, "kernel"); const char *VAR_5 = qemu_opt_get(machine_opts, "append"); const char *VAR_6 = qemu_opt_get(machine_opts, "dtb"); const char *VAR_7 = qemu_opt_get(machine_opts, "initrd"); int VAR_8; if (!VAR_3) { VAR_3 = XTENSA_DEFAULT_CPU_MODEL; } for (VAR_8 = 0; VAR_8 < smp_cpus; VAR_8++) { cpu = cpu_xtensa_init(VAR_3); if (cpu == NULL) { error_report("unable to find CPU definition '%s'",
VAR_3); exit(EXIT_FAILURE); } env = &cpu->env; env->sregs[PRID] = VAR_8; qemu_register_reset(lx60_reset, cpu); cpu_reset(CPU(cpu)); } ram = g_malloc(sizeof(*ram)); memory_region_init_ram(ram, NULL, "lx60.dram", VAR_1->ram_size,
&error_abort); vmstate_register_ram_global(ram); memory_region_add_subregion(system_memory, 0, ram); system_io = g_malloc(sizeof(*system_io)); memory_region_init_io(system_io, NULL, &lx60_io_ops, NULL, "lx60.io",
224 * 1024 * 1024); memory_region_add_subregion(system_memory, 0xf0000000, system_io); lx60_fpga_init(system_io, 0x0d020000); if (nd_table[0].used) { lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
xtensa_get_extint(env, 1), nd_table); } if (!serial_hds[0]) { serial_hds[0] = qemu_chr_new("serial0", "null", NULL); } serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
115200, serial_hds[0], DEVICE_NATIVE_ENDIAN); dinfo = drive_get(IF_PFLASH, 0, 0); if (dinfo) { flash = pflash_cfi01_register(VAR_0->flash_base,
NULL, "lx60.io.flash", VAR_0->flash_size,
blk_by_legacy_dinfo(dinfo),
VAR_0->flash_sector_size,
VAR_0->flash_size / VAR_0->flash_sector_size,
4, 0x0000, 0x0000, 0x0000, 0x0000, VAR_2); if (flash == NULL) { error_report("unable to mount pflash"); exit(EXIT_FAILURE); } } if (VAR_4) { uint32_t entry_point = env->pc; size_t bp_size = 3 * get_tag_size(0); uint32_t tagptr = 0xfe000000 + VAR_0->sram_size; uint32_t cur_tagptr; BpMemInfo memory_location = { .type = tswap32(MEMORY_TYPE_CONVENTIONAL),
.start = tswap32(0),
.end = tswap32(VAR_1->ram_size),
}; uint32_t lowmem_end = VAR_1->ram_size < 0x08000000 ?
VAR_1->ram_size : 0x08000000; uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096); rom = g_malloc(sizeof(*rom)); memory_region_init_ram(rom, NULL, "lx60.sram", VAR_0->sram_size,
&error_abort); vmstate_register_ram_global(rom); memory_region_add_subregion(system_memory, 0xfe000000, rom); if (VAR_5) { bp_size += get_tag_size(strlen(VAR_5) + 1); } if (VAR_6) { bp_size += get_tag_size(sizeof(uint32_t)); } if (VAR_7) { bp_size += get_tag_size(sizeof(BpMemInfo)); } tagptr = (tagptr - bp_size) & ~0xff; cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL); cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY,
sizeof(memory_location), &memory_location); if (VAR_5) { cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE,
strlen(VAR_5) + 1, VAR_5); } if (VAR_6) { int VAR_9; void *VAR_10 = load_device_tree(VAR_6, &VAR_9); uint32_t dtb_addr = tswap32(cur_lowmem); if (!VAR_10) { error_report("could not load DTB '%s'", VAR_6); exit(EXIT_FAILURE); } cpu_physical_memory_write(cur_lowmem, VAR_10, VAR_9); cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,
sizeof(dtb_addr), &dtb_addr); cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + VAR_9, 4096); } if (VAR_7) { BpMemInfo initrd_location = { 0 }; int VAR_11 = load_ramdisk(VAR_7, cur_lowmem,
lowmem_end - cur_lowmem); if (VAR_11 < 0) { VAR_11 = load_image_targphys(VAR_7,
cur_lowmem,
lowmem_end - cur_lowmem); } if (VAR_11 < 0) { error_report("could not load initrd '%s'", VAR_7); exit(EXIT_FAILURE); } initrd_location.start = tswap32(cur_lowmem); initrd_location.end = tswap32(cur_lowmem + VAR_11); cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,
sizeof(initrd_location), &initrd_location); cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + VAR_11, 4096); } cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL); env->regs[2] = tagptr; uint64_t elf_entry; uint64_t elf_lowaddr; int VAR_12 = load_elf(VAR_4, translate_phys_addr, cpu,
&elf_entry, &elf_lowaddr, NULL, VAR_2, ELF_MACHINE, 0); if (VAR_12 > 0) { entry_point = elf_entry; } else { hwaddr ep; int VAR_13; VAR_12 = load_uimage(VAR_4, &ep, NULL, &VAR_13,
translate_phys_addr, cpu); if (VAR_12 > 0 && VAR_13) { entry_point = ep; } else { error_report("could not load kernel '%s'",
VAR_4); exit(EXIT_FAILURE); } } if (entry_point != env->pc) { static const uint8_t VAR_14[] = { #ifdef TARGET_WORDS_BIGENDIAN
0x0a, 0, 0,
#else
0xa0, 0, 0,
#endif
}; env->regs[0] = entry_point; cpu_physical_memory_write(env->pc, VAR_14, sizeof(VAR_14)); } } else { if (flash) { MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash); MemoryRegion *flash_io = g_malloc(sizeof(*flash_io)); memory_region_init_alias(flash_io, NULL, "lx60.flash",
flash_mr, VAR_0->flash_boot_base,
VAR_0->flash_size - VAR_0->flash_boot_base < 0x02000000 ?
VAR_0->flash_size - VAR_0->flash_boot_base : 0x02000000); memory_region_add_subregion(system_memory, 0xfe000000,
flash_io); } } }