static void openrisc_pic_cpu_handler(void *opaque, int irq, int level)

{

    OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;

    CPUState *cs = CPU(cpu);

    int i;

    uint32_t irq_bit = 1 << irq;



    if (irq > 31 || irq < 0) {

        return;

    }



    if (level) {

        cpu->env.picsr |= irq_bit;

    } else {

        cpu->env.picsr &= ~irq_bit;

    }



    for (i = 0; i < 32; i++) {

        if ((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i))) {

            cpu_interrupt(cs, CPU_INTERRUPT_HARD);

        } else {

            cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);

            cpu->env.picsr &= ~(1 << i);

        }

    }

}

static void openrisc_pic_cpu_handler(void *opaque, int irq, int level)

{

    OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;

    CPUState *cs = CPU(cpu);

    int i;

    uint32_t irq_bit = 1 << irq;



    if (irq > 31 || irq < 0) {

        return;

    }



    if (level) {

        cpu->env.picsr |= irq_bit;

    } else {

        cpu->env.picsr &= ~irq_bit;

    }



    for (i = 0; i < 32; i++) {

        if ((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i))) {

            cpu_interrupt(cs, CPU_INTERRUPT_HARD);

        } else {

            cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);

            cpu->env.picsr &= ~(1 << i);

        }

    }

}

static void FUNC_0(void *VAR_0, int VAR_1, int VAR_2)

{

    OpenRISCCPU *cpu = (OpenRISCCPU *)VAR_0;

    CPUState *cs = CPU(cpu);

    int VAR_3;

    uint32_t irq_bit = 1 << VAR_1;



    if (VAR_1 > 31 || VAR_1 < 0) {

        return;

    }



    if (VAR_2) {

        cpu->env.picsr |= irq_bit;

    } else {

        cpu->env.picsr &= ~irq_bit;

    }



    for (VAR_3 = 0; VAR_3 < 32; VAR_3++) {

        if ((cpu->env.picsr && (1 << VAR_3)) && (cpu->env.picmr && (1 << VAR_3))) {

            cpu_interrupt(cs, CPU_INTERRUPT_HARD);

        } else {

            cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);

            cpu->env.picsr &= ~(1 << VAR_3);

        }

    }

}

static void FUNC_0(void *VAR_0, int VAR_1, int VAR_2)
{ OpenRISCCPU *cpu = (OpenRISCCPU *)VAR_0; CPUState *cs = CPU(cpu); int VAR_3; uint32_t irq_bit = 1 << VAR_1; if (VAR_1 > 31 || VAR_1 < 0) { return; } if (VAR_2) { cpu->env.picsr |= irq_bit; } else { cpu->env.picsr &= ~irq_bit; } for (VAR_3 = 0; VAR_3 < 32; VAR_3++) { if ((cpu->env.picsr && (1 << VAR_3)) && (cpu->env.picmr && (1 << VAR_3))) { cpu_interrupt(cs, CPU_INTERRUPT_HARD); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); cpu->env.picsr &= ~(1 << VAR_3); } } }