struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,

                unsigned long sdram_size,

                const char *core)

{

    int i;

    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)

            g_malloc0(sizeof(struct omap_mpu_state_s));

    qemu_irq dma_irqs[6];

    DriveInfo *dinfo;

    SysBusDevice *busdev;



    if (!core)

        core = "ti925t";



    /* Core */

    s->mpu_model = omap310;

    s->cpu = cpu_arm_init(core);

    if (s->cpu == NULL) {

        fprintf(stderr, "Unable to find CPU definition\n");

        exit(1);

    }

    s->sdram_size = sdram_size;

    s->sram_size = OMAP15XX_SRAM_SIZE;



    s->wakeup = qemu_allocate_irq(omap_mpu_wakeup, s, 0);



    /* Clocks */

    omap_clk_init(s);



    /* Memory-mapped stuff */

    memory_region_allocate_system_memory(&s->emiff_ram, NULL, "omap1.dram",

                                         s->sdram_size);

    memory_region_add_subregion(system_memory, OMAP_EMIFF_BASE, &s->emiff_ram);

    memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size,

                           &error_abort);

    vmstate_register_ram_global(&s->imif_ram);

    memory_region_add_subregion(system_memory, OMAP_IMIF_BASE, &s->imif_ram);



    omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s);



    s->ih[0] = qdev_create(NULL, "omap-intc");

    qdev_prop_set_uint32(s->ih[0], "size", 0x100);

    qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck"));

    qdev_init_nofail(s->ih[0]);

    busdev = SYS_BUS_DEVICE(s->ih[0]);

    sysbus_connect_irq(busdev, 0,

                       qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));

    sysbus_connect_irq(busdev, 1,

                       qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ));

    sysbus_mmio_map(busdev, 0, 0xfffecb00);

    s->ih[1] = qdev_create(NULL, "omap-intc");

    qdev_prop_set_uint32(s->ih[1], "size", 0x800);

    qdev_prop_set_ptr(s->ih[1], "clk", omap_findclk(s, "arminth_ck"));

    qdev_init_nofail(s->ih[1]);

    busdev = SYS_BUS_DEVICE(s->ih[1]);

    sysbus_connect_irq(busdev, 0,

                       qdev_get_gpio_in(s->ih[0], OMAP_INT_15XX_IH2_IRQ));

    /* The second interrupt controller's FIQ output is not wired up */

    sysbus_mmio_map(busdev, 0, 0xfffe0000);



    for (i = 0; i < 6; i++) {

        dma_irqs[i] = qdev_get_gpio_in(s->ih[omap1_dma_irq_map[i].ih],

                                       omap1_dma_irq_map[i].intr);

    }

    s->dma = omap_dma_init(0xfffed800, dma_irqs, system_memory,

                           qdev_get_gpio_in(s->ih[0], OMAP_INT_DMA_LCD),

                           s, omap_findclk(s, "dma_ck"), omap_dma_3_1);



    s->port[emiff    ].addr_valid = omap_validate_emiff_addr;

    s->port[emifs    ].addr_valid = omap_validate_emifs_addr;

    s->port[imif     ].addr_valid = omap_validate_imif_addr;

    s->port[tipb     ].addr_valid = omap_validate_tipb_addr;

    s->port[local    ].addr_valid = omap_validate_local_addr;

    s->port[tipb_mpui].addr_valid = omap_validate_tipb_mpui_addr;



    /* Register SDRAM and SRAM DMA ports for fast transfers.  */

    soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(&s->emiff_ram),

                         OMAP_EMIFF_BASE, s->sdram_size);

    soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(&s->imif_ram),

                         OMAP_IMIF_BASE, s->sram_size);



    s->timer[0] = omap_mpu_timer_init(system_memory, 0xfffec500,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER1),

                    omap_findclk(s, "mputim_ck"));

    s->timer[1] = omap_mpu_timer_init(system_memory, 0xfffec600,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER2),

                    omap_findclk(s, "mputim_ck"));

    s->timer[2] = omap_mpu_timer_init(system_memory, 0xfffec700,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER3),

                    omap_findclk(s, "mputim_ck"));



    s->wdt = omap_wd_timer_init(system_memory, 0xfffec800,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_WD_TIMER),

                    omap_findclk(s, "armwdt_ck"));



    s->os_timer = omap_os_timer_init(system_memory, 0xfffb9000,

                    qdev_get_gpio_in(s->ih[1], OMAP_INT_OS_TIMER),

                    omap_findclk(s, "clk32-kHz"));



    s->lcd = omap_lcdc_init(system_memory, 0xfffec000,

                            qdev_get_gpio_in(s->ih[0], OMAP_INT_LCD_CTRL),

                            omap_dma_get_lcdch(s->dma),

                            omap_findclk(s, "lcd_ck"));



    omap_ulpd_pm_init(system_memory, 0xfffe0800, s);

    omap_pin_cfg_init(system_memory, 0xfffe1000, s);

    omap_id_init(system_memory, s);



    omap_mpui_init(system_memory, 0xfffec900, s);



    s->private_tipb = omap_tipb_bridge_init(system_memory, 0xfffeca00,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_BRIDGE_PRIV),

                    omap_findclk(s, "tipb_ck"));

    s->public_tipb = omap_tipb_bridge_init(system_memory, 0xfffed300,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_BRIDGE_PUB),

                    omap_findclk(s, "tipb_ck"));



    omap_tcmi_init(system_memory, 0xfffecc00, s);



    s->uart[0] = omap_uart_init(0xfffb0000,

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_UART1),

                    omap_findclk(s, "uart1_ck"),

                    omap_findclk(s, "uart1_ck"),

                    s->drq[OMAP_DMA_UART1_TX], s->drq[OMAP_DMA_UART1_RX],

                    "uart1",

                    serial_hds[0]);

    s->uart[1] = omap_uart_init(0xfffb0800,

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_UART2),

                    omap_findclk(s, "uart2_ck"),

                    omap_findclk(s, "uart2_ck"),

                    s->drq[OMAP_DMA_UART2_TX], s->drq[OMAP_DMA_UART2_RX],

                    "uart2",

                    serial_hds[0] ? serial_hds[1] : NULL);

    s->uart[2] = omap_uart_init(0xfffb9800,

                                qdev_get_gpio_in(s->ih[0], OMAP_INT_UART3),

                    omap_findclk(s, "uart3_ck"),

                    omap_findclk(s, "uart3_ck"),

                    s->drq[OMAP_DMA_UART3_TX], s->drq[OMAP_DMA_UART3_RX],

                    "uart3",

                    serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL);



    s->dpll[0] = omap_dpll_init(system_memory, 0xfffecf00,

                                omap_findclk(s, "dpll1"));

    s->dpll[1] = omap_dpll_init(system_memory, 0xfffed000,

                                omap_findclk(s, "dpll2"));

    s->dpll[2] = omap_dpll_init(system_memory, 0xfffed100,

                                omap_findclk(s, "dpll3"));



    dinfo = drive_get(IF_SD, 0, 0);

    if (!dinfo) {

        fprintf(stderr, "qemu: missing SecureDigital device\n");

        exit(1);

    }

    s->mmc = omap_mmc_init(0xfffb7800, system_memory,

                           blk_by_legacy_dinfo(dinfo),

                           qdev_get_gpio_in(s->ih[1], OMAP_INT_OQN),

                           &s->drq[OMAP_DMA_MMC_TX],

                    omap_findclk(s, "mmc_ck"));



    s->mpuio = omap_mpuio_init(system_memory, 0xfffb5000,

                               qdev_get_gpio_in(s->ih[1], OMAP_INT_KEYBOARD),

                               qdev_get_gpio_in(s->ih[1], OMAP_INT_MPUIO),

                               s->wakeup, omap_findclk(s, "clk32-kHz"));



    s->gpio = qdev_create(NULL, "omap-gpio");

    qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model);

    qdev_prop_set_ptr(s->gpio, "clk", omap_findclk(s, "arm_gpio_ck"));

    qdev_init_nofail(s->gpio);

    sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0,

                       qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1));

    sysbus_mmio_map(SYS_BUS_DEVICE(s->gpio), 0, 0xfffce000);



    s->microwire = omap_uwire_init(system_memory, 0xfffb3000,

                                   qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireTX),

                                   qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireRX),

                    s->drq[OMAP_DMA_UWIRE_TX], omap_findclk(s, "mpuper_ck"));



    s->pwl = omap_pwl_init(system_memory, 0xfffb5800,

                           omap_findclk(s, "armxor_ck"));

    s->pwt = omap_pwt_init(system_memory, 0xfffb6000,

                           omap_findclk(s, "armxor_ck"));



    s->i2c[0] = qdev_create(NULL, "omap_i2c");

    qdev_prop_set_uint8(s->i2c[0], "revision", 0x11);

    qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "mpuper_ck"));

    qdev_init_nofail(s->i2c[0]);

    busdev = SYS_BUS_DEVICE(s->i2c[0]);

    sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C));

    sysbus_connect_irq(busdev, 1, s->drq[OMAP_DMA_I2C_TX]);

    sysbus_connect_irq(busdev, 2, s->drq[OMAP_DMA_I2C_RX]);

    sysbus_mmio_map(busdev, 0, 0xfffb3800);



    s->rtc = omap_rtc_init(system_memory, 0xfffb4800,

                           qdev_get_gpio_in(s->ih[1], OMAP_INT_RTC_TIMER),

                           qdev_get_gpio_in(s->ih[1], OMAP_INT_RTC_ALARM),

                    omap_findclk(s, "clk32-kHz"));



    s->mcbsp1 = omap_mcbsp_init(system_memory, 0xfffb1800,

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP1TX),

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP1RX),

                    &s->drq[OMAP_DMA_MCBSP1_TX], omap_findclk(s, "dspxor_ck"));

    s->mcbsp2 = omap_mcbsp_init(system_memory, 0xfffb1000,

                                qdev_get_gpio_in(s->ih[0],

                                                 OMAP_INT_310_McBSP2_TX),

                                qdev_get_gpio_in(s->ih[0],

                                                 OMAP_INT_310_McBSP2_RX),

                    &s->drq[OMAP_DMA_MCBSP2_TX], omap_findclk(s, "mpuper_ck"));

    s->mcbsp3 = omap_mcbsp_init(system_memory, 0xfffb7000,

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP3TX),

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP3RX),

                    &s->drq[OMAP_DMA_MCBSP3_TX], omap_findclk(s, "dspxor_ck"));



    s->led[0] = omap_lpg_init(system_memory,

                              0xfffbd000, omap_findclk(s, "clk32-kHz"));

    s->led[1] = omap_lpg_init(system_memory,

                              0xfffbd800, omap_findclk(s, "clk32-kHz"));



    /* Register mappings not currenlty implemented:

     * MCSI2 Comm	fffb2000 - fffb27ff (not mapped on OMAP310)

     * MCSI1 Bluetooth	fffb2800 - fffb2fff (not mapped on OMAP310)

     * USB W2FC		fffb4000 - fffb47ff

     * Camera Interface	fffb6800 - fffb6fff

     * USB Host		fffba000 - fffba7ff

     * FAC		fffba800 - fffbafff

     * HDQ/1-Wire	fffbc000 - fffbc7ff

     * TIPB switches	fffbc800 - fffbcfff

     * Mailbox		fffcf000 - fffcf7ff

     * Local bus IF	fffec100 - fffec1ff

     * Local bus MMU	fffec200 - fffec2ff

     * DSP MMU		fffed200 - fffed2ff

     */



    omap_setup_dsp_mapping(system_memory, omap15xx_dsp_mm);

    omap_setup_mpui_io(system_memory, s);



    qemu_register_reset(omap1_mpu_reset, s);



    return s;

}

struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,

                unsigned long sdram_size,

                const char *core)

{

    int i;

    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)

            g_malloc0(sizeof(struct omap_mpu_state_s));

    qemu_irq dma_irqs[6];

    DriveInfo *dinfo;

    SysBusDevice *busdev;



    if (!core)

        core = "ti925t";



    

    s->mpu_model = omap310;

    s->cpu = cpu_arm_init(core);

    if (s->cpu == NULL) {

        fprintf(stderr, "Unable to find CPU definition\n");

        exit(1);

    }

    s->sdram_size = sdram_size;

    s->sram_size = OMAP15XX_SRAM_SIZE;



    s->wakeup = qemu_allocate_irq(omap_mpu_wakeup, s, 0);



    

    omap_clk_init(s);



    

    memory_region_allocate_system_memory(&s->emiff_ram, NULL, "omap1.dram",

                                         s->sdram_size);

    memory_region_add_subregion(system_memory, OMAP_EMIFF_BASE, &s->emiff_ram);

    memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size,

                           &error_abort);

    vmstate_register_ram_global(&s->imif_ram);

    memory_region_add_subregion(system_memory, OMAP_IMIF_BASE, &s->imif_ram);



    omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s);



    s->ih[0] = qdev_create(NULL, "omap-intc");

    qdev_prop_set_uint32(s->ih[0], "size", 0x100);

    qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck"));

    qdev_init_nofail(s->ih[0]);

    busdev = SYS_BUS_DEVICE(s->ih[0]);

    sysbus_connect_irq(busdev, 0,

                       qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));

    sysbus_connect_irq(busdev, 1,

                       qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ));

    sysbus_mmio_map(busdev, 0, 0xfffecb00);

    s->ih[1] = qdev_create(NULL, "omap-intc");

    qdev_prop_set_uint32(s->ih[1], "size", 0x800);

    qdev_prop_set_ptr(s->ih[1], "clk", omap_findclk(s, "arminth_ck"));

    qdev_init_nofail(s->ih[1]);

    busdev = SYS_BUS_DEVICE(s->ih[1]);

    sysbus_connect_irq(busdev, 0,

                       qdev_get_gpio_in(s->ih[0], OMAP_INT_15XX_IH2_IRQ));

    

    sysbus_mmio_map(busdev, 0, 0xfffe0000);



    for (i = 0; i < 6; i++) {

        dma_irqs[i] = qdev_get_gpio_in(s->ih[omap1_dma_irq_map[i].ih],

                                       omap1_dma_irq_map[i].intr);

    }

    s->dma = omap_dma_init(0xfffed800, dma_irqs, system_memory,

                           qdev_get_gpio_in(s->ih[0], OMAP_INT_DMA_LCD),

                           s, omap_findclk(s, "dma_ck"), omap_dma_3_1);



    s->port[emiff    ].addr_valid = omap_validate_emiff_addr;

    s->port[emifs    ].addr_valid = omap_validate_emifs_addr;

    s->port[imif     ].addr_valid = omap_validate_imif_addr;

    s->port[tipb     ].addr_valid = omap_validate_tipb_addr;

    s->port[local    ].addr_valid = omap_validate_local_addr;

    s->port[tipb_mpui].addr_valid = omap_validate_tipb_mpui_addr;



    

    soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(&s->emiff_ram),

                         OMAP_EMIFF_BASE, s->sdram_size);

    soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(&s->imif_ram),

                         OMAP_IMIF_BASE, s->sram_size);



    s->timer[0] = omap_mpu_timer_init(system_memory, 0xfffec500,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER1),

                    omap_findclk(s, "mputim_ck"));

    s->timer[1] = omap_mpu_timer_init(system_memory, 0xfffec600,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER2),

                    omap_findclk(s, "mputim_ck"));

    s->timer[2] = omap_mpu_timer_init(system_memory, 0xfffec700,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER3),

                    omap_findclk(s, "mputim_ck"));



    s->wdt = omap_wd_timer_init(system_memory, 0xfffec800,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_WD_TIMER),

                    omap_findclk(s, "armwdt_ck"));



    s->os_timer = omap_os_timer_init(system_memory, 0xfffb9000,

                    qdev_get_gpio_in(s->ih[1], OMAP_INT_OS_TIMER),

                    omap_findclk(s, "clk32-kHz"));



    s->lcd = omap_lcdc_init(system_memory, 0xfffec000,

                            qdev_get_gpio_in(s->ih[0], OMAP_INT_LCD_CTRL),

                            omap_dma_get_lcdch(s->dma),

                            omap_findclk(s, "lcd_ck"));



    omap_ulpd_pm_init(system_memory, 0xfffe0800, s);

    omap_pin_cfg_init(system_memory, 0xfffe1000, s);

    omap_id_init(system_memory, s);



    omap_mpui_init(system_memory, 0xfffec900, s);



    s->private_tipb = omap_tipb_bridge_init(system_memory, 0xfffeca00,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_BRIDGE_PRIV),

                    omap_findclk(s, "tipb_ck"));

    s->public_tipb = omap_tipb_bridge_init(system_memory, 0xfffed300,

                    qdev_get_gpio_in(s->ih[0], OMAP_INT_BRIDGE_PUB),

                    omap_findclk(s, "tipb_ck"));



    omap_tcmi_init(system_memory, 0xfffecc00, s);



    s->uart[0] = omap_uart_init(0xfffb0000,

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_UART1),

                    omap_findclk(s, "uart1_ck"),

                    omap_findclk(s, "uart1_ck"),

                    s->drq[OMAP_DMA_UART1_TX], s->drq[OMAP_DMA_UART1_RX],

                    "uart1",

                    serial_hds[0]);

    s->uart[1] = omap_uart_init(0xfffb0800,

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_UART2),

                    omap_findclk(s, "uart2_ck"),

                    omap_findclk(s, "uart2_ck"),

                    s->drq[OMAP_DMA_UART2_TX], s->drq[OMAP_DMA_UART2_RX],

                    "uart2",

                    serial_hds[0] ? serial_hds[1] : NULL);

    s->uart[2] = omap_uart_init(0xfffb9800,

                                qdev_get_gpio_in(s->ih[0], OMAP_INT_UART3),

                    omap_findclk(s, "uart3_ck"),

                    omap_findclk(s, "uart3_ck"),

                    s->drq[OMAP_DMA_UART3_TX], s->drq[OMAP_DMA_UART3_RX],

                    "uart3",

                    serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL);



    s->dpll[0] = omap_dpll_init(system_memory, 0xfffecf00,

                                omap_findclk(s, "dpll1"));

    s->dpll[1] = omap_dpll_init(system_memory, 0xfffed000,

                                omap_findclk(s, "dpll2"));

    s->dpll[2] = omap_dpll_init(system_memory, 0xfffed100,

                                omap_findclk(s, "dpll3"));



    dinfo = drive_get(IF_SD, 0, 0);

    if (!dinfo) {

        fprintf(stderr, "qemu: missing SecureDigital device\n");

        exit(1);

    }

    s->mmc = omap_mmc_init(0xfffb7800, system_memory,

                           blk_by_legacy_dinfo(dinfo),

                           qdev_get_gpio_in(s->ih[1], OMAP_INT_OQN),

                           &s->drq[OMAP_DMA_MMC_TX],

                    omap_findclk(s, "mmc_ck"));



    s->mpuio = omap_mpuio_init(system_memory, 0xfffb5000,

                               qdev_get_gpio_in(s->ih[1], OMAP_INT_KEYBOARD),

                               qdev_get_gpio_in(s->ih[1], OMAP_INT_MPUIO),

                               s->wakeup, omap_findclk(s, "clk32-kHz"));



    s->gpio = qdev_create(NULL, "omap-gpio");

    qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model);

    qdev_prop_set_ptr(s->gpio, "clk", omap_findclk(s, "arm_gpio_ck"));

    qdev_init_nofail(s->gpio);

    sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0,

                       qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1));

    sysbus_mmio_map(SYS_BUS_DEVICE(s->gpio), 0, 0xfffce000);



    s->microwire = omap_uwire_init(system_memory, 0xfffb3000,

                                   qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireTX),

                                   qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireRX),

                    s->drq[OMAP_DMA_UWIRE_TX], omap_findclk(s, "mpuper_ck"));



    s->pwl = omap_pwl_init(system_memory, 0xfffb5800,

                           omap_findclk(s, "armxor_ck"));

    s->pwt = omap_pwt_init(system_memory, 0xfffb6000,

                           omap_findclk(s, "armxor_ck"));



    s->i2c[0] = qdev_create(NULL, "omap_i2c");

    qdev_prop_set_uint8(s->i2c[0], "revision", 0x11);

    qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "mpuper_ck"));

    qdev_init_nofail(s->i2c[0]);

    busdev = SYS_BUS_DEVICE(s->i2c[0]);

    sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C));

    sysbus_connect_irq(busdev, 1, s->drq[OMAP_DMA_I2C_TX]);

    sysbus_connect_irq(busdev, 2, s->drq[OMAP_DMA_I2C_RX]);

    sysbus_mmio_map(busdev, 0, 0xfffb3800);



    s->rtc = omap_rtc_init(system_memory, 0xfffb4800,

                           qdev_get_gpio_in(s->ih[1], OMAP_INT_RTC_TIMER),

                           qdev_get_gpio_in(s->ih[1], OMAP_INT_RTC_ALARM),

                    omap_findclk(s, "clk32-kHz"));



    s->mcbsp1 = omap_mcbsp_init(system_memory, 0xfffb1800,

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP1TX),

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP1RX),

                    &s->drq[OMAP_DMA_MCBSP1_TX], omap_findclk(s, "dspxor_ck"));

    s->mcbsp2 = omap_mcbsp_init(system_memory, 0xfffb1000,

                                qdev_get_gpio_in(s->ih[0],

                                                 OMAP_INT_310_McBSP2_TX),

                                qdev_get_gpio_in(s->ih[0],

                                                 OMAP_INT_310_McBSP2_RX),

                    &s->drq[OMAP_DMA_MCBSP2_TX], omap_findclk(s, "mpuper_ck"));

    s->mcbsp3 = omap_mcbsp_init(system_memory, 0xfffb7000,

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP3TX),

                                qdev_get_gpio_in(s->ih[1], OMAP_INT_McBSP3RX),

                    &s->drq[OMAP_DMA_MCBSP3_TX], omap_findclk(s, "dspxor_ck"));



    s->led[0] = omap_lpg_init(system_memory,

                              0xfffbd000, omap_findclk(s, "clk32-kHz"));

    s->led[1] = omap_lpg_init(system_memory,

                              0xfffbd800, omap_findclk(s, "clk32-kHz"));



    





























    omap_setup_dsp_mapping(system_memory, omap15xx_dsp_mm);

    omap_setup_mpui_io(system_memory, s);



    qemu_register_reset(omap1_mpu_reset, s);



    return s;

}

    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)             g_malloc0(sizeof(struct omap_mpu_state_s));     struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)             g_malloc0(sizeof(struct omap_mpu_state_s));
struct omap_mpu_state_s *FUNC_0(MemoryRegion *VAR_0,

                unsigned long VAR_1,

                const char *VAR_2)

{

    int VAR_3;

    struct omap_mpu_state_s *VAR_4 = (struct omap_mpu_state_s *)

            g_malloc0(sizeof(struct omap_mpu_state_s));

    qemu_irq dma_irqs[6];

    DriveInfo *dinfo;

    SysBusDevice *busdev;



    if (!VAR_2)

        VAR_2 = "ti925t";



    

    VAR_4->mpu_model = omap310;

    VAR_4->cpu = cpu_arm_init(VAR_2);

    if (VAR_4->cpu == NULL) {

        fprintf(stderr, "Unable to find CPU definition\n");

        exit(1);

    }

    VAR_4->VAR_1 = VAR_1;

    VAR_4->sram_size = OMAP15XX_SRAM_SIZE;



    VAR_4->wakeup = qemu_allocate_irq(omap_mpu_wakeup, VAR_4, 0);



    

    omap_clk_init(VAR_4);



    

    memory_region_allocate_system_memory(&VAR_4->emiff_ram, NULL, "omap1.dram",

                                         VAR_4->VAR_1);

    memory_region_add_subregion(VAR_0, OMAP_EMIFF_BASE, &VAR_4->emiff_ram);

    memory_region_init_ram(&VAR_4->imif_ram, NULL, "omap1.sram", VAR_4->sram_size,

                           &error_abort);

    vmstate_register_ram_global(&VAR_4->imif_ram);

    memory_region_add_subregion(VAR_0, OMAP_IMIF_BASE, &VAR_4->imif_ram);



    omap_clkm_init(VAR_0, 0xfffece00, 0xe1008000, VAR_4);



    VAR_4->ih[0] = qdev_create(NULL, "omap-intc");

    qdev_prop_set_uint32(VAR_4->ih[0], "size", 0x100);

    qdev_prop_set_ptr(VAR_4->ih[0], "clk", omap_findclk(VAR_4, "arminth_ck"));

    qdev_init_nofail(VAR_4->ih[0]);

    busdev = SYS_BUS_DEVICE(VAR_4->ih[0]);

    sysbus_connect_irq(busdev, 0,

                       qdev_get_gpio_in(DEVICE(VAR_4->cpu), ARM_CPU_IRQ));

    sysbus_connect_irq(busdev, 1,

                       qdev_get_gpio_in(DEVICE(VAR_4->cpu), ARM_CPU_FIQ));

    sysbus_mmio_map(busdev, 0, 0xfffecb00);

    VAR_4->ih[1] = qdev_create(NULL, "omap-intc");

    qdev_prop_set_uint32(VAR_4->ih[1], "size", 0x800);

    qdev_prop_set_ptr(VAR_4->ih[1], "clk", omap_findclk(VAR_4, "arminth_ck"));

    qdev_init_nofail(VAR_4->ih[1]);

    busdev = SYS_BUS_DEVICE(VAR_4->ih[1]);

    sysbus_connect_irq(busdev, 0,

                       qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_15XX_IH2_IRQ));

    

    sysbus_mmio_map(busdev, 0, 0xfffe0000);



    for (VAR_3 = 0; VAR_3 < 6; VAR_3++) {

        dma_irqs[VAR_3] = qdev_get_gpio_in(VAR_4->ih[omap1_dma_irq_map[VAR_3].ih],

                                       omap1_dma_irq_map[VAR_3].intr);

    }

    VAR_4->dma = omap_dma_init(0xfffed800, dma_irqs, VAR_0,

                           qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_DMA_LCD),

                           VAR_4, omap_findclk(VAR_4, "dma_ck"), omap_dma_3_1);



    VAR_4->port[emiff    ].addr_valid = omap_validate_emiff_addr;

    VAR_4->port[emifs    ].addr_valid = omap_validate_emifs_addr;

    VAR_4->port[imif     ].addr_valid = omap_validate_imif_addr;

    VAR_4->port[tipb     ].addr_valid = omap_validate_tipb_addr;

    VAR_4->port[local    ].addr_valid = omap_validate_local_addr;

    VAR_4->port[tipb_mpui].addr_valid = omap_validate_tipb_mpui_addr;



    

    soc_dma_port_add_mem(VAR_4->dma, memory_region_get_ram_ptr(&VAR_4->emiff_ram),

                         OMAP_EMIFF_BASE, VAR_4->VAR_1);

    soc_dma_port_add_mem(VAR_4->dma, memory_region_get_ram_ptr(&VAR_4->imif_ram),

                         OMAP_IMIF_BASE, VAR_4->sram_size);



    VAR_4->timer[0] = omap_mpu_timer_init(VAR_0, 0xfffec500,

                    qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_TIMER1),

                    omap_findclk(VAR_4, "mputim_ck"));

    VAR_4->timer[1] = omap_mpu_timer_init(VAR_0, 0xfffec600,

                    qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_TIMER2),

                    omap_findclk(VAR_4, "mputim_ck"));

    VAR_4->timer[2] = omap_mpu_timer_init(VAR_0, 0xfffec700,

                    qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_TIMER3),

                    omap_findclk(VAR_4, "mputim_ck"));



    VAR_4->wdt = omap_wd_timer_init(VAR_0, 0xfffec800,

                    qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_WD_TIMER),

                    omap_findclk(VAR_4, "armwdt_ck"));



    VAR_4->os_timer = omap_os_timer_init(VAR_0, 0xfffb9000,

                    qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_OS_TIMER),

                    omap_findclk(VAR_4, "clk32-kHz"));



    VAR_4->lcd = omap_lcdc_init(VAR_0, 0xfffec000,

                            qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_LCD_CTRL),

                            omap_dma_get_lcdch(VAR_4->dma),

                            omap_findclk(VAR_4, "lcd_ck"));



    omap_ulpd_pm_init(VAR_0, 0xfffe0800, VAR_4);

    omap_pin_cfg_init(VAR_0, 0xfffe1000, VAR_4);

    omap_id_init(VAR_0, VAR_4);



    omap_mpui_init(VAR_0, 0xfffec900, VAR_4);



    VAR_4->private_tipb = omap_tipb_bridge_init(VAR_0, 0xfffeca00,

                    qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_BRIDGE_PRIV),

                    omap_findclk(VAR_4, "tipb_ck"));

    VAR_4->public_tipb = omap_tipb_bridge_init(VAR_0, 0xfffed300,

                    qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_BRIDGE_PUB),

                    omap_findclk(VAR_4, "tipb_ck"));



    omap_tcmi_init(VAR_0, 0xfffecc00, VAR_4);



    VAR_4->uart[0] = omap_uart_init(0xfffb0000,

                                qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_UART1),

                    omap_findclk(VAR_4, "uart1_ck"),

                    omap_findclk(VAR_4, "uart1_ck"),

                    VAR_4->drq[OMAP_DMA_UART1_TX], VAR_4->drq[OMAP_DMA_UART1_RX],

                    "uart1",

                    serial_hds[0]);

    VAR_4->uart[1] = omap_uart_init(0xfffb0800,

                                qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_UART2),

                    omap_findclk(VAR_4, "uart2_ck"),

                    omap_findclk(VAR_4, "uart2_ck"),

                    VAR_4->drq[OMAP_DMA_UART2_TX], VAR_4->drq[OMAP_DMA_UART2_RX],

                    "uart2",

                    serial_hds[0] ? serial_hds[1] : NULL);

    VAR_4->uart[2] = omap_uart_init(0xfffb9800,

                                qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_UART3),

                    omap_findclk(VAR_4, "uart3_ck"),

                    omap_findclk(VAR_4, "uart3_ck"),

                    VAR_4->drq[OMAP_DMA_UART3_TX], VAR_4->drq[OMAP_DMA_UART3_RX],

                    "uart3",

                    serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL);



    VAR_4->dpll[0] = omap_dpll_init(VAR_0, 0xfffecf00,

                                omap_findclk(VAR_4, "dpll1"));

    VAR_4->dpll[1] = omap_dpll_init(VAR_0, 0xfffed000,

                                omap_findclk(VAR_4, "dpll2"));

    VAR_4->dpll[2] = omap_dpll_init(VAR_0, 0xfffed100,

                                omap_findclk(VAR_4, "dpll3"));



    dinfo = drive_get(IF_SD, 0, 0);

    if (!dinfo) {

        fprintf(stderr, "qemu: missing SecureDigital device\n");

        exit(1);

    }

    VAR_4->mmc = omap_mmc_init(0xfffb7800, VAR_0,

                           blk_by_legacy_dinfo(dinfo),

                           qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_OQN),

                           &VAR_4->drq[OMAP_DMA_MMC_TX],

                    omap_findclk(VAR_4, "mmc_ck"));



    VAR_4->mpuio = omap_mpuio_init(VAR_0, 0xfffb5000,

                               qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_KEYBOARD),

                               qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_MPUIO),

                               VAR_4->wakeup, omap_findclk(VAR_4, "clk32-kHz"));



    VAR_4->gpio = qdev_create(NULL, "omap-gpio");

    qdev_prop_set_int32(VAR_4->gpio, "mpu_model", VAR_4->mpu_model);

    qdev_prop_set_ptr(VAR_4->gpio, "clk", omap_findclk(VAR_4, "arm_gpio_ck"));

    qdev_init_nofail(VAR_4->gpio);

    sysbus_connect_irq(SYS_BUS_DEVICE(VAR_4->gpio), 0,

                       qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_GPIO_BANK1));

    sysbus_mmio_map(SYS_BUS_DEVICE(VAR_4->gpio), 0, 0xfffce000);



    VAR_4->microwire = omap_uwire_init(VAR_0, 0xfffb3000,

                                   qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_uWireTX),

                                   qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_uWireRX),

                    VAR_4->drq[OMAP_DMA_UWIRE_TX], omap_findclk(VAR_4, "mpuper_ck"));



    VAR_4->pwl = omap_pwl_init(VAR_0, 0xfffb5800,

                           omap_findclk(VAR_4, "armxor_ck"));

    VAR_4->pwt = omap_pwt_init(VAR_0, 0xfffb6000,

                           omap_findclk(VAR_4, "armxor_ck"));



    VAR_4->i2c[0] = qdev_create(NULL, "omap_i2c");

    qdev_prop_set_uint8(VAR_4->i2c[0], "revision", 0x11);

    qdev_prop_set_ptr(VAR_4->i2c[0], "fclk", omap_findclk(VAR_4, "mpuper_ck"));

    qdev_init_nofail(VAR_4->i2c[0]);

    busdev = SYS_BUS_DEVICE(VAR_4->i2c[0]);

    sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_I2C));

    sysbus_connect_irq(busdev, 1, VAR_4->drq[OMAP_DMA_I2C_TX]);

    sysbus_connect_irq(busdev, 2, VAR_4->drq[OMAP_DMA_I2C_RX]);

    sysbus_mmio_map(busdev, 0, 0xfffb3800);



    VAR_4->rtc = omap_rtc_init(VAR_0, 0xfffb4800,

                           qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_RTC_TIMER),

                           qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_RTC_ALARM),

                    omap_findclk(VAR_4, "clk32-kHz"));



    VAR_4->mcbsp1 = omap_mcbsp_init(VAR_0, 0xfffb1800,

                                qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_McBSP1TX),

                                qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_McBSP1RX),

                    &VAR_4->drq[OMAP_DMA_MCBSP1_TX], omap_findclk(VAR_4, "dspxor_ck"));

    VAR_4->mcbsp2 = omap_mcbsp_init(VAR_0, 0xfffb1000,

                                qdev_get_gpio_in(VAR_4->ih[0],

                                                 OMAP_INT_310_McBSP2_TX),

                                qdev_get_gpio_in(VAR_4->ih[0],

                                                 OMAP_INT_310_McBSP2_RX),

                    &VAR_4->drq[OMAP_DMA_MCBSP2_TX], omap_findclk(VAR_4, "mpuper_ck"));

    VAR_4->mcbsp3 = omap_mcbsp_init(VAR_0, 0xfffb7000,

                                qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_McBSP3TX),

                                qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_McBSP3RX),

                    &VAR_4->drq[OMAP_DMA_MCBSP3_TX], omap_findclk(VAR_4, "dspxor_ck"));



    VAR_4->led[0] = omap_lpg_init(VAR_0,

                              0xfffbd000, omap_findclk(VAR_4, "clk32-kHz"));

    VAR_4->led[1] = omap_lpg_init(VAR_0,

                              0xfffbd800, omap_findclk(VAR_4, "clk32-kHz"));



    





























    omap_setup_dsp_mapping(VAR_0, omap15xx_dsp_mm);

    omap_setup_mpui_io(VAR_0, VAR_4);



    qemu_register_reset(omap1_mpu_reset, VAR_4);



    return VAR_4;

}

struct omap_mpu_state_s *FUNC_0(MemoryRegion *VAR_0,
unsigned long VAR_1,
const char *VAR_2)
{ int VAR_3; struct omap_mpu_state_s *VAR_4 = (struct omap_mpu_state_s *)
g_malloc0(sizeof(struct omap_mpu_state_s)); qemu_irq dma_irqs[6]; DriveInfo *dinfo; SysBusDevice *busdev; if (!VAR_2)
VAR_2 = "ti925t"; VAR_4->mpu_model = omap310; VAR_4->cpu = cpu_arm_init(VAR_2); if (VAR_4->cpu == NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } VAR_4->VAR_1 = VAR_1; VAR_4->sram_size = OMAP15XX_SRAM_SIZE; VAR_4->wakeup = qemu_allocate_irq(omap_mpu_wakeup, VAR_4, 0); omap_clk_init(VAR_4); memory_region_allocate_system_memory(&VAR_4->emiff_ram, NULL, "omap1.dram",
VAR_4->VAR_1); memory_region_add_subregion(VAR_0, OMAP_EMIFF_BASE, &VAR_4->emiff_ram); memory_region_init_ram(&VAR_4->imif_ram, NULL, "omap1.sram", VAR_4->sram_size,
&error_abort); vmstate_register_ram_global(&VAR_4->imif_ram); memory_region_add_subregion(VAR_0, OMAP_IMIF_BASE, &VAR_4->imif_ram); omap_clkm_init(VAR_0, 0xfffece00, 0xe1008000, VAR_4); VAR_4->ih[0] = qdev_create(NULL, "omap-intc"); qdev_prop_set_uint32(VAR_4->ih[0], "size", 0x100); qdev_prop_set_ptr(VAR_4->ih[0], "clk", omap_findclk(VAR_4, "arminth_ck")); qdev_init_nofail(VAR_4->ih[0]); busdev = SYS_BUS_DEVICE(VAR_4->ih[0]); sysbus_connect_irq(busdev, 0,
qdev_get_gpio_in(DEVICE(VAR_4->cpu), ARM_CPU_IRQ)); sysbus_connect_irq(busdev, 1,
qdev_get_gpio_in(DEVICE(VAR_4->cpu), ARM_CPU_FIQ)); sysbus_mmio_map(busdev, 0, 0xfffecb00); VAR_4->ih[1] = qdev_create(NULL, "omap-intc"); qdev_prop_set_uint32(VAR_4->ih[1], "size", 0x800); qdev_prop_set_ptr(VAR_4->ih[1], "clk", omap_findclk(VAR_4, "arminth_ck")); qdev_init_nofail(VAR_4->ih[1]); busdev = SYS_BUS_DEVICE(VAR_4->ih[1]); sysbus_connect_irq(busdev, 0,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_15XX_IH2_IRQ)); sysbus_mmio_map(busdev, 0, 0xfffe0000); for (VAR_3 = 0; VAR_3 < 6; VAR_3++) { dma_irqs[VAR_3] = qdev_get_gpio_in(VAR_4->ih[omap1_dma_irq_map[VAR_3].ih],
omap1_dma_irq_map[VAR_3].intr); } VAR_4->dma = omap_dma_init(0xfffed800, dma_irqs, VAR_0,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_DMA_LCD),
VAR_4, omap_findclk(VAR_4, "dma_ck"), omap_dma_3_1); VAR_4->port[emiff    ].addr_valid = omap_validate_emiff_addr; VAR_4->port[emifs    ].addr_valid = omap_validate_emifs_addr; VAR_4->port[imif     ].addr_valid = omap_validate_imif_addr; VAR_4->port[tipb     ].addr_valid = omap_validate_tipb_addr; VAR_4->port[local    ].addr_valid = omap_validate_local_addr; VAR_4->port[tipb_mpui].addr_valid = omap_validate_tipb_mpui_addr; soc_dma_port_add_mem(VAR_4->dma, memory_region_get_ram_ptr(&VAR_4->emiff_ram),
OMAP_EMIFF_BASE, VAR_4->VAR_1); soc_dma_port_add_mem(VAR_4->dma, memory_region_get_ram_ptr(&VAR_4->imif_ram),
OMAP_IMIF_BASE, VAR_4->sram_size); VAR_4->timer[0] = omap_mpu_timer_init(VAR_0, 0xfffec500,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_TIMER1),
omap_findclk(VAR_4, "mputim_ck")); VAR_4->timer[1] = omap_mpu_timer_init(VAR_0, 0xfffec600,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_TIMER2),
omap_findclk(VAR_4, "mputim_ck")); VAR_4->timer[2] = omap_mpu_timer_init(VAR_0, 0xfffec700,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_TIMER3),
omap_findclk(VAR_4, "mputim_ck")); VAR_4->wdt = omap_wd_timer_init(VAR_0, 0xfffec800,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_WD_TIMER),
omap_findclk(VAR_4, "armwdt_ck")); VAR_4->os_timer = omap_os_timer_init(VAR_0, 0xfffb9000,
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_OS_TIMER),
omap_findclk(VAR_4, "clk32-kHz")); VAR_4->lcd = omap_lcdc_init(VAR_0, 0xfffec000,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_LCD_CTRL),
omap_dma_get_lcdch(VAR_4->dma),
omap_findclk(VAR_4, "lcd_ck")); omap_ulpd_pm_init(VAR_0, 0xfffe0800, VAR_4); omap_pin_cfg_init(VAR_0, 0xfffe1000, VAR_4); omap_id_init(VAR_0, VAR_4); omap_mpui_init(VAR_0, 0xfffec900, VAR_4); VAR_4->private_tipb = omap_tipb_bridge_init(VAR_0, 0xfffeca00,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_BRIDGE_PRIV),
omap_findclk(VAR_4, "tipb_ck")); VAR_4->public_tipb = omap_tipb_bridge_init(VAR_0, 0xfffed300,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_BRIDGE_PUB),
omap_findclk(VAR_4, "tipb_ck")); omap_tcmi_init(VAR_0, 0xfffecc00, VAR_4); VAR_4->uart[0] = omap_uart_init(0xfffb0000,
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_UART1),
omap_findclk(VAR_4, "uart1_ck"),
omap_findclk(VAR_4, "uart1_ck"),
VAR_4->drq[OMAP_DMA_UART1_TX], VAR_4->drq[OMAP_DMA_UART1_RX],
"uart1",
serial_hds[0]); VAR_4->uart[1] = omap_uart_init(0xfffb0800,
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_UART2),
omap_findclk(VAR_4, "uart2_ck"),
omap_findclk(VAR_4, "uart2_ck"),
VAR_4->drq[OMAP_DMA_UART2_TX], VAR_4->drq[OMAP_DMA_UART2_RX],
"uart2",
serial_hds[0] ? serial_hds[1] : NULL); VAR_4->uart[2] = omap_uart_init(0xfffb9800,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_UART3),
omap_findclk(VAR_4, "uart3_ck"),
omap_findclk(VAR_4, "uart3_ck"),
VAR_4->drq[OMAP_DMA_UART3_TX], VAR_4->drq[OMAP_DMA_UART3_RX],
"uart3",
serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL); VAR_4->dpll[0] = omap_dpll_init(VAR_0, 0xfffecf00,
omap_findclk(VAR_4, "dpll1")); VAR_4->dpll[1] = omap_dpll_init(VAR_0, 0xfffed000,
omap_findclk(VAR_4, "dpll2")); VAR_4->dpll[2] = omap_dpll_init(VAR_0, 0xfffed100,
omap_findclk(VAR_4, "dpll3")); dinfo = drive_get(IF_SD, 0, 0); if (!dinfo) { fprintf(stderr, "qemu: missing SecureDigital device\n"); exit(1); } VAR_4->mmc = omap_mmc_init(0xfffb7800, VAR_0,
blk_by_legacy_dinfo(dinfo),
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_OQN),
&VAR_4->drq[OMAP_DMA_MMC_TX],
omap_findclk(VAR_4, "mmc_ck")); VAR_4->mpuio = omap_mpuio_init(VAR_0, 0xfffb5000,
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_KEYBOARD),
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_MPUIO),
VAR_4->wakeup, omap_findclk(VAR_4, "clk32-kHz")); VAR_4->gpio = qdev_create(NULL, "omap-gpio"); qdev_prop_set_int32(VAR_4->gpio, "mpu_model", VAR_4->mpu_model); qdev_prop_set_ptr(VAR_4->gpio, "clk", omap_findclk(VAR_4, "arm_gpio_ck")); qdev_init_nofail(VAR_4->gpio); sysbus_connect_irq(SYS_BUS_DEVICE(VAR_4->gpio), 0,
qdev_get_gpio_in(VAR_4->ih[0], OMAP_INT_GPIO_BANK1)); sysbus_mmio_map(SYS_BUS_DEVICE(VAR_4->gpio), 0, 0xfffce000); VAR_4->microwire = omap_uwire_init(VAR_0, 0xfffb3000,
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_uWireTX),
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_uWireRX),
VAR_4->drq[OMAP_DMA_UWIRE_TX], omap_findclk(VAR_4, "mpuper_ck")); VAR_4->pwl = omap_pwl_init(VAR_0, 0xfffb5800,
omap_findclk(VAR_4, "armxor_ck")); VAR_4->pwt = omap_pwt_init(VAR_0, 0xfffb6000,
omap_findclk(VAR_4, "armxor_ck")); VAR_4->i2c[0] = qdev_create(NULL, "omap_i2c"); qdev_prop_set_uint8(VAR_4->i2c[0], "revision", 0x11); qdev_prop_set_ptr(VAR_4->i2c[0], "fclk", omap_findclk(VAR_4, "mpuper_ck")); qdev_init_nofail(VAR_4->i2c[0]); busdev = SYS_BUS_DEVICE(VAR_4->i2c[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_I2C)); sysbus_connect_irq(busdev, 1, VAR_4->drq[OMAP_DMA_I2C_TX]); sysbus_connect_irq(busdev, 2, VAR_4->drq[OMAP_DMA_I2C_RX]); sysbus_mmio_map(busdev, 0, 0xfffb3800); VAR_4->rtc = omap_rtc_init(VAR_0, 0xfffb4800,
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_RTC_TIMER),
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_RTC_ALARM),
omap_findclk(VAR_4, "clk32-kHz")); VAR_4->mcbsp1 = omap_mcbsp_init(VAR_0, 0xfffb1800,
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_McBSP1TX),
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_McBSP1RX),
&VAR_4->drq[OMAP_DMA_MCBSP1_TX], omap_findclk(VAR_4, "dspxor_ck")); VAR_4->mcbsp2 = omap_mcbsp_init(VAR_0, 0xfffb1000,
qdev_get_gpio_in(VAR_4->ih[0],
OMAP_INT_310_McBSP2_TX),
qdev_get_gpio_in(VAR_4->ih[0],
OMAP_INT_310_McBSP2_RX),
&VAR_4->drq[OMAP_DMA_MCBSP2_TX], omap_findclk(VAR_4, "mpuper_ck")); VAR_4->mcbsp3 = omap_mcbsp_init(VAR_0, 0xfffb7000,
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_McBSP3TX),
qdev_get_gpio_in(VAR_4->ih[1], OMAP_INT_McBSP3RX),
&VAR_4->drq[OMAP_DMA_MCBSP3_TX], omap_findclk(VAR_4, "dspxor_ck")); VAR_4->led[0] = omap_lpg_init(VAR_0,
0xfffbd000, omap_findclk(VAR_4, "clk32-kHz")); VAR_4->led[1] = omap_lpg_init(VAR_0,
0xfffbd800, omap_findclk(VAR_4, "clk32-kHz")); omap_setup_dsp_mapping(VAR_0, omap15xx_dsp_mm); omap_setup_mpui_io(VAR_0, VAR_4); qemu_register_reset(omap1_mpu_reset, VAR_4); return VAR_4; }