static int get_pci_irq_state(QEMUFile *f, void *pv, size_t size)

{

    PCIDevice *s = container_of(pv, PCIDevice, config);

    uint32_t irq_state[PCI_NUM_PINS];

    int i;

    for (i = 0; i < PCI_NUM_PINS; ++i) {

        irq_state[i] = qemu_get_be32(f);

        if (irq_state[i] != 0x1 && irq_state[i] != 0) {

            fprintf(stderr, "irq state %d: must be 0 or 1.\n",

                    irq_state[i]);

            return -EINVAL;

        }

    }



    for (i = 0; i < PCI_NUM_PINS; ++i) {

        pci_set_irq_state(s, i, irq_state[i]);

    }



    return 0;

}

static int get_pci_irq_state(QEMUFile *f, void *pv, size_t size)

{

    PCIDevice *s = container_of(pv, PCIDevice, config);

    uint32_t irq_state[PCI_NUM_PINS];

    int i;

    for (i = 0; i < PCI_NUM_PINS; ++i) {

        irq_state[i] = qemu_get_be32(f);

        if (irq_state[i] != 0x1 && irq_state[i] != 0) {

            fprintf(stderr, "irq state %d: must be 0 or 1.\n",

                    irq_state[i]);

            return -EINVAL;

        }

    }



    for (i = 0; i < PCI_NUM_PINS; ++i) {

        pci_set_irq_state(s, i, irq_state[i]);

    }



    return 0;

}

static int FUNC_0(QEMUFile *VAR_0, void *VAR_1, size_t VAR_2)

{

    PCIDevice *s = container_of(VAR_1, PCIDevice, config);

    uint32_t irq_state[PCI_NUM_PINS];

    int VAR_3;

    for (VAR_3 = 0; VAR_3 < PCI_NUM_PINS; ++VAR_3) {

        irq_state[VAR_3] = qemu_get_be32(VAR_0);

        if (irq_state[VAR_3] != 0x1 && irq_state[VAR_3] != 0) {

            fprintf(stderr, "irq state %d: must be 0 or 1.\n",

                    irq_state[VAR_3]);

            return -EINVAL;

        }

    }



    for (VAR_3 = 0; VAR_3 < PCI_NUM_PINS; ++VAR_3) {

        pci_set_irq_state(s, VAR_3, irq_state[VAR_3]);

    }



    return 0;

}

static int FUNC_0(QEMUFile *VAR_0, void *VAR_1, size_t VAR_2)
{ PCIDevice *s = container_of(VAR_1, PCIDevice, config); uint32_t irq_state[PCI_NUM_PINS]; int VAR_3; for (VAR_3 = 0; VAR_3 < PCI_NUM_PINS; ++VAR_3) { irq_state[VAR_3] = qemu_get_be32(VAR_0); if (irq_state[VAR_3] != 0x1 && irq_state[VAR_3] != 0) { fprintf(stderr, "irq state %d: must be 0 or 1.\n",
irq_state[VAR_3]); return -EINVAL; } } for (VAR_3 = 0; VAR_3 < PCI_NUM_PINS; ++VAR_3) { pci_set_irq_state(s, VAR_3, irq_state[VAR_3]); } return 0; }