static void save_native_fp_fxsave(CPUState *env)

{

    struct fpxstate *fp = &fpx1;

    int fptag, i, j;

    uint16_t fpuc;



    asm volatile ("fxsave %0" : : "m" (*fp));

    env->fpuc = fp->fpuc;

    env->fpstt = (fp->fpus >> 11) & 7;

    env->fpus = fp->fpus & ~0x3800;

    fptag = fp->fptag ^ 0xff;

    for(i = 0;i < 8; i++) {

        env->fptags[i] = (fptag >> i) & 1;

    }

    j = env->fpstt;

    for(i = 0;i < 8; i++) {

        memcpy(&env->fpregs[j].d, &fp->fpregs1[i * 16], 10);

        j = (j + 1) & 7;

    }

    if (env->cpuid_features & CPUID_SSE) {

        env->mxcsr = fp->mxcsr;

        memcpy(env->xmm_regs, fp->xmm_regs, CPU_NB_REGS * 16);

    }



    /* we must restore the default rounding state */

    asm volatile ("fninit");

    fpuc = 0x037f | (env->fpuc & (3 << 10));

    asm volatile("fldcw %0" : : "m" (fpuc));

}

static void save_native_fp_fxsave(CPUState *env)

{

    struct fpxstate *fp = &fpx1;

    int fptag, i, j;

    uint16_t fpuc;



    asm volatile ("fxsave %0" : : "m" (*fp));

    env->fpuc = fp->fpuc;

    env->fpstt = (fp->fpus >> 11) & 7;

    env->fpus = fp->fpus & ~0x3800;

    fptag = fp->fptag ^ 0xff;

    for(i = 0;i < 8; i++) {

        env->fptags[i] = (fptag >> i) & 1;

    }

    j = env->fpstt;

    for(i = 0;i < 8; i++) {

        memcpy(&env->fpregs[j].d, &fp->fpregs1[i * 16], 10);

        j = (j + 1) & 7;

    }

    if (env->cpuid_features & CPUID_SSE) {

        env->mxcsr = fp->mxcsr;

        memcpy(env->xmm_regs, fp->xmm_regs, CPU_NB_REGS * 16);

    }



    

    asm volatile ("fninit");

    fpuc = 0x037f | (env->fpuc & (3 << 10));

    asm volatile("fldcw %0" : : "m" (fpuc));

}

static void FUNC_0(CPUState *VAR_0)

{

    struct fpxstate *VAR_1 = &fpx1;

    int VAR_2, VAR_3, VAR_4;

    uint16_t fpuc;



    asm volatile ("fxsave %0" : : "m" (*VAR_1));

    VAR_0->fpuc = VAR_1->fpuc;

    VAR_0->fpstt = (VAR_1->fpus >> 11) & 7;

    VAR_0->fpus = VAR_1->fpus & ~0x3800;

    VAR_2 = VAR_1->VAR_2 ^ 0xff;

    for(VAR_3 = 0;VAR_3 < 8; VAR_3++) {

        VAR_0->fptags[VAR_3] = (VAR_2 >> VAR_3) & 1;

    }

    VAR_4 = VAR_0->fpstt;

    for(VAR_3 = 0;VAR_3 < 8; VAR_3++) {

        memcpy(&VAR_0->fpregs[VAR_4].d, &VAR_1->fpregs1[VAR_3 * 16], 10);

        VAR_4 = (VAR_4 + 1) & 7;

    }

    if (VAR_0->cpuid_features & CPUID_SSE) {

        VAR_0->mxcsr = VAR_1->mxcsr;

        memcpy(VAR_0->xmm_regs, VAR_1->xmm_regs, CPU_NB_REGS * 16);

    }



    

    asm volatile ("fninit");

    fpuc = 0x037f | (VAR_0->fpuc & (3 << 10));

    asm volatile("fldcw %0" : : "m" (fpuc));

}

static void FUNC_0(CPUState *VAR_0)
{ struct fpxstate *VAR_1 = &fpx1; int VAR_2, VAR_3, VAR_4; uint16_t fpuc; asm volatile ("fxsave %0" : : "m" (*VAR_1)); VAR_0->fpuc = VAR_1->fpuc; VAR_0->fpstt = (VAR_1->fpus >> 11) & 7; VAR_0->fpus = VAR_1->fpus & ~0x3800; VAR_2 = VAR_1->VAR_2 ^ 0xff; for(VAR_3 = 0;VAR_3 < 8; VAR_3++) { VAR_0->fptags[VAR_3] = (VAR_2 >> VAR_3) & 1; } VAR_4 = VAR_0->fpstt; for(VAR_3 = 0;VAR_3 < 8; VAR_3++) { memcpy(&VAR_0->fpregs[VAR_4].d, &VAR_1->fpregs1[VAR_3 * 16], 10); VAR_4 = (VAR_4 + 1) & 7; } if (VAR_0->cpuid_features & CPUID_SSE) { VAR_0->mxcsr = VAR_1->mxcsr; memcpy(VAR_0->xmm_regs, VAR_1->xmm_regs, CPU_NB_REGS * 16); } asm volatile ("fninit"); fpuc = 0x037f | (VAR_0->fpuc & (3 << 10)); asm volatile("fldcw %0" : : "m" (fpuc)); }