void helper_dcbz(CPUPPCState *env, target_ulong addr, uint32_t is_dcbzl)

{

    int dcbz_size = env->dcache_line_size;



#if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64)

    if (!is_dcbzl &&

        (env->excp_model == POWERPC_EXCP_970) &&

        ((env->spr[SPR_970_HID5] >> 7) & 0x3) == 1) {

        dcbz_size = 32;

    }

#endif



    /* XXX add e500mc support */



    do_dcbz(env, addr, dcbz_size);

}

void helper_dcbz(CPUPPCState *env, target_ulong addr, uint32_t is_dcbzl)

{

    int dcbz_size = env->dcache_line_size;



#if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64)

    if (!is_dcbzl &&

        (env->excp_model == POWERPC_EXCP_970) &&

        ((env->spr[SPR_970_HID5] >> 7) & 0x3) == 1) {

        dcbz_size = 32;

    }

#endif



    



    do_dcbz(env, addr, dcbz_size);

}

void FUNC_0(CPUPPCState *VAR_0, target_ulong VAR_1, uint32_t VAR_2)

{

    int VAR_3 = VAR_0->dcache_line_size;



#if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64)

    if (!VAR_2 &&

        (VAR_0->excp_model == POWERPC_EXCP_970) &&

        ((VAR_0->spr[SPR_970_HID5] >> 7) & 0x3) == 1) {

        VAR_3 = 32;

    }

#endif



    



    do_dcbz(VAR_0, VAR_1, VAR_3);

}

void FUNC_0(CPUPPCState *VAR_0, target_ulong VAR_1, uint32_t VAR_2)
{ int VAR_3 = VAR_0->dcache_line_size; #if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64)
if (!VAR_2 &&
(VAR_0->excp_model == POWERPC_EXCP_970) &&
((VAR_0->spr[SPR_970_HID5] >> 7) & 0x3) == 1) { VAR_3 = 32; } #endif
do_dcbz(VAR_0, VAR_1, VAR_3); }