static void msix_table_mmio_write(void *opaque, target_phys_addr_t addr,

                                  uint64_t val, unsigned size)

{

    PCIDevice *dev = opaque;

    int vector = addr / PCI_MSIX_ENTRY_SIZE;

    bool was_masked;



    was_masked = msix_is_masked(dev, vector);

    pci_set_long(dev->msix_table + addr, val);

    msix_handle_mask_update(dev, vector, was_masked);

}

static void msix_table_mmio_write(void *opaque, target_phys_addr_t addr,

                                  uint64_t val, unsigned size)

{

    PCIDevice *dev = opaque;

    int vector = addr / PCI_MSIX_ENTRY_SIZE;

    bool was_masked;



    was_masked = msix_is_masked(dev, vector);

    pci_set_long(dev->msix_table + addr, val);

    msix_handle_mask_update(dev, vector, was_masked);

}

static void FUNC_0(void *VAR_0, target_phys_addr_t VAR_1,

                                  uint64_t VAR_2, unsigned VAR_3)

{

    PCIDevice *dev = VAR_0;

    int VAR_4 = VAR_1 / PCI_MSIX_ENTRY_SIZE;

    bool was_masked;



    was_masked = msix_is_masked(dev, VAR_4);

    pci_set_long(dev->msix_table + VAR_1, VAR_2);

    msix_handle_mask_update(dev, VAR_4, was_masked);

}

static void FUNC_0(void *VAR_0, target_phys_addr_t VAR_1,
uint64_t VAR_2, unsigned VAR_3)
{ PCIDevice *dev = VAR_0; int VAR_4 = VAR_1 / PCI_MSIX_ENTRY_SIZE; bool was_masked; was_masked = msix_is_masked(dev, VAR_4); pci_set_long(dev->msix_table + VAR_1, VAR_2); msix_handle_mask_update(dev, VAR_4, was_masked); }