static void rtas_ibm_query_interrupt_source_number(sPAPREnvironment *spapr,

                                                   uint32_t token,

                                                   uint32_t nargs,

                                                   target_ulong args,

                                                   uint32_t nret,

                                                   target_ulong rets)

{

    uint32_t config_addr = rtas_ld(args, 0);

    uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);

    unsigned int intr_src_num = -1, ioa_intr_num = rtas_ld(args, 3);

    int ndev;

    sPAPRPHBState *phb = NULL;



    /* Fins sPAPRPHBState */

    phb = find_phb(spapr, buid);

    if (!phb) {

        rtas_st(rets, 0, -3); /* Parameter error */

        return;

    }



    /* Find device descriptor and start IRQ */

    ndev = spapr_msicfg_find(phb, config_addr, false);

    if (ndev < 0) {

        trace_spapr_pci_msi("MSI has not been enabled", -1, config_addr);

        rtas_st(rets, 0, -1); /* Hardware error */

        return;

    }



    intr_src_num = phb->msi_table[ndev].irq + ioa_intr_num;

    trace_spapr_pci_rtas_ibm_query_interrupt_source_number(ioa_intr_num,

                                                           intr_src_num);



    rtas_st(rets, 0, 0);

    rtas_st(rets, 1, intr_src_num);

    rtas_st(rets, 2, 1);/* 0 == level; 1 == edge */

}

static void rtas_ibm_query_interrupt_source_number(sPAPREnvironment *spapr,

                                                   uint32_t token,

                                                   uint32_t nargs,

                                                   target_ulong args,

                                                   uint32_t nret,

                                                   target_ulong rets)

{

    uint32_t config_addr = rtas_ld(args, 0);

    uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);

    unsigned int intr_src_num = -1, ioa_intr_num = rtas_ld(args, 3);

    int ndev;

    sPAPRPHBState *phb = NULL;



    

    phb = find_phb(spapr, buid);

    if (!phb) {

        rtas_st(rets, 0, -3); 

        return;

    }



    

    ndev = spapr_msicfg_find(phb, config_addr, false);

    if (ndev < 0) {

        trace_spapr_pci_msi("MSI has not been enabled", -1, config_addr);

        rtas_st(rets, 0, -1); 

        return;

    }



    intr_src_num = phb->msi_table[ndev].irq + ioa_intr_num;

    trace_spapr_pci_rtas_ibm_query_interrupt_source_number(ioa_intr_num,

                                                           intr_src_num);



    rtas_st(rets, 0, 0);

    rtas_st(rets, 1, intr_src_num);

    rtas_st(rets, 2, 1);

}

static void FUNC_0(sPAPREnvironment *VAR_0,

                                                   uint32_t VAR_1,

                                                   uint32_t VAR_2,

                                                   target_ulong VAR_3,

                                                   uint32_t VAR_4,

                                                   target_ulong VAR_5)

{

    uint32_t config_addr = rtas_ld(VAR_3, 0);

    uint64_t buid = ((uint64_t)rtas_ld(VAR_3, 1) << 32) | rtas_ld(VAR_3, 2);

    unsigned int VAR_6 = -1, VAR_7 = rtas_ld(VAR_3, 3);

    int VAR_8;

    sPAPRPHBState *phb = NULL;



    

    phb = find_phb(VAR_0, buid);

    if (!phb) {

        rtas_st(VAR_5, 0, -3); 

        return;

    }



    

    VAR_8 = spapr_msicfg_find(phb, config_addr, false);

    if (VAR_8 < 0) {

        trace_spapr_pci_msi("MSI has not been enabled", -1, config_addr);

        rtas_st(VAR_5, 0, -1); 

        return;

    }



    VAR_6 = phb->msi_table[VAR_8].irq + VAR_7;

    trace_spapr_pci_rtas_ibm_query_interrupt_source_number(VAR_7,

                                                           VAR_6);



    rtas_st(VAR_5, 0, 0);

    rtas_st(VAR_5, 1, VAR_6);

    rtas_st(VAR_5, 2, 1);

}

static void FUNC_0(sPAPREnvironment *VAR_0,
uint32_t VAR_1,
uint32_t VAR_2,
target_ulong VAR_3,
uint32_t VAR_4,
target_ulong VAR_5)
{ uint32_t config_addr = rtas_ld(VAR_3, 0); uint64_t buid = ((uint64_t)rtas_ld(VAR_3, 1) << 32) | rtas_ld(VAR_3, 2); unsigned int VAR_6 = -1, VAR_7 = rtas_ld(VAR_3, 3); int VAR_8; sPAPRPHBState *phb = NULL; phb = find_phb(VAR_0, buid); if (!phb) { rtas_st(VAR_5, 0, -3); return; } VAR_8 = spapr_msicfg_find(phb, config_addr, false); if (VAR_8 < 0) { trace_spapr_pci_msi("MSI has not been enabled", -1, config_addr); rtas_st(VAR_5, 0, -1); return; } VAR_6 = phb->msi_table[VAR_8].irq + VAR_7; trace_spapr_pci_rtas_ibm_query_interrupt_source_number(VAR_7,
VAR_6); rtas_st(VAR_5, 0, 0); rtas_st(VAR_5, 1, VAR_6); rtas_st(VAR_5, 2, 1); }