static void tlb_flush_by_mmuidx_async_work(CPUState *cpu, run_on_cpu_data data)

{

    CPUArchState *env = cpu->env_ptr;

    unsigned long mmu_idx_bitmask = data.host_int;

    int mmu_idx;



    assert_cpu_is_self(cpu);



    tb_lock();



    tlb_debug("start: mmu_idx:0x%04lx\n", mmu_idx_bitmask);



    for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {



        if (test_bit(mmu_idx, &mmu_idx_bitmask)) {

            tlb_debug("%d\n", mmu_idx);



            memset(env->tlb_table[mmu_idx], -1, sizeof(env->tlb_table[0]));

            memset(env->tlb_v_table[mmu_idx], -1, sizeof(env->tlb_v_table[0]));

        }

    }



    memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache));



    tlb_debug("done\n");



    tb_unlock();

}

static void tlb_flush_by_mmuidx_async_work(CPUState *cpu, run_on_cpu_data data)

{

    CPUArchState *env = cpu->env_ptr;

    unsigned long mmu_idx_bitmask = data.host_int;

    int mmu_idx;



    assert_cpu_is_self(cpu);



    tb_lock();



    tlb_debug("start: mmu_idx:0x%04lx\n", mmu_idx_bitmask);



    for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {



        if (test_bit(mmu_idx, &mmu_idx_bitmask)) {

            tlb_debug("%d\n", mmu_idx);



            memset(env->tlb_table[mmu_idx], -1, sizeof(env->tlb_table[0]));

            memset(env->tlb_v_table[mmu_idx], -1, sizeof(env->tlb_v_table[0]));

        }

    }



    memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache));



    tlb_debug("done\n");



    tb_unlock();

}

    memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache));     memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache));
static void FUNC_0(CPUState *VAR_0, run_on_cpu_data VAR_1)

{

    CPUArchState *env = VAR_0->env_ptr;

    unsigned long VAR_2 = VAR_1.host_int;

    int VAR_3;



    assert_cpu_is_self(VAR_0);



    tb_lock();



    tlb_debug("start: VAR_3:0x%04lx\n", VAR_2);



    for (VAR_3 = 0; VAR_3 < NB_MMU_MODES; VAR_3++) {



        if (test_bit(VAR_3, &VAR_2)) {

            tlb_debug("%d\n", VAR_3);



            memset(env->tlb_table[VAR_3], -1, sizeof(env->tlb_table[0]));

            memset(env->tlb_v_table[VAR_3], -1, sizeof(env->tlb_v_table[0]));

        }

    }



    memset(VAR_0->tb_jmp_cache, 0, sizeof(VAR_0->tb_jmp_cache));



    tlb_debug("done\n");



    tb_unlock();

}

static void FUNC_0(CPUState *VAR_0, run_on_cpu_data VAR_1)
{ CPUArchState *env = VAR_0->env_ptr; unsigned long VAR_2 = VAR_1.host_int; int VAR_3; assert_cpu_is_self(VAR_0); tb_lock(); tlb_debug("start: VAR_3:0x%04lx\n", VAR_2); for (VAR_3 = 0; VAR_3 < NB_MMU_MODES; VAR_3++) { if (test_bit(VAR_3, &VAR_2)) { tlb_debug("%d\n", VAR_3); memset(env->tlb_table[VAR_3], -1, sizeof(env->tlb_table[0])); memset(env->tlb_v_table[VAR_3], -1, sizeof(env->tlb_v_table[0])); } } memset(VAR_0->tb_jmp_cache, 0, sizeof(VAR_0->tb_jmp_cache)); tlb_debug("done\n"); tb_unlock(); }