void helper_mwait(CPUX86State *env, int next_eip_addend)

{

    CPUState *cs;

    X86CPU *cpu;



    if ((uint32_t)env->regs[R_ECX] != 0) {

        raise_exception(env, EXCP0D_GPF);

    }

    cpu_svm_check_intercept_param(env, SVM_EXIT_MWAIT, 0);

    env->eip += next_eip_addend;



    cpu = x86_env_get_cpu(env);

    cs = CPU(cpu);

    /* XXX: not complete but not completely erroneous */

    if (cs->cpu_index != 0 || CPU_NEXT(cs) != NULL) {

        /* more than one CPU: do not sleep because another CPU may

           wake this one */

    } else {

        do_hlt(cpu);

    }

}

void helper_mwait(CPUX86State *env, int next_eip_addend)

{

    CPUState *cs;

    X86CPU *cpu;



    if ((uint32_t)env->regs[R_ECX] != 0) {

        raise_exception(env, EXCP0D_GPF);

    }

    cpu_svm_check_intercept_param(env, SVM_EXIT_MWAIT, 0);

    env->eip += next_eip_addend;



    cpu = x86_env_get_cpu(env);

    cs = CPU(cpu);

    

    if (cs->cpu_index != 0 || CPU_NEXT(cs) != NULL) {

        



    } else {

        do_hlt(cpu);

    }

}

void FUNC_0(CPUX86State *VAR_0, int VAR_1)

{

    CPUState *cs;

    X86CPU *cpu;



    if ((uint32_t)VAR_0->regs[R_ECX] != 0) {

        raise_exception(VAR_0, EXCP0D_GPF);

    }

    cpu_svm_check_intercept_param(VAR_0, SVM_EXIT_MWAIT, 0);

    VAR_0->eip += VAR_1;



    cpu = x86_env_get_cpu(VAR_0);

    cs = CPU(cpu);

    

    if (cs->cpu_index != 0 || CPU_NEXT(cs) != NULL) {

        



    } else {

        do_hlt(cpu);

    }

}

void FUNC_0(CPUX86State *VAR_0, int VAR_1)
{ CPUState *cs; X86CPU *cpu; if ((uint32_t)VAR_0->regs[R_ECX] != 0) { raise_exception(VAR_0, EXCP0D_GPF); } cpu_svm_check_intercept_param(VAR_0, SVM_EXIT_MWAIT, 0); VAR_0->eip += VAR_1; cpu = x86_env_get_cpu(VAR_0); cs = CPU(cpu); if (cs->cpu_index != 0 || CPU_NEXT(cs) != NULL) { } else { do_hlt(cpu); } }