static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type,

                            int is_user, hwaddr *phys_ptr,

                            int *prot, target_ulong *page_size)

{

    CPUState *cs = CPU(arm_env_get_cpu(env));

    int code;

    uint32_t table;

    uint32_t desc;

    int type;

    int ap;

    int domain = 0;

    int domain_prot;

    hwaddr phys_addr;



    /* Pagetable walk.  */

    /* Lookup l1 descriptor.  */

    if (!get_level1_table_address(env, &table, address)) {

        /* Section translation fault if page walk is disabled by PD0 or PD1 */

        code = 5;

        goto do_fault;

    }

    desc = ldl_phys(cs->as, table);

    type = (desc & 3);

    domain = (desc >> 5) & 0x0f;

    domain_prot = (env->cp15.c3 >> (domain * 2)) & 3;

    if (type == 0) {

        /* Section translation fault.  */

        code = 5;

        goto do_fault;

    }

    if (domain_prot == 0 || domain_prot == 2) {

        if (type == 2)

            code = 9; /* Section domain fault.  */

        else

            code = 11; /* Page domain fault.  */

        goto do_fault;

    }

    if (type == 2) {

        /* 1Mb section.  */

        phys_addr = (desc & 0xfff00000) | (address & 0x000fffff);

        ap = (desc >> 10) & 3;

        code = 13;

        *page_size = 1024 * 1024;

    } else {

        /* Lookup l2 entry.  */

	if (type == 1) {

	    /* Coarse pagetable.  */

	    table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc);

	} else {

	    /* Fine pagetable.  */

	    table = (desc & 0xfffff000) | ((address >> 8) & 0xffc);

	}

        desc = ldl_phys(cs->as, table);

        switch (desc & 3) {

        case 0: /* Page translation fault.  */

            code = 7;

            goto do_fault;

        case 1: /* 64k page.  */

            phys_addr = (desc & 0xffff0000) | (address & 0xffff);

            ap = (desc >> (4 + ((address >> 13) & 6))) & 3;

            *page_size = 0x10000;

            break;

        case 2: /* 4k page.  */

            phys_addr = (desc & 0xfffff000) | (address & 0xfff);

            ap = (desc >> (4 + ((address >> 9) & 6))) & 3;

            *page_size = 0x1000;

            break;

        case 3: /* 1k page.  */

	    if (type == 1) {

		if (arm_feature(env, ARM_FEATURE_XSCALE)) {

		    phys_addr = (desc & 0xfffff000) | (address & 0xfff);

		} else {

		    /* Page translation fault.  */

		    code = 7;

		    goto do_fault;

		}

	    } else {

		phys_addr = (desc & 0xfffffc00) | (address & 0x3ff);

	    }

            ap = (desc >> 4) & 3;

            *page_size = 0x400;

            break;

        default:

            /* Never happens, but compiler isn't smart enough to tell.  */

            abort();

        }

        code = 15;

    }

    *prot = check_ap(env, ap, domain_prot, access_type, is_user);

    if (!*prot) {

        /* Access permission fault.  */

        goto do_fault;

    }

    *prot |= PAGE_EXEC;

    *phys_ptr = phys_addr;

    return 0;

do_fault:

    return code | (domain << 4);

}

static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type,

                            int is_user, hwaddr *phys_ptr,

                            int *prot, target_ulong *page_size)

{

    CPUState *cs = CPU(arm_env_get_cpu(env));

    int code;

    uint32_t table;

    uint32_t desc;

    int type;

    int ap;

    int domain = 0;

    int domain_prot;

    hwaddr phys_addr;



    

    

    if (!get_level1_table_address(env, &table, address)) {

        

        code = 5;

        goto do_fault;

    }

    desc = ldl_phys(cs->as, table);

    type = (desc & 3);

    domain = (desc >> 5) & 0x0f;

    domain_prot = (env->cp15.c3 >> (domain * 2)) & 3;

    if (type == 0) {

        

        code = 5;

        goto do_fault;

    }

    if (domain_prot == 0 || domain_prot == 2) {

        if (type == 2)

            code = 9; 

        else

            code = 11; 

        goto do_fault;

    }

    if (type == 2) {

        

        phys_addr = (desc & 0xfff00000) | (address & 0x000fffff);

        ap = (desc >> 10) & 3;

        code = 13;

        *page_size = 1024 * 1024;

    } else {

        

	if (type == 1) {

	    

	    table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc);

	} else {

	    

	    table = (desc & 0xfffff000) | ((address >> 8) & 0xffc);

	}

        desc = ldl_phys(cs->as, table);

        switch (desc & 3) {

        case 0: 

            code = 7;

            goto do_fault;

        case 1: 

            phys_addr = (desc & 0xffff0000) | (address & 0xffff);

            ap = (desc >> (4 + ((address >> 13) & 6))) & 3;

            *page_size = 0x10000;

            break;

        case 2: 

            phys_addr = (desc & 0xfffff000) | (address & 0xfff);

            ap = (desc >> (4 + ((address >> 9) & 6))) & 3;

            *page_size = 0x1000;

            break;

        case 3: 

	    if (type == 1) {

		if (arm_feature(env, ARM_FEATURE_XSCALE)) {

		    phys_addr = (desc & 0xfffff000) | (address & 0xfff);

		} else {

		    

		    code = 7;

		    goto do_fault;

		}

	    } else {

		phys_addr = (desc & 0xfffffc00) | (address & 0x3ff);

	    }

            ap = (desc >> 4) & 3;

            *page_size = 0x400;

            break;

        default:

            

            abort();

        }

        code = 15;

    }

    *prot = check_ap(env, ap, domain_prot, access_type, is_user);

    if (!*prot) {

        

        goto do_fault;

    }

    *prot |= PAGE_EXEC;

    *phys_ptr = phys_addr;

    return 0;

do_fault:

    return code | (domain << 4);

}

static int FUNC_0(CPUARMState *VAR_0, uint32_t VAR_1, int VAR_2,

                            int VAR_3, hwaddr *VAR_4,

                            int *VAR_5, target_ulong *VAR_6)

{

    CPUState *cs = CPU(arm_env_get_cpu(VAR_0));

    int VAR_7;

    uint32_t table;

    uint32_t desc;

    int VAR_8;

    int VAR_9;

    int VAR_10 = 0;

    int VAR_11;

    hwaddr phys_addr;



    

    

    if (!get_level1_table_address(VAR_0, &table, VAR_1)) {

        

        VAR_7 = 5;

        goto do_fault;

    }

    desc = ldl_phys(cs->as, table);

    VAR_8 = (desc & 3);

    VAR_10 = (desc >> 5) & 0x0f;

    VAR_11 = (VAR_0->cp15.c3 >> (VAR_10 * 2)) & 3;

    if (VAR_8 == 0) {

        

        VAR_7 = 5;

        goto do_fault;

    }

    if (VAR_11 == 0 || VAR_11 == 2) {

        if (VAR_8 == 2)

            VAR_7 = 9; 

        else

            VAR_7 = 11; 

        goto do_fault;

    }

    if (VAR_8 == 2) {

        

        phys_addr = (desc & 0xfff00000) | (VAR_1 & 0x000fffff);

        VAR_9 = (desc >> 10) & 3;

        VAR_7 = 13;

        *VAR_6 = 1024 * 1024;

    } else {

        

	if (VAR_8 == 1) {

	    

	    table = (desc & 0xfffffc00) | ((VAR_1 >> 10) & 0x3fc);

	} else {

	    

	    table = (desc & 0xfffff000) | ((VAR_1 >> 8) & 0xffc);

	}

        desc = ldl_phys(cs->as, table);

        switch (desc & 3) {

        case 0: 

            VAR_7 = 7;

            goto do_fault;

        case 1: 

            phys_addr = (desc & 0xffff0000) | (VAR_1 & 0xffff);

            VAR_9 = (desc >> (4 + ((VAR_1 >> 13) & 6))) & 3;

            *VAR_6 = 0x10000;

            break;

        case 2: 

            phys_addr = (desc & 0xfffff000) | (VAR_1 & 0xfff);

            VAR_9 = (desc >> (4 + ((VAR_1 >> 9) & 6))) & 3;

            *VAR_6 = 0x1000;

            break;

        case 3: 

	    if (VAR_8 == 1) {

		if (arm_feature(VAR_0, ARM_FEATURE_XSCALE)) {

		    phys_addr = (desc & 0xfffff000) | (VAR_1 & 0xfff);

		} else {

		    

		    VAR_7 = 7;

		    goto do_fault;

		}

	    } else {

		phys_addr = (desc & 0xfffffc00) | (VAR_1 & 0x3ff);

	    }

            VAR_9 = (desc >> 4) & 3;

            *VAR_6 = 0x400;

            break;

        default:

            

            abort();

        }

        VAR_7 = 15;

    }

    *VAR_5 = check_ap(VAR_0, VAR_9, VAR_11, VAR_2, VAR_3);

    if (!*VAR_5) {

        

        goto do_fault;

    }

    *VAR_5 |= PAGE_EXEC;

    *VAR_4 = phys_addr;

    return 0;

do_fault:

    return VAR_7 | (VAR_10 << 4);

}

static int FUNC_0(CPUARMState *VAR_0, uint32_t VAR_1, int VAR_2,
int VAR_3, hwaddr *VAR_4,
int *VAR_5, target_ulong *VAR_6)
{ CPUState *cs = CPU(arm_env_get_cpu(VAR_0)); int VAR_7; uint32_t table; uint32_t desc; int VAR_8; int VAR_9; int VAR_10 = 0; int VAR_11; hwaddr phys_addr; if (!get_level1_table_address(VAR_0, &table, VAR_1)) { VAR_7 = 5; goto do_fault; } desc = ldl_phys(cs->as, table); VAR_8 = (desc & 3); VAR_10 = (desc >> 5) & 0x0f; VAR_11 = (VAR_0->cp15.c3 >> (VAR_10 * 2)) & 3; if (VAR_8 == 0) { VAR_7 = 5; goto do_fault; } if (VAR_11 == 0 || VAR_11 == 2) { if (VAR_8 == 2)
VAR_7 = 9; else
VAR_7 = 11; goto do_fault; } if (VAR_8 == 2) { phys_addr = (desc & 0xfff00000) | (VAR_1 & 0x000fffff); VAR_9 = (desc >> 10) & 3; VAR_7 = 13; *VAR_6 = 1024 * 1024; } else { if (VAR_8 == 1) { table = (desc & 0xfffffc00) | ((VAR_1 >> 10) & 0x3fc); } else { table = (desc & 0xfffff000) | ((VAR_1 >> 8) & 0xffc); } desc = ldl_phys(cs->as, table); switch (desc & 3) { case 0:
VAR_7 = 7; goto do_fault; case 1:
phys_addr = (desc & 0xffff0000) | (VAR_1 & 0xffff); VAR_9 = (desc >> (4 + ((VAR_1 >> 13) & 6))) & 3; *VAR_6 = 0x10000; break; case 2:
phys_addr = (desc & 0xfffff000) | (VAR_1 & 0xfff); VAR_9 = (desc >> (4 + ((VAR_1 >> 9) & 6))) & 3; *VAR_6 = 0x1000; break; case 3:
if (VAR_8 == 1) { if (arm_feature(VAR_0, ARM_FEATURE_XSCALE)) { phys_addr = (desc & 0xfffff000) | (VAR_1 & 0xfff); } else { VAR_7 = 7; goto do_fault; } } else { phys_addr = (desc & 0xfffffc00) | (VAR_1 & 0x3ff); } VAR_9 = (desc >> 4) & 3; *VAR_6 = 0x400; break; default:
abort(); } VAR_7 = 15; } *VAR_5 = check_ap(VAR_0, VAR_9, VAR_11, VAR_2, VAR_3); if (!*VAR_5) { goto do_fault; } *VAR_5 |= PAGE_EXEC; *VAR_4 = phys_addr; return 0; do_fault:
return VAR_7 | (VAR_10 << 4); }