static void gen_rsr(DisasContext *dc, TCGv_i32 d, uint32_t sr)

{

    static void (* const rsr_handler[256])(DisasContext *dc,

            TCGv_i32 d, uint32_t sr) = {

        [CCOUNT] = gen_rsr_ccount,

        [PTEVADDR] = gen_rsr_ptevaddr,

    };



    if (sregnames[sr]) {

        if (rsr_handler[sr]) {

            rsr_handler[sr](dc, d, sr);

        } else {

            tcg_gen_mov_i32(d, cpu_SR[sr]);

        }

    } else {

        qemu_log("RSR %d not implemented, ", sr);

    }

}

static void gen_rsr(DisasContext *dc, TCGv_i32 d, uint32_t sr)

{

    static void (* const rsr_handler[256])(DisasContext *dc,

            TCGv_i32 d, uint32_t sr) = {

        [CCOUNT] = gen_rsr_ccount,

        [PTEVADDR] = gen_rsr_ptevaddr,

    };



    if (sregnames[sr]) {

        if (rsr_handler[sr]) {

            rsr_handler[sr](dc, d, sr);

        } else {

            tcg_gen_mov_i32(d, cpu_SR[sr]);

        }

    } else {

        qemu_log("RSR %d not implemented, ", sr);

    }

}

    if (sregnames[sr]) {         if (rsr_handler[sr]) {             rsr_handler[sr](dc, d, sr);         } else {             tcg_gen_mov_i32(d, cpu_SR[sr]);         qemu_log("RSR %d not implemented, ", sr);     if (sregnames[sr]) {         } else {
static void FUNC_0(DisasContext *VAR_4, TCGv_i32 VAR_4, uint32_t VAR_4)

{

    static void (* const VAR_3[256])(DisasContext *VAR_4,

            TCGv_i32 VAR_4, uint32_t VAR_4) = {

        [CCOUNT] = gen_rsr_ccount,

        [PTEVADDR] = gen_rsr_ptevaddr,

    };



    if (sregnames[VAR_4]) {

        if (VAR_3[VAR_4]) {

            VAR_3[VAR_4](VAR_4, VAR_4, VAR_4);

        } else {

            tcg_gen_mov_i32(VAR_4, cpu_SR[VAR_4]);

        }

    } else {

        qemu_log("RSR %VAR_4 not implemented, ", VAR_4);

    }

}

static void FUNC_0(DisasContext *VAR_4, TCGv_i32 VAR_4, uint32_t VAR_4)
{ static void (* const VAR_3[256])(DisasContext *VAR_4,
TCGv_i32 VAR_4, uint32_t VAR_4) = { [CCOUNT] = gen_rsr_ccount,
[PTEVADDR] = gen_rsr_ptevaddr,
}; if (sregnames[VAR_4]) { if (VAR_3[VAR_4]) { VAR_3[VAR_4](VAR_4, VAR_4, VAR_4); } else { tcg_gen_mov_i32(VAR_4, cpu_SR[VAR_4]); } } else { qemu_log("RSR %VAR_4 not implemented, ", VAR_4); } }