static void clipper_init(MachineState *machine)

{

    ram_addr_t ram_size = machine->ram_size;

    const char *cpu_model = machine->cpu_model;

    const char *kernel_filename = machine->kernel_filename;

    const char *kernel_cmdline = machine->kernel_cmdline;

    const char *initrd_filename = machine->initrd_filename;

    AlphaCPU *cpus[4];

    PCIBus *pci_bus;

    ISABus *isa_bus;

    qemu_irq rtc_irq;

    long size, i;

    const char *palcode_filename;

    uint64_t palcode_entry, palcode_low, palcode_high;

    uint64_t kernel_entry, kernel_low, kernel_high;



    /* Create up to 4 cpus.  */

    memset(cpus, 0, sizeof(cpus));

    for (i = 0; i < smp_cpus; ++i) {

        cpus[i] = cpu_alpha_init(cpu_model ? cpu_model : "ev67");

    }



    cpus[0]->env.trap_arg0 = ram_size;

    cpus[0]->env.trap_arg1 = 0;

    cpus[0]->env.trap_arg2 = smp_cpus;



    /* Init the chipset.  */

    pci_bus = typhoon_init(ram_size, &isa_bus, &rtc_irq, cpus,

                           clipper_pci_map_irq);



    /* Since we have an SRM-compatible PALcode, use the SRM epoch.  */

    rtc_init(isa_bus, 1900, rtc_irq);



    pit_init(isa_bus, 0x40, 0, NULL);

    isa_create_simple(isa_bus, "i8042");



    /* VGA setup.  Don't bother loading the bios.  */

    pci_vga_init(pci_bus);



    /* Serial code setup.  */

    serial_hds_isa_init(isa_bus, MAX_SERIAL_PORTS);



    /* Network setup.  e1000 is good enough, failing Tulip support.  */

    for (i = 0; i < nb_nics; i++) {

        pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);

    }



    /* IDE disk setup.  */

    {

        DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

        ide_drive_get(hd, ARRAY_SIZE(hd));



        pci_cmd646_ide_init(pci_bus, hd, 0);

    }



    /* Load PALcode.  Given that this is not "real" cpu palcode,

       but one explicitly written for the emulation, we might as

       well load it directly from and ELF image.  */

    palcode_filename = (bios_name ? bios_name : "palcode-clipper");

    palcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, palcode_filename);

    if (palcode_filename == NULL) {

        hw_error("no palcode provided\n");

        exit(1);

    }

    size = load_elf(palcode_filename, cpu_alpha_superpage_to_phys,

                    NULL, &palcode_entry, &palcode_low, &palcode_high,

                    0, EM_ALPHA, 0);

    if (size < 0) {

        hw_error("could not load palcode '%s'\n", palcode_filename);

        exit(1);

    }



    /* Start all cpus at the PALcode RESET entry point.  */

    for (i = 0; i < smp_cpus; ++i) {

        cpus[i]->env.pal_mode = 1;

        cpus[i]->env.pc = palcode_entry;

        cpus[i]->env.palbr = palcode_entry;

    }



    /* Load a kernel.  */

    if (kernel_filename) {

        uint64_t param_offset;



        size = load_elf(kernel_filename, cpu_alpha_superpage_to_phys,

                        NULL, &kernel_entry, &kernel_low, &kernel_high,

                        0, EM_ALPHA, 0);

        if (size < 0) {

            hw_error("could not load kernel '%s'\n", kernel_filename);

            exit(1);

        }



        cpus[0]->env.trap_arg1 = kernel_entry;



        param_offset = kernel_low - 0x6000;



        if (kernel_cmdline) {

            pstrcpy_targphys("cmdline", param_offset, 0x100, kernel_cmdline);

        }



        if (initrd_filename) {

            long initrd_base, initrd_size;



            initrd_size = get_image_size(initrd_filename);

            if (initrd_size < 0) {

                hw_error("could not load initial ram disk '%s'\n",

                         initrd_filename);

                exit(1);

            }



            /* Put the initrd image as high in memory as possible.  */

            initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;

            load_image_targphys(initrd_filename, initrd_base,

                                ram_size - initrd_base);



            address_space_stq(&address_space_memory, param_offset + 0x100,

                              initrd_base + 0xfffffc0000000000ULL,

                              MEMTXATTRS_UNSPECIFIED,

                              NULL);

            address_space_stq(&address_space_memory, param_offset + 0x108,

                              initrd_size, MEMTXATTRS_UNSPECIFIED, NULL);

        }

    }

}

static void clipper_init(MachineState *machine)

{

    ram_addr_t ram_size = machine->ram_size;

    const char *cpu_model = machine->cpu_model;

    const char *kernel_filename = machine->kernel_filename;

    const char *kernel_cmdline = machine->kernel_cmdline;

    const char *initrd_filename = machine->initrd_filename;

    AlphaCPU *cpus[4];

    PCIBus *pci_bus;

    ISABus *isa_bus;

    qemu_irq rtc_irq;

    long size, i;

    const char *palcode_filename;

    uint64_t palcode_entry, palcode_low, palcode_high;

    uint64_t kernel_entry, kernel_low, kernel_high;



    

    memset(cpus, 0, sizeof(cpus));

    for (i = 0; i < smp_cpus; ++i) {

        cpus[i] = cpu_alpha_init(cpu_model ? cpu_model : "ev67");

    }



    cpus[0]->env.trap_arg0 = ram_size;

    cpus[0]->env.trap_arg1 = 0;

    cpus[0]->env.trap_arg2 = smp_cpus;



    

    pci_bus = typhoon_init(ram_size, &isa_bus, &rtc_irq, cpus,

                           clipper_pci_map_irq);



    

    rtc_init(isa_bus, 1900, rtc_irq);



    pit_init(isa_bus, 0x40, 0, NULL);

    isa_create_simple(isa_bus, "i8042");



    

    pci_vga_init(pci_bus);



    

    serial_hds_isa_init(isa_bus, MAX_SERIAL_PORTS);



    

    for (i = 0; i < nb_nics; i++) {

        pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);

    }



    

    {

        DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

        ide_drive_get(hd, ARRAY_SIZE(hd));



        pci_cmd646_ide_init(pci_bus, hd, 0);

    }



    





    palcode_filename = (bios_name ? bios_name : "palcode-clipper");

    palcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, palcode_filename);

    if (palcode_filename == NULL) {

        hw_error("no palcode provided\n");

        exit(1);

    }

    size = load_elf(palcode_filename, cpu_alpha_superpage_to_phys,

                    NULL, &palcode_entry, &palcode_low, &palcode_high,

                    0, EM_ALPHA, 0);

    if (size < 0) {

        hw_error("could not load palcode '%s'\n", palcode_filename);

        exit(1);

    }



    

    for (i = 0; i < smp_cpus; ++i) {

        cpus[i]->env.pal_mode = 1;

        cpus[i]->env.pc = palcode_entry;

        cpus[i]->env.palbr = palcode_entry;

    }



    

    if (kernel_filename) {

        uint64_t param_offset;



        size = load_elf(kernel_filename, cpu_alpha_superpage_to_phys,

                        NULL, &kernel_entry, &kernel_low, &kernel_high,

                        0, EM_ALPHA, 0);

        if (size < 0) {

            hw_error("could not load kernel '%s'\n", kernel_filename);

            exit(1);

        }



        cpus[0]->env.trap_arg1 = kernel_entry;



        param_offset = kernel_low - 0x6000;



        if (kernel_cmdline) {

            pstrcpy_targphys("cmdline", param_offset, 0x100, kernel_cmdline);

        }



        if (initrd_filename) {

            long initrd_base, initrd_size;



            initrd_size = get_image_size(initrd_filename);

            if (initrd_size < 0) {

                hw_error("could not load initial ram disk '%s'\n",

                         initrd_filename);

                exit(1);

            }



            

            initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;

            load_image_targphys(initrd_filename, initrd_base,

                                ram_size - initrd_base);



            address_space_stq(&address_space_memory, param_offset + 0x100,

                              initrd_base + 0xfffffc0000000000ULL,

                              MEMTXATTRS_UNSPECIFIED,

                              NULL);

            address_space_stq(&address_space_memory, param_offset + 0x108,

                              initrd_size, MEMTXATTRS_UNSPECIFIED, NULL);

        }

    }

}

    const char *palcode_filename;     palcode_filename = (bios_name ? bios_name : "palcode-clipper");     palcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, palcode_filename);
static void FUNC_0(MachineState *VAR_0)

{

    ram_addr_t ram_size = VAR_0->ram_size;

    const char *VAR_1 = VAR_0->VAR_1;

    const char *VAR_2 = VAR_0->VAR_2;

    const char *VAR_3 = VAR_0->VAR_3;

    const char *VAR_4 = VAR_0->VAR_4;

    AlphaCPU *cpus[4];

    PCIBus *pci_bus;

    ISABus *isa_bus;

    qemu_irq rtc_irq;

    long VAR_5, VAR_6;

    const char *VAR_7;

    uint64_t palcode_entry, palcode_low, palcode_high;

    uint64_t kernel_entry, kernel_low, kernel_high;



    

    memset(cpus, 0, sizeof(cpus));

    for (VAR_6 = 0; VAR_6 < smp_cpus; ++VAR_6) {

        cpus[VAR_6] = cpu_alpha_init(VAR_1 ? VAR_1 : "ev67");

    }



    cpus[0]->env.trap_arg0 = ram_size;

    cpus[0]->env.trap_arg1 = 0;

    cpus[0]->env.trap_arg2 = smp_cpus;



    

    pci_bus = typhoon_init(ram_size, &isa_bus, &rtc_irq, cpus,

                           clipper_pci_map_irq);



    

    rtc_init(isa_bus, 1900, rtc_irq);



    pit_init(isa_bus, 0x40, 0, NULL);

    isa_create_simple(isa_bus, "i8042");



    

    pci_vga_init(pci_bus);



    

    serial_hds_isa_init(isa_bus, MAX_SERIAL_PORTS);



    

    for (VAR_6 = 0; VAR_6 < nb_nics; VAR_6++) {

        pci_nic_init_nofail(&nd_table[VAR_6], pci_bus, "e1000", NULL);

    }



    

    {

        DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

        ide_drive_get(hd, ARRAY_SIZE(hd));



        pci_cmd646_ide_init(pci_bus, hd, 0);

    }



    





    VAR_7 = (bios_name ? bios_name : "palcode-clipper");

    VAR_7 = qemu_find_file(QEMU_FILE_TYPE_BIOS, VAR_7);

    if (VAR_7 == NULL) {

        hw_error("no palcode provided\n");

        exit(1);

    }

    VAR_5 = load_elf(VAR_7, cpu_alpha_superpage_to_phys,

                    NULL, &palcode_entry, &palcode_low, &palcode_high,

                    0, EM_ALPHA, 0);

    if (VAR_5 < 0) {

        hw_error("could not load palcode '%s'\n", VAR_7);

        exit(1);

    }



    

    for (VAR_6 = 0; VAR_6 < smp_cpus; ++VAR_6) {

        cpus[VAR_6]->env.pal_mode = 1;

        cpus[VAR_6]->env.pc = palcode_entry;

        cpus[VAR_6]->env.palbr = palcode_entry;

    }



    

    if (VAR_2) {

        uint64_t param_offset;



        VAR_5 = load_elf(VAR_2, cpu_alpha_superpage_to_phys,

                        NULL, &kernel_entry, &kernel_low, &kernel_high,

                        0, EM_ALPHA, 0);

        if (VAR_5 < 0) {

            hw_error("could not load kernel '%s'\n", VAR_2);

            exit(1);

        }



        cpus[0]->env.trap_arg1 = kernel_entry;



        param_offset = kernel_low - 0x6000;



        if (VAR_3) {

            pstrcpy_targphys("cmdline", param_offset, 0x100, VAR_3);

        }



        if (VAR_4) {

            long VAR_8, VAR_9;



            VAR_9 = get_image_size(VAR_4);

            if (VAR_9 < 0) {

                hw_error("could not load initial ram disk '%s'\n",

                         VAR_4);

                exit(1);

            }



            

            VAR_8 = (ram_size - VAR_9) & TARGET_PAGE_MASK;

            load_image_targphys(VAR_4, VAR_8,

                                ram_size - VAR_8);



            address_space_stq(&address_space_memory, param_offset + 0x100,

                              VAR_8 + 0xfffffc0000000000ULL,

                              MEMTXATTRS_UNSPECIFIED,

                              NULL);

            address_space_stq(&address_space_memory, param_offset + 0x108,

                              VAR_9, MEMTXATTRS_UNSPECIFIED, NULL);

        }

    }

}

static void FUNC_0(MachineState *VAR_0)
{ ram_addr_t ram_size = VAR_0->ram_size; const char *VAR_1 = VAR_0->VAR_1; const char *VAR_2 = VAR_0->VAR_2; const char *VAR_3 = VAR_0->VAR_3; const char *VAR_4 = VAR_0->VAR_4; AlphaCPU *cpus[4]; PCIBus *pci_bus; ISABus *isa_bus; qemu_irq rtc_irq; long VAR_5, VAR_6; const char *VAR_7; uint64_t palcode_entry, palcode_low, palcode_high; uint64_t kernel_entry, kernel_low, kernel_high; memset(cpus, 0, sizeof(cpus)); for (VAR_6 = 0; VAR_6 < smp_cpus; ++VAR_6) { cpus[VAR_6] = cpu_alpha_init(VAR_1 ? VAR_1 : "ev67"); } cpus[0]->env.trap_arg0 = ram_size; cpus[0]->env.trap_arg1 = 0; cpus[0]->env.trap_arg2 = smp_cpus; pci_bus = typhoon_init(ram_size, &isa_bus, &rtc_irq, cpus,
clipper_pci_map_irq); rtc_init(isa_bus, 1900, rtc_irq); pit_init(isa_bus, 0x40, 0, NULL); isa_create_simple(isa_bus, "i8042"); pci_vga_init(pci_bus); serial_hds_isa_init(isa_bus, MAX_SERIAL_PORTS); for (VAR_6 = 0; VAR_6 < nb_nics; VAR_6++) { pci_nic_init_nofail(&nd_table[VAR_6], pci_bus, "e1000", NULL); } { DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; ide_drive_get(hd, ARRAY_SIZE(hd)); pci_cmd646_ide_init(pci_bus, hd, 0); } VAR_7 = (bios_name ? bios_name : "palcode-clipper"); VAR_7 = qemu_find_file(QEMU_FILE_TYPE_BIOS, VAR_7); if (VAR_7 == NULL) { hw_error("no palcode provided\n"); exit(1); } VAR_5 = load_elf(VAR_7, cpu_alpha_superpage_to_phys,
NULL, &palcode_entry, &palcode_low, &palcode_high,
0, EM_ALPHA, 0); if (VAR_5 < 0) { hw_error("could not load palcode '%s'\n", VAR_7); exit(1); } for (VAR_6 = 0; VAR_6 < smp_cpus; ++VAR_6) { cpus[VAR_6]->env.pal_mode = 1; cpus[VAR_6]->env.pc = palcode_entry; cpus[VAR_6]->env.palbr = palcode_entry; } if (VAR_2) { uint64_t param_offset; VAR_5 = load_elf(VAR_2, cpu_alpha_superpage_to_phys,
NULL, &kernel_entry, &kernel_low, &kernel_high,
0, EM_ALPHA, 0); if (VAR_5 < 0) { hw_error("could not load kernel '%s'\n", VAR_2); exit(1); } cpus[0]->env.trap_arg1 = kernel_entry; param_offset = kernel_low - 0x6000; if (VAR_3) { pstrcpy_targphys("cmdline", param_offset, 0x100, VAR_3); } if (VAR_4) { long VAR_8, VAR_9; VAR_9 = get_image_size(VAR_4); if (VAR_9 < 0) { hw_error("could not load initial ram disk '%s'\n",
VAR_4); exit(1); } VAR_8 = (ram_size - VAR_9) & TARGET_PAGE_MASK; load_image_targphys(VAR_4, VAR_8,
ram_size - VAR_8); address_space_stq(&address_space_memory, param_offset + 0x100,
VAR_8 + 0xfffffc0000000000ULL,
MEMTXATTRS_UNSPECIFIED,
NULL); address_space_stq(&address_space_memory, param_offset + 0x108,
VAR_9, MEMTXATTRS_UNSPECIFIED, NULL); } } }