void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,

                    const char *boot_device, DisplayState *ds,

                    const char *kernel_filename, const char *kernel_cmdline,

                    const char *initrd_filename, const char *cpu_model)

{

    char buf[1024];

    unsigned long bios_offset;

    int bios_size;

    CPUState *env;

    RTCState *rtc_state;

    int i;

    qemu_irq *i8259;

    int index;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];



    /* init CPUs */

    if (cpu_model == NULL) {

#ifdef TARGET_MIPS64

        cpu_model = "R4000";

#else

        cpu_model = "24Kf";

#endif

    }

    env = cpu_init(cpu_model);

    if (!env) {

        fprintf(stderr, "Unable to find CPU definition\n");

        exit(1);

    }

    qemu_register_reset(main_cpu_reset, env);



    /* allocate RAM */

    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);



    if (!mips_qemu_iomemtype) {

        mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,

                                                     mips_qemu_write, NULL);

    }

    cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);



    /* Try to load a BIOS image. If this fails, we continue regardless,

       but initialize the hardware ourselves. When a kernel gets

       preloaded we also initialize the hardware, since the BIOS wasn't

       run. */

    bios_offset = ram_size + vga_ram_size;

    if (bios_name == NULL)

        bios_name = BIOS_FILENAME;

    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);

    bios_size = load_image(buf, phys_ram_base + bios_offset);

    if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {

	cpu_register_physical_memory(0x1fc00000,

				     BIOS_SIZE, bios_offset | IO_MEM_ROM);

    } else if ((index = drive_get_index(IF_PFLASH, 0, 0)) > -1) {

        uint32_t mips_rom = 0x00400000;

        cpu_register_physical_memory(0x1fc00000, mips_rom,

	                     qemu_ram_alloc(mips_rom) | IO_MEM_ROM);

        if (!pflash_cfi01_register(0x1fc00000, qemu_ram_alloc(mips_rom),

            drives_table[index].bdrv, sector_len, mips_rom / sector_len,

            4, 0, 0, 0, 0)) {

            fprintf(stderr, "qemu: Error registering flash memory.\n");

	}

    }

    else {

	/* not fatal */

        fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",

		buf);

    }



    if (kernel_filename) {

        loaderparams.ram_size = ram_size;

        loaderparams.kernel_filename = kernel_filename;

        loaderparams.kernel_cmdline = kernel_cmdline;

        loaderparams.initrd_filename = initrd_filename;

        load_kernel (env);

    }



    /* Init CPU internal devices */

    cpu_mips_irq_init_cpu(env);

    cpu_mips_clock_init(env);



    /* The PIC is attached to the MIPS CPU INT0 pin */

    i8259 = i8259_init(env->irq[2]);



    rtc_state = rtc_init(0x70, i8259[8]);



    /* Register 64 KB of ISA IO space at 0x14000000 */

    isa_mmio_init(0x14000000, 0x00010000);

    isa_mem_base = 0x10000000;



    pit = pit_init(0x40, i8259[0]);



    for(i = 0; i < MAX_SERIAL_PORTS; i++) {

        if (serial_hds[i]) {

            serial_init(serial_io[i], i8259[serial_irq[i]], 115200,

                        serial_hds[i]);

        }

    }



    isa_vga_init(ds, phys_ram_base + ram_size, ram_size,

                 vga_ram_size);



    if (nd_table[0].vlan) {

        if (nd_table[i].model == NULL) {

	    nd_table[i].model = "ne2k_isa";

        }

        if (strcmp(nd_table[0].model, "ne2k_isa") == 0) {

            isa_ne2000_init(0x300, i8259[9], &nd_table[0]);

        } else if (strcmp(nd_table[0].model, "?") == 0) {

            fprintf(stderr, "qemu: Supported NICs: ne2k_isa\n");

            exit (1);

        } else {

            fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);

            exit (1);

        }

    }



    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {

        fprintf(stderr, "qemu: too many IDE bus\n");

        exit(1);

    }



    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {

        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);

        if (index != -1)

            hd[i] = drives_table[index].bdrv;

        else

            hd[i] = NULL;

    }



    for(i = 0; i < MAX_IDE_BUS; i++)

        isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],

                     hd[MAX_IDE_DEVS * i],

		     hd[MAX_IDE_DEVS * i + 1]);



    i8042_init(i8259[1], i8259[12], 0x60);

}

void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,

                    const char *boot_device, DisplayState *ds,

                    const char *kernel_filename, const char *kernel_cmdline,

                    const char *initrd_filename, const char *cpu_model)

{

    char buf[1024];

    unsigned long bios_offset;

    int bios_size;

    CPUState *env;

    RTCState *rtc_state;

    int i;

    qemu_irq *i8259;

    int index;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];



    

    if (cpu_model == NULL) {

#ifdef TARGET_MIPS64

        cpu_model = "R4000";

#else

        cpu_model = "24Kf";

#endif

    }

    env = cpu_init(cpu_model);

    if (!env) {

        fprintf(stderr, "Unable to find CPU definition\n");

        exit(1);

    }

    qemu_register_reset(main_cpu_reset, env);



    

    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);



    if (!mips_qemu_iomemtype) {

        mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,

                                                     mips_qemu_write, NULL);

    }

    cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);



    







    bios_offset = ram_size + vga_ram_size;

    if (bios_name == NULL)

        bios_name = BIOS_FILENAME;

    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);

    bios_size = load_image(buf, phys_ram_base + bios_offset);

    if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {

	cpu_register_physical_memory(0x1fc00000,

				     BIOS_SIZE, bios_offset | IO_MEM_ROM);

    } else if ((index = drive_get_index(IF_PFLASH, 0, 0)) > -1) {

        uint32_t mips_rom = 0x00400000;

        cpu_register_physical_memory(0x1fc00000, mips_rom,

	                     qemu_ram_alloc(mips_rom) | IO_MEM_ROM);

        if (!pflash_cfi01_register(0x1fc00000, qemu_ram_alloc(mips_rom),

            drives_table[index].bdrv, sector_len, mips_rom / sector_len,

            4, 0, 0, 0, 0)) {

            fprintf(stderr, "qemu: Error registering flash memory.\n");

	}

    }

    else {

	

        fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",

		buf);

    }



    if (kernel_filename) {

        loaderparams.ram_size = ram_size;

        loaderparams.kernel_filename = kernel_filename;

        loaderparams.kernel_cmdline = kernel_cmdline;

        loaderparams.initrd_filename = initrd_filename;

        load_kernel (env);

    }



    

    cpu_mips_irq_init_cpu(env);

    cpu_mips_clock_init(env);



    

    i8259 = i8259_init(env->irq[2]);



    rtc_state = rtc_init(0x70, i8259[8]);



    

    isa_mmio_init(0x14000000, 0x00010000);

    isa_mem_base = 0x10000000;



    pit = pit_init(0x40, i8259[0]);



    for(i = 0; i < MAX_SERIAL_PORTS; i++) {

        if (serial_hds[i]) {

            serial_init(serial_io[i], i8259[serial_irq[i]], 115200,

                        serial_hds[i]);

        }

    }



    isa_vga_init(ds, phys_ram_base + ram_size, ram_size,

                 vga_ram_size);



    if (nd_table[0].vlan) {

        if (nd_table[i].model == NULL) {

	    nd_table[i].model = "ne2k_isa";

        }

        if (strcmp(nd_table[0].model, "ne2k_isa") == 0) {

            isa_ne2000_init(0x300, i8259[9], &nd_table[0]);

        } else if (strcmp(nd_table[0].model, "?") == 0) {

            fprintf(stderr, "qemu: Supported NICs: ne2k_isa\n");

            exit (1);

        } else {

            fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);

            exit (1);

        }

    }



    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {

        fprintf(stderr, "qemu: too many IDE bus\n");

        exit(1);

    }



    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {

        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);

        if (index != -1)

            hd[i] = drives_table[index].bdrv;

        else

            hd[i] = NULL;

    }



    for(i = 0; i < MAX_IDE_BUS; i++)

        isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],

                     hd[MAX_IDE_DEVS * i],

		     hd[MAX_IDE_DEVS * i + 1]);



    i8042_init(i8259[1], i8259[12], 0x60);

}

void FUNC_0 (ram_addr_t VAR_0, int VAR_1,

                    const char *VAR_2, DisplayState *VAR_3,

                    const char *VAR_4, const char *VAR_5,

                    const char *VAR_6, const char *VAR_7)

{

    char VAR_8[1024];

    unsigned long VAR_9;

    int VAR_10;

    CPUState *env;

    RTCState *rtc_state;

    int VAR_11;

    qemu_irq *i8259;

    int VAR_12;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];



    

    if (VAR_7 == NULL) {

#ifdef TARGET_MIPS64

        VAR_7 = "R4000";

#else

        VAR_7 = "24Kf";

#endif

    }

    env = cpu_init(VAR_7);

    if (!env) {

        fprintf(stderr, "Unable to find CPU definition\n");

        exit(1);

    }

    qemu_register_reset(main_cpu_reset, env);



    

    cpu_register_physical_memory(0, VAR_0, IO_MEM_RAM);



    if (!mips_qemu_iomemtype) {

        mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,

                                                     mips_qemu_write, NULL);

    }

    cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);



    







    VAR_9 = VAR_0 + VAR_1;

    if (bios_name == NULL)

        bios_name = BIOS_FILENAME;

    snprintf(VAR_8, sizeof(VAR_8), "%s/%s", bios_dir, bios_name);

    VAR_10 = load_image(VAR_8, phys_ram_base + VAR_9);

    if ((VAR_10 > 0) && (VAR_10 <= BIOS_SIZE)) {

	cpu_register_physical_memory(0x1fc00000,

				     BIOS_SIZE, VAR_9 | IO_MEM_ROM);

    } else if ((VAR_12 = drive_get_index(IF_PFLASH, 0, 0)) > -1) {

        uint32_t mips_rom = 0x00400000;

        cpu_register_physical_memory(0x1fc00000, mips_rom,

	                     qemu_ram_alloc(mips_rom) | IO_MEM_ROM);

        if (!pflash_cfi01_register(0x1fc00000, qemu_ram_alloc(mips_rom),

            drives_table[VAR_12].bdrv, sector_len, mips_rom / sector_len,

            4, 0, 0, 0, 0)) {

            fprintf(stderr, "qemu: Error registering flash memory.\n");

	}

    }

    else {

	

        fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",

		VAR_8);

    }



    if (VAR_4) {

        loaderparams.VAR_0 = VAR_0;

        loaderparams.VAR_4 = VAR_4;

        loaderparams.VAR_5 = VAR_5;

        loaderparams.VAR_6 = VAR_6;

        load_kernel (env);

    }



    

    cpu_mips_irq_init_cpu(env);

    cpu_mips_clock_init(env);



    

    i8259 = i8259_init(env->irq[2]);



    rtc_state = rtc_init(0x70, i8259[8]);



    

    isa_mmio_init(0x14000000, 0x00010000);

    isa_mem_base = 0x10000000;



    pit = pit_init(0x40, i8259[0]);



    for(VAR_11 = 0; VAR_11 < MAX_SERIAL_PORTS; VAR_11++) {

        if (serial_hds[VAR_11]) {

            serial_init(serial_io[VAR_11], i8259[serial_irq[VAR_11]], 115200,

                        serial_hds[VAR_11]);

        }

    }



    isa_vga_init(VAR_3, phys_ram_base + VAR_0, VAR_0,

                 VAR_1);



    if (nd_table[0].vlan) {

        if (nd_table[VAR_11].model == NULL) {

	    nd_table[VAR_11].model = "ne2k_isa";

        }

        if (strcmp(nd_table[0].model, "ne2k_isa") == 0) {

            isa_ne2000_init(0x300, i8259[9], &nd_table[0]);

        } else if (strcmp(nd_table[0].model, "?") == 0) {

            fprintf(stderr, "qemu: Supported NICs: ne2k_isa\n");

            exit (1);

        } else {

            fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);

            exit (1);

        }

    }



    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {

        fprintf(stderr, "qemu: too many IDE bus\n");

        exit(1);

    }



    for(VAR_11 = 0; VAR_11 < MAX_IDE_BUS * MAX_IDE_DEVS; VAR_11++) {

        VAR_12 = drive_get_index(IF_IDE, VAR_11 / MAX_IDE_DEVS, VAR_11 % MAX_IDE_DEVS);

        if (VAR_12 != -1)

            hd[VAR_11] = drives_table[VAR_12].bdrv;

        else

            hd[VAR_11] = NULL;

    }



    for(VAR_11 = 0; VAR_11 < MAX_IDE_BUS; VAR_11++)

        isa_ide_init(ide_iobase[VAR_11], ide_iobase2[VAR_11], i8259[ide_irq[VAR_11]],

                     hd[MAX_IDE_DEVS * VAR_11],

		     hd[MAX_IDE_DEVS * VAR_11 + 1]);



    i8042_init(i8259[1], i8259[12], 0x60);

}

void FUNC_0 (ram_addr_t VAR_0, int VAR_1,
const char *VAR_2, DisplayState *VAR_3,
const char *VAR_4, const char *VAR_5,
const char *VAR_6, const char *VAR_7)
{ char VAR_8[1024]; unsigned long VAR_9; int VAR_10; CPUState *env; RTCState *rtc_state; int VAR_11; qemu_irq *i8259; int VAR_12; BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; if (VAR_7 == NULL) { #ifdef TARGET_MIPS64
VAR_7 = "R4000"; #else
VAR_7 = "24Kf"; #endif
} env = cpu_init(VAR_7); if (!env) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } qemu_register_reset(main_cpu_reset, env); cpu_register_physical_memory(0, VAR_0, IO_MEM_RAM); if (!mips_qemu_iomemtype) { mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
mips_qemu_write, NULL); } cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype); VAR_9 = VAR_0 + VAR_1; if (bios_name == NULL)
bios_name = BIOS_FILENAME; snprintf(VAR_8, sizeof(VAR_8), "%s/%s", bios_dir, bios_name); VAR_10 = load_image(VAR_8, phys_ram_base + VAR_9); if ((VAR_10 > 0) && (VAR_10 <= BIOS_SIZE)) { cpu_register_physical_memory(0x1fc00000,
BIOS_SIZE, VAR_9 | IO_MEM_ROM); } else if ((VAR_12 = drive_get_index(IF_PFLASH, 0, 0)) > -1) { uint32_t mips_rom = 0x00400000; cpu_register_physical_memory(0x1fc00000, mips_rom,
qemu_ram_alloc(mips_rom) | IO_MEM_ROM); if (!pflash_cfi01_register(0x1fc00000, qemu_ram_alloc(mips_rom),
drives_table[VAR_12].bdrv, sector_len, mips_rom / sector_len,
4, 0, 0, 0, 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); } } else { fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
VAR_8); } if (VAR_4) { loaderparams.VAR_0 = VAR_0; loaderparams.VAR_4 = VAR_4; loaderparams.VAR_5 = VAR_5; loaderparams.VAR_6 = VAR_6; load_kernel (env); } cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); i8259 = i8259_init(env->irq[2]); rtc_state = rtc_init(0x70, i8259[8]); isa_mmio_init(0x14000000, 0x00010000); isa_mem_base = 0x10000000; pit = pit_init(0x40, i8259[0]); for(VAR_11 = 0; VAR_11 < MAX_SERIAL_PORTS; VAR_11++) { if (serial_hds[VAR_11]) { serial_init(serial_io[VAR_11], i8259[serial_irq[VAR_11]], 115200,
serial_hds[VAR_11]); } } isa_vga_init(VAR_3, phys_ram_base + VAR_0, VAR_0,
VAR_1); if (nd_table[0].vlan) { if (nd_table[VAR_11].model == NULL) { nd_table[VAR_11].model = "ne2k_isa"; } if (strcmp(nd_table[0].model, "ne2k_isa") == 0) { isa_ne2000_init(0x300, i8259[9], &nd_table[0]); } else if (strcmp(nd_table[0].model, "?") == 0) { fprintf(stderr, "qemu: Supported NICs: ne2k_isa\n"); exit (1); } else { fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model); exit (1); } } if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) { fprintf(stderr, "qemu: too many IDE bus\n"); exit(1); } for(VAR_11 = 0; VAR_11 < MAX_IDE_BUS * MAX_IDE_DEVS; VAR_11++) { VAR_12 = drive_get_index(IF_IDE, VAR_11 / MAX_IDE_DEVS, VAR_11 % MAX_IDE_DEVS); if (VAR_12 != -1)
hd[VAR_11] = drives_table[VAR_12].bdrv; else
hd[VAR_11] = NULL; } for(VAR_11 = 0; VAR_11 < MAX_IDE_BUS; VAR_11++) isa_ide_init(ide_iobase[VAR_11], ide_iobase2[VAR_11], i8259[ide_irq[VAR_11]],
hd[MAX_IDE_DEVS * VAR_11],
hd[MAX_IDE_DEVS * VAR_11 + 1]); i8042_init(i8259[1], i8259[12], 0x60); }