static int pxa2xx_pic_load(QEMUFile *f, void *opaque, int version_id)

{

    PXA2xxPICState *s = (PXA2xxPICState *) opaque;

    int i;



    for (i = 0; i < 2; i ++)

        qemu_get_be32s(f, &s->int_enabled[i]);

    for (i = 0; i < 2; i ++)

        qemu_get_be32s(f, &s->int_pending[i]);

    for (i = 0; i < 2; i ++)

        qemu_get_be32s(f, &s->is_fiq[i]);

    qemu_get_be32s(f, &s->int_idle);

    for (i = 0; i < PXA2XX_PIC_SRCS; i ++)

        qemu_get_be32s(f, &s->priority[i]);



    pxa2xx_pic_update(opaque);

    return 0;

}

static int pxa2xx_pic_load(QEMUFile *f, void *opaque, int version_id)

{

    PXA2xxPICState *s = (PXA2xxPICState *) opaque;

    int i;



    for (i = 0; i < 2; i ++)

        qemu_get_be32s(f, &s->int_enabled[i]);

    for (i = 0; i < 2; i ++)

        qemu_get_be32s(f, &s->int_pending[i]);

    for (i = 0; i < 2; i ++)

        qemu_get_be32s(f, &s->is_fiq[i]);

    qemu_get_be32s(f, &s->int_idle);

    for (i = 0; i < PXA2XX_PIC_SRCS; i ++)

        qemu_get_be32s(f, &s->priority[i]);



    pxa2xx_pic_update(opaque);

    return 0;

}

static int FUNC_0(QEMUFile *VAR_0, void *VAR_1, int VAR_2)

{

    PXA2xxPICState *s = (PXA2xxPICState *) VAR_1;

    int VAR_3;



    for (VAR_3 = 0; VAR_3 < 2; VAR_3 ++)

        qemu_get_be32s(VAR_0, &s->int_enabled[VAR_3]);

    for (VAR_3 = 0; VAR_3 < 2; VAR_3 ++)

        qemu_get_be32s(VAR_0, &s->int_pending[VAR_3]);

    for (VAR_3 = 0; VAR_3 < 2; VAR_3 ++)

        qemu_get_be32s(VAR_0, &s->is_fiq[VAR_3]);

    qemu_get_be32s(VAR_0, &s->int_idle);

    for (VAR_3 = 0; VAR_3 < PXA2XX_PIC_SRCS; VAR_3 ++)

        qemu_get_be32s(VAR_0, &s->priority[VAR_3]);



    pxa2xx_pic_update(VAR_1);

    return 0;

}

static int FUNC_0(QEMUFile *VAR_0, void *VAR_1, int VAR_2)
{ PXA2xxPICState *s = (PXA2xxPICState *) VAR_1; int VAR_3; for (VAR_3 = 0; VAR_3 < 2; VAR_3 ++) qemu_get_be32s(VAR_0, &s->int_enabled[VAR_3]); for (VAR_3 = 0; VAR_3 < 2; VAR_3 ++) qemu_get_be32s(VAR_0, &s->int_pending[VAR_3]); for (VAR_3 = 0; VAR_3 < 2; VAR_3 ++) qemu_get_be32s(VAR_0, &s->is_fiq[VAR_3]); qemu_get_be32s(VAR_0, &s->int_idle); for (VAR_3 = 0; VAR_3 < PXA2XX_PIC_SRCS; VAR_3 ++) qemu_get_be32s(VAR_0, &s->priority[VAR_3]); pxa2xx_pic_update(VAR_1); return 0; }