static int usb_xhci_post_load(void *opaque, int version_id)

{

    XHCIState *xhci = opaque;

    PCIDevice *pci_dev = PCI_DEVICE(xhci);

    XHCISlot *slot;

    XHCIEPContext *epctx;

    dma_addr_t dcbaap, pctx;

    uint32_t slot_ctx[4];

    uint32_t ep_ctx[5];

    int slotid, epid, state, intr;



    dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high);



    for (slotid = 1; slotid <= xhci->numslots; slotid++) {

        slot = &xhci->slots[slotid-1];

        if (!slot->addressed) {



        slot->ctx =

            xhci_mask64(ldq_le_pci_dma(pci_dev, dcbaap + 8 * slotid));

        xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx));

        slot->uport = xhci_lookup_uport(xhci, slot_ctx);







        assert(slot->uport && slot->uport->dev);



        for (epid = 1; epid <= 31; epid++) {

            pctx = slot->ctx + 32 * epid;

            xhci_dma_read_u32s(xhci, pctx, ep_ctx, sizeof(ep_ctx));

            state = ep_ctx[0] & EP_STATE_MASK;

            if (state == EP_DISABLED) {



            epctx = xhci_alloc_epctx(xhci, slotid, epid);

            slot->eps[epid-1] = epctx;

            xhci_init_epctx(epctx, pctx, ep_ctx);

            epctx->state = state;

            if (state == EP_RUNNING) {

                /* kick endpoint after vmload is finished */

                timer_mod(epctx->kick_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));






    for (intr = 0; intr < xhci->numintrs; intr++) {

        if (xhci->intr[intr].msix_used) {

            msix_vector_use(pci_dev, intr);

        } else {

            msix_vector_unuse(pci_dev, intr);





    return 0;

static int usb_xhci_post_load(void *opaque, int version_id)

{

    XHCIState *xhci = opaque;

    PCIDevice *pci_dev = PCI_DEVICE(xhci);

    XHCISlot *slot;

    XHCIEPContext *epctx;

    dma_addr_t dcbaap, pctx;

    uint32_t slot_ctx[4];

    uint32_t ep_ctx[5];

    int slotid, epid, state, intr;



    dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high);



    for (slotid = 1; slotid <= xhci->numslots; slotid++) {

        slot = &xhci->slots[slotid-1];

        if (!slot->addressed) {



        slot->ctx =

            xhci_mask64(ldq_le_pci_dma(pci_dev, dcbaap + 8 * slotid));

        xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx));

        slot->uport = xhci_lookup_uport(xhci, slot_ctx);







        assert(slot->uport && slot->uport->dev);



        for (epid = 1; epid <= 31; epid++) {

            pctx = slot->ctx + 32 * epid;

            xhci_dma_read_u32s(xhci, pctx, ep_ctx, sizeof(ep_ctx));

            state = ep_ctx[0] & EP_STATE_MASK;

            if (state == EP_DISABLED) {



            epctx = xhci_alloc_epctx(xhci, slotid, epid);

            slot->eps[epid-1] = epctx;

            xhci_init_epctx(epctx, pctx, ep_ctx);

            epctx->state = state;

            if (state == EP_RUNNING) {

                

                timer_mod(epctx->kick_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));






    for (intr = 0; intr < xhci->numintrs; intr++) {

        if (xhci->intr[intr].msix_used) {

            msix_vector_use(pci_dev, intr);

        } else {

            msix_vector_unuse(pci_dev, intr);





    return 0;

static int FUNC_0(void *VAR_0, int VAR_1)

{

    XHCIState *xhci = VAR_0;

    PCIDevice *pci_dev = PCI_DEVICE(xhci);

    XHCISlot *slot;

    XHCIEPContext *epctx;

    dma_addr_t dcbaap, pctx;

    uint32_t slot_ctx[4];

    uint32_t ep_ctx[5];

    int VAR_2, VAR_3, VAR_4, VAR_5;



    dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high);



    for (VAR_2 = 1; VAR_2 <= xhci->numslots; VAR_2++) {

        slot = &xhci->slots[VAR_2-1];

        if (!slot->addressed) {



        slot->ctx =

            xhci_mask64(ldq_le_pci_dma(pci_dev, dcbaap + 8 * VAR_2));

        xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx));

        slot->uport = xhci_lookup_uport(xhci, slot_ctx);







        assert(slot->uport && slot->uport->dev);



        for (VAR_3 = 1; VAR_3 <= 31; VAR_3++) {

            pctx = slot->ctx + 32 * VAR_3;

            xhci_dma_read_u32s(xhci, pctx, ep_ctx, sizeof(ep_ctx));

            VAR_4 = ep_ctx[0] & EP_STATE_MASK;

            if (VAR_4 == EP_DISABLED) {



            epctx = xhci_alloc_epctx(xhci, VAR_2, VAR_3);

            slot->eps[VAR_3-1] = epctx;

            xhci_init_epctx(epctx, pctx, ep_ctx);

            epctx->VAR_4 = VAR_4;

            if (VAR_4 == EP_RUNNING) {

                

                timer_mod(epctx->kick_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));






    for (VAR_5 = 0; VAR_5 < xhci->numintrs; VAR_5++) {

        if (xhci->VAR_5[VAR_5].msix_used) {

            msix_vector_use(pci_dev, VAR_5);

        } else {

            msix_vector_unuse(pci_dev, VAR_5);





    return 0;

static int FUNC_0(void *VAR_0, int VAR_1)
{ XHCIState *xhci = VAR_0; PCIDevice *pci_dev = PCI_DEVICE(xhci); XHCISlot *slot; XHCIEPContext *epctx; dma_addr_t dcbaap, pctx; uint32_t slot_ctx[4]; uint32_t ep_ctx[5]; int VAR_2, VAR_3, VAR_4, VAR_5; dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); for (VAR_2 = 1; VAR_2 <= xhci->numslots; VAR_2++) { slot = &xhci->slots[VAR_2-1]; if (!slot->addressed) { slot->ctx =
xhci_mask64(ldq_le_pci_dma(pci_dev, dcbaap + 8 * VAR_2)); xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx)); slot->uport = xhci_lookup_uport(xhci, slot_ctx); assert(slot->uport && slot->uport->dev); for (VAR_3 = 1; VAR_3 <= 31; VAR_3++) { pctx = slot->ctx + 32 * VAR_3; xhci_dma_read_u32s(xhci, pctx, ep_ctx, sizeof(ep_ctx)); VAR_4 = ep_ctx[0] & EP_STATE_MASK; if (VAR_4 == EP_DISABLED) { epctx = xhci_alloc_epctx(xhci, VAR_2, VAR_3); slot->eps[VAR_3-1] = epctx; xhci_init_epctx(epctx, pctx, ep_ctx); epctx->VAR_4 = VAR_4; if (VAR_4 == EP_RUNNING) { timer_mod(epctx->kick_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); for (VAR_5 = 0; VAR_5 < xhci->numintrs; VAR_5++) { if (xhci->VAR_5[VAR_5].msix_used) { msix_vector_use(pci_dev, VAR_5); } else { msix_vector_unuse(pci_dev, VAR_5); return 0;