int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,

                               int mmu_idx, int is_softmmu)

{

	struct cris_mmu_result res;

	int prot, miss;

	int r = -1;

	target_ulong phy;



	D(printf ("%s addr=%x pc=%x rw=%x\n", __func__, address, env->pc, rw));

	miss = cris_mmu_translate(&res, env, address & TARGET_PAGE_MASK,

				  rw, mmu_idx, 0);

	if (miss)

	{

		if (env->exception_index == EXCP_BUSFAULT)

			cpu_abort(env,

				  "CRIS: Illegal recursive bus fault."

				 "addr=%x rw=%d\n",

				 address, rw);



		env->pregs[PR_EDA] = address;

		env->exception_index = EXCP_BUSFAULT;

		env->fault_vector = res.bf_vec;

		r = 1;

	}

	else

	{

		/*

		 * Mask off the cache selection bit. The ETRAX busses do not

		 * see the top bit.

		 */

		phy = res.phy & ~0x80000000;

		prot = res.prot;

		tlb_set_page(env, address & TARGET_PAGE_MASK, phy,

                             prot | PAGE_EXEC, mmu_idx, TARGET_PAGE_SIZE);

                r = 0;

	}

	if (r > 0)

		D_LOG("%s returns %d irqreq=%x addr=%x"

			  " phy=%x ismmu=%d vec=%x pc=%x\n", 

			  __func__, r, env->interrupt_request, 

			  address, res.phy, is_softmmu, res.bf_vec, env->pc);

	return r;

}

int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,

                               int mmu_idx, int is_softmmu)

{

	struct cris_mmu_result res;

	int prot, miss;

	int r = -1;

	target_ulong phy;



	D(printf ("%s addr=%x pc=%x rw=%x\n", __func__, address, env->pc, rw));

	miss = cris_mmu_translate(&res, env, address & TARGET_PAGE_MASK,

				  rw, mmu_idx, 0);

	if (miss)

	{

		if (env->exception_index == EXCP_BUSFAULT)

			cpu_abort(env,

				  "CRIS: Illegal recursive bus fault."

				 "addr=%x rw=%d\n",

				 address, rw);



		env->pregs[PR_EDA] = address;

		env->exception_index = EXCP_BUSFAULT;

		env->fault_vector = res.bf_vec;

		r = 1;

	}

	else

	{

		







		phy = res.phy & ~0x80000000;

		prot = res.prot;

		tlb_set_page(env, address & TARGET_PAGE_MASK, phy,

                             prot | PAGE_EXEC, mmu_idx, TARGET_PAGE_SIZE);

                r = 0;

	}

	if (r > 0)

		D_LOG("%s returns %d irqreq=%x addr=%x"

			  " phy=%x ismmu=%d vec=%x pc=%x\n", 

			  __func__, r, env->interrupt_request, 

			  address, res.phy, is_softmmu, res.bf_vec, env->pc);

	return r;

}

int FUNC_0 (CPUState *VAR_0, target_ulong VAR_1, int VAR_2,

                               int VAR_3, int VAR_4)

{

	struct cris_mmu_result VAR_5;

	int VAR_6, VAR_7;

	int VAR_8 = -1;

	target_ulong phy;



	D(printf ("%s addr=%x pc=%x VAR_2=%x\n", __func__, VAR_1, VAR_0->pc, VAR_2));

	VAR_7 = cris_mmu_translate(&VAR_5, VAR_0, VAR_1 & TARGET_PAGE_MASK,

				  VAR_2, VAR_3, 0);

	if (VAR_7)

	{

		if (VAR_0->exception_index == EXCP_BUSFAULT)

			cpu_abort(VAR_0,

				  "CRIS: Illegal recursive bus fault."

				 "addr=%x VAR_2=%d\n",

				 VAR_1, VAR_2);



		VAR_0->pregs[PR_EDA] = VAR_1;

		VAR_0->exception_index = EXCP_BUSFAULT;

		VAR_0->fault_vector = VAR_5.bf_vec;

		VAR_8 = 1;

	}

	else

	{

		







		phy = VAR_5.phy & ~0x80000000;

		VAR_6 = VAR_5.VAR_6;

		tlb_set_page(VAR_0, VAR_1 & TARGET_PAGE_MASK, phy,

                             VAR_6 | PAGE_EXEC, VAR_3, TARGET_PAGE_SIZE);

                VAR_8 = 0;

	}

	if (VAR_8 > 0)

		D_LOG("%s returns %d irqreq=%x addr=%x"

			  " phy=%x ismmu=%d vec=%x pc=%x\n", 

			  __func__, VAR_8, VAR_0->interrupt_request, 

			  VAR_1, VAR_5.phy, VAR_4, VAR_5.bf_vec, VAR_0->pc);

	return VAR_8;

}

int FUNC_0 (CPUState *VAR_0, target_ulong VAR_1, int VAR_2,
int VAR_3, int VAR_4)
{ struct cris_mmu_result VAR_5; int VAR_6, VAR_7; int VAR_8 = -1; target_ulong phy; D(printf ("%s addr=%x pc=%x VAR_2=%x\n", __func__, VAR_1, VAR_0->pc, VAR_2)); VAR_7 = cris_mmu_translate(&VAR_5, VAR_0, VAR_1 & TARGET_PAGE_MASK,
VAR_2, VAR_3, 0); if (VAR_7)
{ if (VAR_0->exception_index == EXCP_BUSFAULT)
cpu_abort(VAR_0,
"CRIS: Illegal recursive bus fault."
"addr=%x VAR_2=%d\n",
VAR_1, VAR_2); VAR_0->pregs[PR_EDA] = VAR_1; VAR_0->exception_index = EXCP_BUSFAULT; VAR_0->fault_vector = VAR_5.bf_vec; VAR_8 = 1; } else
{ phy = VAR_5.phy & ~0x80000000; VAR_6 = VAR_5.VAR_6; tlb_set_page(VAR_0, VAR_1 & TARGET_PAGE_MASK, phy,
VAR_6 | PAGE_EXEC, VAR_3, TARGET_PAGE_SIZE); VAR_8 = 0; } if (VAR_8 > 0)
D_LOG("%s returns %d irqreq=%x addr=%x"
" phy=%x ismmu=%d vec=%x pc=%x\n",
__func__, VAR_8, VAR_0->interrupt_request,
VAR_1, VAR_5.phy, VAR_4, VAR_5.bf_vec, VAR_0->pc); return VAR_8; }