static void quantize_and_encode_band_cost_ESC_mips(struct AACEncContext *s,

                                                   PutBitContext *pb, const float *in, float *out,

                                                   const float *scaled, int size, int scale_idx,

                                                   int cb, const float lambda, const float uplim,

                                                   int *bits, const float ROUNDING)

{

    const float Q34 = ff_aac_pow34sf_tab[POW_SF2_ZERO - scale_idx + SCALE_ONE_POS - SCALE_DIV_512];

    const float IQ  = ff_aac_pow2sf_tab [POW_SF2_ZERO + scale_idx - SCALE_ONE_POS + SCALE_DIV_512];

    int i;

    int qc1, qc2, qc3, qc4;



    uint8_t  *p_bits    = (uint8_t* )ff_aac_spectral_bits[cb-1];

    uint16_t *p_codes   = (uint16_t*)ff_aac_spectral_codes[cb-1];

    float    *p_vectors = (float*   )ff_aac_codebook_vectors[cb-1];



    abs_pow34_v(s->scoefs, in, size);

    scaled = s->scoefs;



    if (cb < 11) {

        for (i = 0; i < size; i += 4) {

            int curidx, curidx2, sign1, count1, sign2, count2;

            int *in_int = (int *)&in[i];

            uint8_t v_bits;

            unsigned int v_codes;

            int t0, t1, t2, t3, t4;

            const float *vec1, *vec2;



            qc1 = scaled[i  ] * Q34 + ROUNDING;

            qc2 = scaled[i+1] * Q34 + ROUNDING;

            qc3 = scaled[i+2] * Q34 + ROUNDING;

            qc4 = scaled[i+3] * Q34 + ROUNDING;



            __asm__ volatile (

                ".set push                                  \n\t"

                ".set noreorder                             \n\t"



                "ori        %[t4],      $zero,      16      \n\t"

                "ori        %[sign1],   $zero,      0       \n\t"

                "ori        %[sign2],   $zero,      0       \n\t"

                "slt        %[t0],      %[t4],      %[qc1]  \n\t"

                "slt        %[t1],      %[t4],      %[qc2]  \n\t"

                "slt        %[t2],      %[t4],      %[qc3]  \n\t"

                "slt        %[t3],      %[t4],      %[qc4]  \n\t"

                "movn       %[qc1],     %[t4],      %[t0]   \n\t"

                "movn       %[qc2],     %[t4],      %[t1]   \n\t"

                "movn       %[qc3],     %[t4],      %[t2]   \n\t"

                "movn       %[qc4],     %[t4],      %[t3]   \n\t"

                "lw         %[t0],      0(%[in_int])        \n\t"

                "lw         %[t1],      4(%[in_int])        \n\t"

                "lw         %[t2],      8(%[in_int])        \n\t"

                "lw         %[t3],      12(%[in_int])       \n\t"

                "slt        %[t0],      %[t0],      $zero   \n\t"

                "movn       %[sign1],   %[t0],      %[qc1]  \n\t"

                "slt        %[t2],      %[t2],      $zero   \n\t"

                "movn       %[sign2],   %[t2],      %[qc3]  \n\t"

                "slt        %[t1],      %[t1],      $zero   \n\t"

                "sll        %[t0],      %[sign1],   1       \n\t"

                "or         %[t0],      %[t0],      %[t1]   \n\t"

                "movn       %[sign1],   %[t0],      %[qc2]  \n\t"

                "slt        %[t3],      %[t3],      $zero   \n\t"

                "sll        %[t0],      %[sign2],   1       \n\t"

                "or         %[t0],      %[t0],      %[t3]   \n\t"

                "movn       %[sign2],   %[t0],      %[qc4]  \n\t"

                "slt        %[count1],  $zero,      %[qc1]  \n\t"

                "slt        %[t1],      $zero,      %[qc2]  \n\t"

                "slt        %[count2],  $zero,      %[qc3]  \n\t"

                "slt        %[t2],      $zero,      %[qc4]  \n\t"

                "addu       %[count1],  %[count1],  %[t1]   \n\t"

                "addu       %[count2],  %[count2],  %[t2]   \n\t"



                ".set pop                                   \n\t"



                : [qc1]"+r"(qc1), [qc2]"+r"(qc2),

                  [qc3]"+r"(qc3), [qc4]"+r"(qc4),

                  [sign1]"=&r"(sign1), [count1]"=&r"(count1),

                  [sign2]"=&r"(sign2), [count2]"=&r"(count2),

                  [t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3),

                  [t4]"=&r"(t4)

                : [in_int]"r"(in_int)

                : "memory"

            );



            curidx = 17 * qc1;

            curidx += qc2;

            curidx2 = 17 * qc3;

            curidx2 += qc4;



            v_codes = (p_codes[curidx] << count1) | sign1;

            v_bits  = p_bits[curidx] + count1;

            put_bits(pb, v_bits, v_codes);



            v_codes = (p_codes[curidx2] << count2) | sign2;

            v_bits  = p_bits[curidx2] + count2;

            put_bits(pb, v_bits, v_codes);



            if (out) {

               vec1 = &p_vectors[curidx*2 ];

               vec2 = &p_vectors[curidx2*2];

               out[i+0] = copysignf(vec1[0] * IQ, in[i+0]);

               out[i+1] = copysignf(vec1[1] * IQ, in[i+1]);

               out[i+2] = copysignf(vec2[0] * IQ, in[i+2]);

               out[i+3] = copysignf(vec2[1] * IQ, in[i+3]);

            }

        }

    } else {

        for (i = 0; i < size; i += 4) {

            int curidx, curidx2, sign1, count1, sign2, count2;

            int *in_int = (int *)&in[i];

            uint8_t v_bits;

            unsigned int v_codes;

            int c1, c2, c3, c4;

            int t0, t1, t2, t3, t4;

            const float *vec1, *vec2;



            qc1 = scaled[i  ] * Q34 + ROUNDING;

            qc2 = scaled[i+1] * Q34 + ROUNDING;

            qc3 = scaled[i+2] * Q34 + ROUNDING;

            qc4 = scaled[i+3] * Q34 + ROUNDING;



            __asm__ volatile (

                ".set push                                  \n\t"

                ".set noreorder                             \n\t"



                "ori        %[t4],      $zero,      16      \n\t"

                "ori        %[sign1],   $zero,      0       \n\t"

                "ori        %[sign2],   $zero,      0       \n\t"

                "shll_s.w   %[c1],      %[qc1],     18      \n\t"

                "shll_s.w   %[c2],      %[qc2],     18      \n\t"

                "shll_s.w   %[c3],      %[qc3],     18      \n\t"

                "shll_s.w   %[c4],      %[qc4],     18      \n\t"

                "srl        %[c1],      %[c1],      18      \n\t"

                "srl        %[c2],      %[c2],      18      \n\t"

                "srl        %[c3],      %[c3],      18      \n\t"

                "srl        %[c4],      %[c4],      18      \n\t"

                "slt        %[t0],      %[t4],      %[qc1]  \n\t"

                "slt        %[t1],      %[t4],      %[qc2]  \n\t"

                "slt        %[t2],      %[t4],      %[qc3]  \n\t"

                "slt        %[t3],      %[t4],      %[qc4]  \n\t"

                "movn       %[qc1],     %[t4],      %[t0]   \n\t"

                "movn       %[qc2],     %[t4],      %[t1]   \n\t"

                "movn       %[qc3],     %[t4],      %[t2]   \n\t"

                "movn       %[qc4],     %[t4],      %[t3]   \n\t"

                "lw         %[t0],      0(%[in_int])        \n\t"

                "lw         %[t1],      4(%[in_int])        \n\t"

                "lw         %[t2],      8(%[in_int])        \n\t"

                "lw         %[t3],      12(%[in_int])       \n\t"

                "slt        %[t0],      %[t0],      $zero   \n\t"

                "movn       %[sign1],   %[t0],      %[qc1]  \n\t"

                "slt        %[t2],      %[t2],      $zero   \n\t"

                "movn       %[sign2],   %[t2],      %[qc3]  \n\t"

                "slt        %[t1],      %[t1],      $zero   \n\t"

                "sll        %[t0],      %[sign1],   1       \n\t"

                "or         %[t0],      %[t0],      %[t1]   \n\t"

                "movn       %[sign1],   %[t0],      %[qc2]  \n\t"

                "slt        %[t3],      %[t3],      $zero   \n\t"

                "sll        %[t0],      %[sign2],   1       \n\t"

                "or         %[t0],      %[t0],      %[t3]   \n\t"

                "movn       %[sign2],   %[t0],      %[qc4]  \n\t"

                "slt        %[count1],  $zero,      %[qc1]  \n\t"

                "slt        %[t1],      $zero,      %[qc2]  \n\t"

                "slt        %[count2],  $zero,      %[qc3]  \n\t"

                "slt        %[t2],      $zero,      %[qc4]  \n\t"

                "addu       %[count1],  %[count1],  %[t1]   \n\t"

                "addu       %[count2],  %[count2],  %[t2]   \n\t"



                ".set pop                                   \n\t"



                : [qc1]"+r"(qc1), [qc2]"+r"(qc2),

                  [qc3]"+r"(qc3), [qc4]"+r"(qc4),

                  [sign1]"=&r"(sign1), [count1]"=&r"(count1),

                  [sign2]"=&r"(sign2), [count2]"=&r"(count2),

                  [c1]"=&r"(c1), [c2]"=&r"(c2),

                  [c3]"=&r"(c3), [c4]"=&r"(c4),

                  [t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3),

                  [t4]"=&r"(t4)

                : [in_int]"r"(in_int)

                : "memory"

            );



            curidx = 17 * qc1;

            curidx += qc2;



            curidx2 = 17 * qc3;

            curidx2 += qc4;



            v_codes = (p_codes[curidx] << count1) | sign1;

            v_bits  = p_bits[curidx] + count1;

            put_bits(pb, v_bits, v_codes);



            if (p_vectors[curidx*2  ] == 64.0f) {

                int len = av_log2(c1);

                v_codes = (((1 << (len - 3)) - 2) << len) | (c1 & ((1 << len) - 1));

                put_bits(pb, len * 2 - 3, v_codes);

            }

            if (p_vectors[curidx*2+1] == 64.0f) {

                int len = av_log2(c2);

                v_codes = (((1 << (len - 3)) - 2) << len) | (c2 & ((1 << len) - 1));

                put_bits(pb, len*2-3, v_codes);

            }



            v_codes = (p_codes[curidx2] << count2) | sign2;

            v_bits  = p_bits[curidx2] + count2;

            put_bits(pb, v_bits, v_codes);



            if (p_vectors[curidx2*2  ] == 64.0f) {

                int len = av_log2(c3);

                v_codes = (((1 << (len - 3)) - 2) << len) | (c3 & ((1 << len) - 1));

                put_bits(pb, len* 2 - 3, v_codes);

            }

            if (p_vectors[curidx2*2+1] == 64.0f) {

                int len = av_log2(c4);

                v_codes = (((1 << (len - 3)) - 2) << len) | (c4 & ((1 << len) - 1));

                put_bits(pb, len * 2 - 3, v_codes);

            }



            if (out) {

               vec1 = &p_vectors[curidx*2];

               vec2 = &p_vectors[curidx2*2];

               out[i+0] = copysignf(c1 * cbrtf(c1) * IQ, in[i+0]);

               out[i+1] = copysignf(c2 * cbrtf(c2) * IQ, in[i+1]);

               out[i+2] = copysignf(c3 * cbrtf(c3) * IQ, in[i+2]);

               out[i+3] = copysignf(c4 * cbrtf(c4) * IQ, in[i+3]);

            }

        }

    }

}

static void quantize_and_encode_band_cost_ESC_mips(struct AACEncContext *s,

                                                   PutBitContext *pb, const float *in, float *out,

                                                   const float *scaled, int size, int scale_idx,

                                                   int cb, const float lambda, const float uplim,

                                                   int *bits, const float ROUNDING)

{

    const float Q34 = ff_aac_pow34sf_tab[POW_SF2_ZERO - scale_idx + SCALE_ONE_POS - SCALE_DIV_512];

    const float IQ  = ff_aac_pow2sf_tab [POW_SF2_ZERO + scale_idx - SCALE_ONE_POS + SCALE_DIV_512];

    int i;

    int qc1, qc2, qc3, qc4;



    uint8_t  *p_bits    = (uint8_t* )ff_aac_spectral_bits[cb-1];

    uint16_t *p_codes   = (uint16_t*)ff_aac_spectral_codes[cb-1];

    float    *p_vectors = (float*   )ff_aac_codebook_vectors[cb-1];



    abs_pow34_v(s->scoefs, in, size);

    scaled = s->scoefs;



    if (cb < 11) {

        for (i = 0; i < size; i += 4) {

            int curidx, curidx2, sign1, count1, sign2, count2;

            int *in_int = (int *)&in[i];

            uint8_t v_bits;

            unsigned int v_codes;

            int t0, t1, t2, t3, t4;

            const float *vec1, *vec2;



            qc1 = scaled[i  ] * Q34 + ROUNDING;

            qc2 = scaled[i+1] * Q34 + ROUNDING;

            qc3 = scaled[i+2] * Q34 + ROUNDING;

            qc4 = scaled[i+3] * Q34 + ROUNDING;



            __asm__ volatile (

                ".set push                                  \n\t"

                ".set noreorder                             \n\t"



                "ori        %[t4],      $zero,      16      \n\t"

                "ori        %[sign1],   $zero,      0       \n\t"

                "ori        %[sign2],   $zero,      0       \n\t"

                "slt        %[t0],      %[t4],      %[qc1]  \n\t"

                "slt        %[t1],      %[t4],      %[qc2]  \n\t"

                "slt        %[t2],      %[t4],      %[qc3]  \n\t"

                "slt        %[t3],      %[t4],      %[qc4]  \n\t"

                "movn       %[qc1],     %[t4],      %[t0]   \n\t"

                "movn       %[qc2],     %[t4],      %[t1]   \n\t"

                "movn       %[qc3],     %[t4],      %[t2]   \n\t"

                "movn       %[qc4],     %[t4],      %[t3]   \n\t"

                "lw         %[t0],      0(%[in_int])        \n\t"

                "lw         %[t1],      4(%[in_int])        \n\t"

                "lw         %[t2],      8(%[in_int])        \n\t"

                "lw         %[t3],      12(%[in_int])       \n\t"

                "slt        %[t0],      %[t0],      $zero   \n\t"

                "movn       %[sign1],   %[t0],      %[qc1]  \n\t"

                "slt        %[t2],      %[t2],      $zero   \n\t"

                "movn       %[sign2],   %[t2],      %[qc3]  \n\t"

                "slt        %[t1],      %[t1],      $zero   \n\t"

                "sll        %[t0],      %[sign1],   1       \n\t"

                "or         %[t0],      %[t0],      %[t1]   \n\t"

                "movn       %[sign1],   %[t0],      %[qc2]  \n\t"

                "slt        %[t3],      %[t3],      $zero   \n\t"

                "sll        %[t0],      %[sign2],   1       \n\t"

                "or         %[t0],      %[t0],      %[t3]   \n\t"

                "movn       %[sign2],   %[t0],      %[qc4]  \n\t"

                "slt        %[count1],  $zero,      %[qc1]  \n\t"

                "slt        %[t1],      $zero,      %[qc2]  \n\t"

                "slt        %[count2],  $zero,      %[qc3]  \n\t"

                "slt        %[t2],      $zero,      %[qc4]  \n\t"

                "addu       %[count1],  %[count1],  %[t1]   \n\t"

                "addu       %[count2],  %[count2],  %[t2]   \n\t"



                ".set pop                                   \n\t"



                : [qc1]"+r"(qc1), [qc2]"+r"(qc2),

                  [qc3]"+r"(qc3), [qc4]"+r"(qc4),

                  [sign1]"=&r"(sign1), [count1]"=&r"(count1),

                  [sign2]"=&r"(sign2), [count2]"=&r"(count2),

                  [t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3),

                  [t4]"=&r"(t4)

                : [in_int]"r"(in_int)

                : "memory"

            );



            curidx = 17 * qc1;

            curidx += qc2;

            curidx2 = 17 * qc3;

            curidx2 += qc4;



            v_codes = (p_codes[curidx] << count1) | sign1;

            v_bits  = p_bits[curidx] + count1;

            put_bits(pb, v_bits, v_codes);



            v_codes = (p_codes[curidx2] << count2) | sign2;

            v_bits  = p_bits[curidx2] + count2;

            put_bits(pb, v_bits, v_codes);



            if (out) {

               vec1 = &p_vectors[curidx*2 ];

               vec2 = &p_vectors[curidx2*2];

               out[i+0] = copysignf(vec1[0] * IQ, in[i+0]);

               out[i+1] = copysignf(vec1[1] * IQ, in[i+1]);

               out[i+2] = copysignf(vec2[0] * IQ, in[i+2]);

               out[i+3] = copysignf(vec2[1] * IQ, in[i+3]);

            }

        }

    } else {

        for (i = 0; i < size; i += 4) {

            int curidx, curidx2, sign1, count1, sign2, count2;

            int *in_int = (int *)&in[i];

            uint8_t v_bits;

            unsigned int v_codes;

            int c1, c2, c3, c4;

            int t0, t1, t2, t3, t4;

            const float *vec1, *vec2;



            qc1 = scaled[i  ] * Q34 + ROUNDING;

            qc2 = scaled[i+1] * Q34 + ROUNDING;

            qc3 = scaled[i+2] * Q34 + ROUNDING;

            qc4 = scaled[i+3] * Q34 + ROUNDING;



            __asm__ volatile (

                ".set push                                  \n\t"

                ".set noreorder                             \n\t"



                "ori        %[t4],      $zero,      16      \n\t"

                "ori        %[sign1],   $zero,      0       \n\t"

                "ori        %[sign2],   $zero,      0       \n\t"

                "shll_s.w   %[c1],      %[qc1],     18      \n\t"

                "shll_s.w   %[c2],      %[qc2],     18      \n\t"

                "shll_s.w   %[c3],      %[qc3],     18      \n\t"

                "shll_s.w   %[c4],      %[qc4],     18      \n\t"

                "srl        %[c1],      %[c1],      18      \n\t"

                "srl        %[c2],      %[c2],      18      \n\t"

                "srl        %[c3],      %[c3],      18      \n\t"

                "srl        %[c4],      %[c4],      18      \n\t"

                "slt        %[t0],      %[t4],      %[qc1]  \n\t"

                "slt        %[t1],      %[t4],      %[qc2]  \n\t"

                "slt        %[t2],      %[t4],      %[qc3]  \n\t"

                "slt        %[t3],      %[t4],      %[qc4]  \n\t"

                "movn       %[qc1],     %[t4],      %[t0]   \n\t"

                "movn       %[qc2],     %[t4],      %[t1]   \n\t"

                "movn       %[qc3],     %[t4],      %[t2]   \n\t"

                "movn       %[qc4],     %[t4],      %[t3]   \n\t"

                "lw         %[t0],      0(%[in_int])        \n\t"

                "lw         %[t1],      4(%[in_int])        \n\t"

                "lw         %[t2],      8(%[in_int])        \n\t"

                "lw         %[t3],      12(%[in_int])       \n\t"

                "slt        %[t0],      %[t0],      $zero   \n\t"

                "movn       %[sign1],   %[t0],      %[qc1]  \n\t"

                "slt        %[t2],      %[t2],      $zero   \n\t"

                "movn       %[sign2],   %[t2],      %[qc3]  \n\t"

                "slt        %[t1],      %[t1],      $zero   \n\t"

                "sll        %[t0],      %[sign1],   1       \n\t"

                "or         %[t0],      %[t0],      %[t1]   \n\t"

                "movn       %[sign1],   %[t0],      %[qc2]  \n\t"

                "slt        %[t3],      %[t3],      $zero   \n\t"

                "sll        %[t0],      %[sign2],   1       \n\t"

                "or         %[t0],      %[t0],      %[t3]   \n\t"

                "movn       %[sign2],   %[t0],      %[qc4]  \n\t"

                "slt        %[count1],  $zero,      %[qc1]  \n\t"

                "slt        %[t1],      $zero,      %[qc2]  \n\t"

                "slt        %[count2],  $zero,      %[qc3]  \n\t"

                "slt        %[t2],      $zero,      %[qc4]  \n\t"

                "addu       %[count1],  %[count1],  %[t1]   \n\t"

                "addu       %[count2],  %[count2],  %[t2]   \n\t"



                ".set pop                                   \n\t"



                : [qc1]"+r"(qc1), [qc2]"+r"(qc2),

                  [qc3]"+r"(qc3), [qc4]"+r"(qc4),

                  [sign1]"=&r"(sign1), [count1]"=&r"(count1),

                  [sign2]"=&r"(sign2), [count2]"=&r"(count2),

                  [c1]"=&r"(c1), [c2]"=&r"(c2),

                  [c3]"=&r"(c3), [c4]"=&r"(c4),

                  [t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3),

                  [t4]"=&r"(t4)

                : [in_int]"r"(in_int)

                : "memory"

            );



            curidx = 17 * qc1;

            curidx += qc2;



            curidx2 = 17 * qc3;

            curidx2 += qc4;



            v_codes = (p_codes[curidx] << count1) | sign1;

            v_bits  = p_bits[curidx] + count1;

            put_bits(pb, v_bits, v_codes);



            if (p_vectors[curidx*2  ] == 64.0f) {

                int len = av_log2(c1);

                v_codes = (((1 << (len - 3)) - 2) << len) | (c1 & ((1 << len) - 1));

                put_bits(pb, len * 2 - 3, v_codes);

            }

            if (p_vectors[curidx*2+1] == 64.0f) {

                int len = av_log2(c2);

                v_codes = (((1 << (len - 3)) - 2) << len) | (c2 & ((1 << len) - 1));

                put_bits(pb, len*2-3, v_codes);

            }



            v_codes = (p_codes[curidx2] << count2) | sign2;

            v_bits  = p_bits[curidx2] + count2;

            put_bits(pb, v_bits, v_codes);



            if (p_vectors[curidx2*2  ] == 64.0f) {

                int len = av_log2(c3);

                v_codes = (((1 << (len - 3)) - 2) << len) | (c3 & ((1 << len) - 1));

                put_bits(pb, len* 2 - 3, v_codes);

            }

            if (p_vectors[curidx2*2+1] == 64.0f) {

                int len = av_log2(c4);

                v_codes = (((1 << (len - 3)) - 2) << len) | (c4 & ((1 << len) - 1));

                put_bits(pb, len * 2 - 3, v_codes);

            }



            if (out) {

               vec1 = &p_vectors[curidx*2];

               vec2 = &p_vectors[curidx2*2];

               out[i+0] = copysignf(c1 * cbrtf(c1) * IQ, in[i+0]);

               out[i+1] = copysignf(c2 * cbrtf(c2) * IQ, in[i+1]);

               out[i+2] = copysignf(c3 * cbrtf(c3) * IQ, in[i+2]);

               out[i+3] = copysignf(c4 * cbrtf(c4) * IQ, in[i+3]);

            }

        }

    }

}

                                                   int *bits, const float ROUNDING)             if (out) {                vec1 = &p_vectors[curidx*2 ];                vec2 = &p_vectors[curidx2*2];                out[i+0] = copysignf(vec1[0] * IQ, in[i+0]);                out[i+1] = copysignf(vec1[1] * IQ, in[i+1]);                out[i+2] = copysignf(vec2[0] * IQ, in[i+2]);                out[i+3] = copysignf(vec2[1] * IQ, in[i+3]);             if (out) {                vec1 = &p_vectors[curidx*2];                vec2 = &p_vectors[curidx2*2];                out[i+0] = copysignf(c1 * cbrtf(c1) * IQ, in[i+0]);                out[i+1] = copysignf(c2 * cbrtf(c2) * IQ, in[i+1]);                out[i+2] = copysignf(c3 * cbrtf(c3) * IQ, in[i+2]);                out[i+3] = copysignf(c4 * cbrtf(c4) * IQ, in[i+3]);
static void FUNC_0(struct AACEncContext *VAR_0,

                                                   PutBitContext *VAR_1, const float *VAR_2, float *VAR_3,

                                                   const float *VAR_4, int VAR_5, int VAR_6,

                                                   int VAR_7, const float VAR_8, const float VAR_9,

                                                   int *VAR_10, const float VAR_11)

{

    const float VAR_12 = ff_aac_pow34sf_tab[POW_SF2_ZERO - VAR_6 + SCALE_ONE_POS - SCALE_DIV_512];

    const float VAR_13  = ff_aac_pow2sf_tab [POW_SF2_ZERO + VAR_6 - SCALE_ONE_POS + SCALE_DIV_512];

    int VAR_14;

    int VAR_15, VAR_16, VAR_17, VAR_18;



    uint8_t  *p_bits    = (uint8_t* )ff_aac_spectral_bits[VAR_7-1];

    uint16_t *p_codes   = (uint16_t*)ff_aac_spectral_codes[VAR_7-1];

    float    *VAR_19 = (float*   )ff_aac_codebook_vectors[VAR_7-1];



    abs_pow34_v(VAR_0->scoefs, VAR_2, VAR_5);

    VAR_4 = VAR_0->scoefs;



    if (VAR_7 < 11) {

        for (VAR_14 = 0; VAR_14 < VAR_5; VAR_14 += 4) {

            int VAR_35, VAR_35, VAR_35, VAR_35, VAR_35, VAR_35;

            int *VAR_35 = (int *)&VAR_2[VAR_14];

            uint8_t v_bits;

            unsigned int VAR_35;

            int VAR_39, VAR_39, VAR_39, VAR_39, VAR_39;

            const float *VAR_39, *VAR_39;



            VAR_15 = VAR_4[VAR_14  ] * VAR_12 + VAR_11;

            VAR_16 = VAR_4[VAR_14+1] * VAR_12 + VAR_11;

            VAR_17 = VAR_4[VAR_14+2] * VAR_12 + VAR_11;

            VAR_18 = VAR_4[VAR_14+3] * VAR_12 + VAR_11;



            __asm__ volatile (

                ".set push                                  \n\t"

                ".set noreorder                             \n\t"



                "ori        %[VAR_39],      $zero,      16      \n\t"

                "ori        %[VAR_35],   $zero,      0       \n\t"

                "ori        %[VAR_35],   $zero,      0       \n\t"

                "slt        %[VAR_39],      %[VAR_39],      %[VAR_15]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      %[VAR_16]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      %[VAR_17]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      %[VAR_18]  \n\t"

                "movn       %[VAR_15],     %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_16],     %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_17],     %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_18],     %[VAR_39],      %[VAR_39]   \n\t"

                "lw         %[VAR_39],      0(%[VAR_35])        \n\t"

                "lw         %[VAR_39],      4(%[VAR_35])        \n\t"

                "lw         %[VAR_39],      8(%[VAR_35])        \n\t"

                "lw         %[VAR_39],      12(%[VAR_35])       \n\t"

                "slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"

                "movn       %[VAR_35],   %[VAR_39],      %[VAR_15]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"

                "movn       %[VAR_35],   %[VAR_39],      %[VAR_17]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"

                "sll        %[VAR_39],      %[VAR_35],   1       \n\t"

                "or         %[VAR_39],      %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_35],   %[VAR_39],      %[VAR_16]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"

                "sll        %[VAR_39],      %[VAR_35],   1       \n\t"

                "or         %[VAR_39],      %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_35],   %[VAR_39],      %[VAR_18]  \n\t"

                "slt        %[VAR_35],  $zero,      %[VAR_15]  \n\t"

                "slt        %[VAR_39],      $zero,      %[VAR_16]  \n\t"

                "slt        %[VAR_35],  $zero,      %[VAR_17]  \n\t"

                "slt        %[VAR_39],      $zero,      %[VAR_18]  \n\t"

                "addu       %[VAR_35],  %[VAR_35],  %[VAR_39]   \n\t"

                "addu       %[VAR_35],  %[VAR_35],  %[VAR_39]   \n\t"



                ".set pop                                   \n\t"



                : [VAR_15]"+r"(VAR_15), [VAR_16]"+r"(VAR_16),

                  [VAR_17]"+r"(VAR_17), [VAR_18]"+r"(VAR_18),

                  [VAR_35]"=&r"(VAR_35), [VAR_35]"=&r"(VAR_35),

                  [VAR_35]"=&r"(VAR_35), [VAR_35]"=&r"(VAR_35),

                  [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39),

                  [VAR_39]"=&r"(VAR_39)

                : [VAR_35]"r"(VAR_35)

                : "memory"

            );



            VAR_35 = 17 * VAR_15;

            VAR_35 += VAR_16;

            VAR_35 = 17 * VAR_17;

            VAR_35 += VAR_18;



            VAR_35 = (p_codes[VAR_35] << VAR_35) | VAR_35;

            v_bits  = p_bits[VAR_35] + VAR_35;

            put_bits(VAR_1, v_bits, VAR_35);



            VAR_35 = (p_codes[VAR_35] << VAR_35) | VAR_35;

            v_bits  = p_bits[VAR_35] + VAR_35;

            put_bits(VAR_1, v_bits, VAR_35);



            if (VAR_3) {

               VAR_39 = &VAR_19[VAR_35*2 ];

               VAR_39 = &VAR_19[VAR_35*2];

               VAR_3[VAR_14+0] = copysignf(VAR_39[0] * VAR_13, VAR_2[VAR_14+0]);

               VAR_3[VAR_14+1] = copysignf(VAR_39[1] * VAR_13, VAR_2[VAR_14+1]);

               VAR_3[VAR_14+2] = copysignf(VAR_39[0] * VAR_13, VAR_2[VAR_14+2]);

               VAR_3[VAR_14+3] = copysignf(VAR_39[1] * VAR_13, VAR_2[VAR_14+3]);

            }

        }

    } else {

        for (VAR_14 = 0; VAR_14 < VAR_5; VAR_14 += 4) {

            int VAR_35, VAR_35, VAR_35, VAR_35, VAR_35, VAR_35;

            int *VAR_35 = (int *)&VAR_2[VAR_14];

            uint8_t v_bits;

            unsigned int VAR_35;

            int VAR_35, VAR_36, VAR_37, VAR_38;

            int VAR_39, VAR_39, VAR_39, VAR_39, VAR_39;

            const float *VAR_39, *VAR_39;



            VAR_15 = VAR_4[VAR_14  ] * VAR_12 + VAR_11;

            VAR_16 = VAR_4[VAR_14+1] * VAR_12 + VAR_11;

            VAR_17 = VAR_4[VAR_14+2] * VAR_12 + VAR_11;

            VAR_18 = VAR_4[VAR_14+3] * VAR_12 + VAR_11;



            __asm__ volatile (

                ".set push                                  \n\t"

                ".set noreorder                             \n\t"



                "ori        %[VAR_39],      $zero,      16      \n\t"

                "ori        %[VAR_35],   $zero,      0       \n\t"

                "ori        %[VAR_35],   $zero,      0       \n\t"

                "shll_s.w   %[VAR_35],      %[VAR_15],     18      \n\t"

                "shll_s.w   %[VAR_36],      %[VAR_16],     18      \n\t"

                "shll_s.w   %[VAR_37],      %[VAR_17],     18      \n\t"

                "shll_s.w   %[VAR_38],      %[VAR_18],     18      \n\t"

                "srl        %[VAR_35],      %[VAR_35],      18      \n\t"

                "srl        %[VAR_36],      %[VAR_36],      18      \n\t"

                "srl        %[VAR_37],      %[VAR_37],      18      \n\t"

                "srl        %[VAR_38],      %[VAR_38],      18      \n\t"

                "slt        %[VAR_39],      %[VAR_39],      %[VAR_15]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      %[VAR_16]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      %[VAR_17]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      %[VAR_18]  \n\t"

                "movn       %[VAR_15],     %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_16],     %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_17],     %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_18],     %[VAR_39],      %[VAR_39]   \n\t"

                "lw         %[VAR_39],      0(%[VAR_35])        \n\t"

                "lw         %[VAR_39],      4(%[VAR_35])        \n\t"

                "lw         %[VAR_39],      8(%[VAR_35])        \n\t"

                "lw         %[VAR_39],      12(%[VAR_35])       \n\t"

                "slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"

                "movn       %[VAR_35],   %[VAR_39],      %[VAR_15]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"

                "movn       %[VAR_35],   %[VAR_39],      %[VAR_17]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"

                "sll        %[VAR_39],      %[VAR_35],   1       \n\t"

                "or         %[VAR_39],      %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_35],   %[VAR_39],      %[VAR_16]  \n\t"

                "slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"

                "sll        %[VAR_39],      %[VAR_35],   1       \n\t"

                "or         %[VAR_39],      %[VAR_39],      %[VAR_39]   \n\t"

                "movn       %[VAR_35],   %[VAR_39],      %[VAR_18]  \n\t"

                "slt        %[VAR_35],  $zero,      %[VAR_15]  \n\t"

                "slt        %[VAR_39],      $zero,      %[VAR_16]  \n\t"

                "slt        %[VAR_35],  $zero,      %[VAR_17]  \n\t"

                "slt        %[VAR_39],      $zero,      %[VAR_18]  \n\t"

                "addu       %[VAR_35],  %[VAR_35],  %[VAR_39]   \n\t"

                "addu       %[VAR_35],  %[VAR_35],  %[VAR_39]   \n\t"



                ".set pop                                   \n\t"



                : [VAR_15]"+r"(VAR_15), [VAR_16]"+r"(VAR_16),

                  [VAR_17]"+r"(VAR_17), [VAR_18]"+r"(VAR_18),

                  [VAR_35]"=&r"(VAR_35), [VAR_35]"=&r"(VAR_35),

                  [VAR_35]"=&r"(VAR_35), [VAR_35]"=&r"(VAR_35),

                  [VAR_35]"=&r"(VAR_35), [VAR_36]"=&r"(VAR_36),

                  [VAR_37]"=&r"(VAR_37), [VAR_38]"=&r"(VAR_38),

                  [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39),

                  [VAR_39]"=&r"(VAR_39)

                : [VAR_35]"r"(VAR_35)

                : "memory"

            );



            VAR_35 = 17 * VAR_15;

            VAR_35 += VAR_16;



            VAR_35 = 17 * VAR_17;

            VAR_35 += VAR_18;



            VAR_35 = (p_codes[VAR_35] << VAR_35) | VAR_35;

            v_bits  = p_bits[VAR_35] + VAR_35;

            put_bits(VAR_1, v_bits, VAR_35);



            if (VAR_19[VAR_35*2  ] == 64.0f) {

                int VAR_40 = av_log2(VAR_35);

                VAR_35 = (((1 << (VAR_40 - 3)) - 2) << VAR_40) | (VAR_35 & ((1 << VAR_40) - 1));

                put_bits(VAR_1, VAR_40 * 2 - 3, VAR_35);

            }

            if (VAR_19[VAR_35*2+1] == 64.0f) {

                int VAR_40 = av_log2(VAR_36);

                VAR_35 = (((1 << (VAR_40 - 3)) - 2) << VAR_40) | (VAR_36 & ((1 << VAR_40) - 1));

                put_bits(VAR_1, VAR_40*2-3, VAR_35);

            }



            VAR_35 = (p_codes[VAR_35] << VAR_35) | VAR_35;

            v_bits  = p_bits[VAR_35] + VAR_35;

            put_bits(VAR_1, v_bits, VAR_35);



            if (VAR_19[VAR_35*2  ] == 64.0f) {

                int VAR_40 = av_log2(VAR_37);

                VAR_35 = (((1 << (VAR_40 - 3)) - 2) << VAR_40) | (VAR_37 & ((1 << VAR_40) - 1));

                put_bits(VAR_1, VAR_40* 2 - 3, VAR_35);

            }

            if (VAR_19[VAR_35*2+1] == 64.0f) {

                int VAR_40 = av_log2(VAR_38);

                VAR_35 = (((1 << (VAR_40 - 3)) - 2) << VAR_40) | (VAR_38 & ((1 << VAR_40) - 1));

                put_bits(VAR_1, VAR_40 * 2 - 3, VAR_35);

            }



            if (VAR_3) {

               VAR_39 = &VAR_19[VAR_35*2];

               VAR_39 = &VAR_19[VAR_35*2];

               VAR_3[VAR_14+0] = copysignf(VAR_35 * cbrtf(VAR_35) * VAR_13, VAR_2[VAR_14+0]);

               VAR_3[VAR_14+1] = copysignf(VAR_36 * cbrtf(VAR_36) * VAR_13, VAR_2[VAR_14+1]);

               VAR_3[VAR_14+2] = copysignf(VAR_37 * cbrtf(VAR_37) * VAR_13, VAR_2[VAR_14+2]);

               VAR_3[VAR_14+3] = copysignf(VAR_38 * cbrtf(VAR_38) * VAR_13, VAR_2[VAR_14+3]);

            }

        }

    }

}

static void FUNC_0(struct AACEncContext *VAR_0,
PutBitContext *VAR_1, const float *VAR_2, float *VAR_3,
const float *VAR_4, int VAR_5, int VAR_6,
int VAR_7, const float VAR_8, const float VAR_9,
int *VAR_10, const float VAR_11)
{ const float VAR_12 = ff_aac_pow34sf_tab[POW_SF2_ZERO - VAR_6 + SCALE_ONE_POS - SCALE_DIV_512]; const float VAR_13  = ff_aac_pow2sf_tab [POW_SF2_ZERO + VAR_6 - SCALE_ONE_POS + SCALE_DIV_512]; int VAR_14; int VAR_15, VAR_16, VAR_17, VAR_18; uint8_t  *p_bits    = (uint8_t* )ff_aac_spectral_bits[VAR_7-1]; uint16_t *p_codes   = (uint16_t*)ff_aac_spectral_codes[VAR_7-1]; float    *VAR_19 = (float*   )ff_aac_codebook_vectors[VAR_7-1]; abs_pow34_v(VAR_0->scoefs, VAR_2, VAR_5); VAR_4 = VAR_0->scoefs; if (VAR_7 < 11) { for (VAR_14 = 0; VAR_14 < VAR_5; VAR_14 += 4) { int VAR_35, VAR_35, VAR_35, VAR_35, VAR_35, VAR_35; int *VAR_35 = (int *)&VAR_2[VAR_14]; uint8_t v_bits; unsigned int VAR_35; int VAR_39, VAR_39, VAR_39, VAR_39, VAR_39; const float *VAR_39, *VAR_39; VAR_15 = VAR_4[VAR_14  ] * VAR_12 + VAR_11; VAR_16 = VAR_4[VAR_14+1] * VAR_12 + VAR_11; VAR_17 = VAR_4[VAR_14+2] * VAR_12 + VAR_11; VAR_18 = VAR_4[VAR_14+3] * VAR_12 + VAR_11; __asm__ volatile (
".set push                                  \n\t"
".set noreorder                             \n\t"
"ori        %[VAR_39],      $zero,      16      \n\t"
"ori        %[VAR_35],   $zero,      0       \n\t"
"ori        %[VAR_35],   $zero,      0       \n\t"
"slt        %[VAR_39],      %[VAR_39],      %[VAR_15]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      %[VAR_16]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      %[VAR_17]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      %[VAR_18]  \n\t"
"movn       %[VAR_15],     %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_16],     %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_17],     %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_18],     %[VAR_39],      %[VAR_39]   \n\t"
"lw         %[VAR_39],      0(%[VAR_35])        \n\t"
"lw         %[VAR_39],      4(%[VAR_35])        \n\t"
"lw         %[VAR_39],      8(%[VAR_35])        \n\t"
"lw         %[VAR_39],      12(%[VAR_35])       \n\t"
"slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"
"movn       %[VAR_35],   %[VAR_39],      %[VAR_15]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"
"movn       %[VAR_35],   %[VAR_39],      %[VAR_17]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"
"sll        %[VAR_39],      %[VAR_35],   1       \n\t"
"or         %[VAR_39],      %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_35],   %[VAR_39],      %[VAR_16]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"
"sll        %[VAR_39],      %[VAR_35],   1       \n\t"
"or         %[VAR_39],      %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_35],   %[VAR_39],      %[VAR_18]  \n\t"
"slt        %[VAR_35],  $zero,      %[VAR_15]  \n\t"
"slt        %[VAR_39],      $zero,      %[VAR_16]  \n\t"
"slt        %[VAR_35],  $zero,      %[VAR_17]  \n\t"
"slt        %[VAR_39],      $zero,      %[VAR_18]  \n\t"
"addu       %[VAR_35],  %[VAR_35],  %[VAR_39]   \n\t"
"addu       %[VAR_35],  %[VAR_35],  %[VAR_39]   \n\t"
".set pop                                   \n\t"
: [VAR_15]"+r"(VAR_15), [VAR_16]"+r"(VAR_16),
[VAR_17]"+r"(VAR_17), [VAR_18]"+r"(VAR_18),
[VAR_35]"=&r"(VAR_35), [VAR_35]"=&r"(VAR_35),
[VAR_35]"=&r"(VAR_35), [VAR_35]"=&r"(VAR_35),
[VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39),
[VAR_39]"=&r"(VAR_39)
: [VAR_35]"r"(VAR_35)
: "memory"
); VAR_35 = 17 * VAR_15; VAR_35 += VAR_16; VAR_35 = 17 * VAR_17; VAR_35 += VAR_18; VAR_35 = (p_codes[VAR_35] << VAR_35) | VAR_35; v_bits  = p_bits[VAR_35] + VAR_35; put_bits(VAR_1, v_bits, VAR_35); VAR_35 = (p_codes[VAR_35] << VAR_35) | VAR_35; v_bits  = p_bits[VAR_35] + VAR_35; put_bits(VAR_1, v_bits, VAR_35); if (VAR_3) { VAR_39 = &VAR_19[VAR_35*2 ]; VAR_39 = &VAR_19[VAR_35*2]; VAR_3[VAR_14+0] = copysignf(VAR_39[0] * VAR_13, VAR_2[VAR_14+0]); VAR_3[VAR_14+1] = copysignf(VAR_39[1] * VAR_13, VAR_2[VAR_14+1]); VAR_3[VAR_14+2] = copysignf(VAR_39[0] * VAR_13, VAR_2[VAR_14+2]); VAR_3[VAR_14+3] = copysignf(VAR_39[1] * VAR_13, VAR_2[VAR_14+3]); } } } else { for (VAR_14 = 0; VAR_14 < VAR_5; VAR_14 += 4) { int VAR_35, VAR_35, VAR_35, VAR_35, VAR_35, VAR_35; int *VAR_35 = (int *)&VAR_2[VAR_14]; uint8_t v_bits; unsigned int VAR_35; int VAR_35, VAR_36, VAR_37, VAR_38; int VAR_39, VAR_39, VAR_39, VAR_39, VAR_39; const float *VAR_39, *VAR_39; VAR_15 = VAR_4[VAR_14  ] * VAR_12 + VAR_11; VAR_16 = VAR_4[VAR_14+1] * VAR_12 + VAR_11; VAR_17 = VAR_4[VAR_14+2] * VAR_12 + VAR_11; VAR_18 = VAR_4[VAR_14+3] * VAR_12 + VAR_11; __asm__ volatile (
".set push                                  \n\t"
".set noreorder                             \n\t"
"ori        %[VAR_39],      $zero,      16      \n\t"
"ori        %[VAR_35],   $zero,      0       \n\t"
"ori        %[VAR_35],   $zero,      0       \n\t"
"shll_s.w   %[VAR_35],      %[VAR_15],     18      \n\t"
"shll_s.w   %[VAR_36],      %[VAR_16],     18      \n\t"
"shll_s.w   %[VAR_37],      %[VAR_17],     18      \n\t"
"shll_s.w   %[VAR_38],      %[VAR_18],     18      \n\t"
"srl        %[VAR_35],      %[VAR_35],      18      \n\t"
"srl        %[VAR_36],      %[VAR_36],      18      \n\t"
"srl        %[VAR_37],      %[VAR_37],      18      \n\t"
"srl        %[VAR_38],      %[VAR_38],      18      \n\t"
"slt        %[VAR_39],      %[VAR_39],      %[VAR_15]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      %[VAR_16]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      %[VAR_17]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      %[VAR_18]  \n\t"
"movn       %[VAR_15],     %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_16],     %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_17],     %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_18],     %[VAR_39],      %[VAR_39]   \n\t"
"lw         %[VAR_39],      0(%[VAR_35])        \n\t"
"lw         %[VAR_39],      4(%[VAR_35])        \n\t"
"lw         %[VAR_39],      8(%[VAR_35])        \n\t"
"lw         %[VAR_39],      12(%[VAR_35])       \n\t"
"slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"
"movn       %[VAR_35],   %[VAR_39],      %[VAR_15]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"
"movn       %[VAR_35],   %[VAR_39],      %[VAR_17]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"
"sll        %[VAR_39],      %[VAR_35],   1       \n\t"
"or         %[VAR_39],      %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_35],   %[VAR_39],      %[VAR_16]  \n\t"
"slt        %[VAR_39],      %[VAR_39],      $zero   \n\t"
"sll        %[VAR_39],      %[VAR_35],   1       \n\t"
"or         %[VAR_39],      %[VAR_39],      %[VAR_39]   \n\t"
"movn       %[VAR_35],   %[VAR_39],      %[VAR_18]  \n\t"
"slt        %[VAR_35],  $zero,      %[VAR_15]  \n\t"
"slt        %[VAR_39],      $zero,      %[VAR_16]  \n\t"
"slt        %[VAR_35],  $zero,      %[VAR_17]  \n\t"
"slt        %[VAR_39],      $zero,      %[VAR_18]  \n\t"
"addu       %[VAR_35],  %[VAR_35],  %[VAR_39]   \n\t"
"addu       %[VAR_35],  %[VAR_35],  %[VAR_39]   \n\t"
".set pop                                   \n\t"
: [VAR_15]"+r"(VAR_15), [VAR_16]"+r"(VAR_16),
[VAR_17]"+r"(VAR_17), [VAR_18]"+r"(VAR_18),
[VAR_35]"=&r"(VAR_35), [VAR_35]"=&r"(VAR_35),
[VAR_35]"=&r"(VAR_35), [VAR_35]"=&r"(VAR_35),
[VAR_35]"=&r"(VAR_35), [VAR_36]"=&r"(VAR_36),
[VAR_37]"=&r"(VAR_37), [VAR_38]"=&r"(VAR_38),
[VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39), [VAR_39]"=&r"(VAR_39),
[VAR_39]"=&r"(VAR_39)
: [VAR_35]"r"(VAR_35)
: "memory"
); VAR_35 = 17 * VAR_15; VAR_35 += VAR_16; VAR_35 = 17 * VAR_17; VAR_35 += VAR_18; VAR_35 = (p_codes[VAR_35] << VAR_35) | VAR_35; v_bits  = p_bits[VAR_35] + VAR_35; put_bits(VAR_1, v_bits, VAR_35); if (VAR_19[VAR_35*2  ] == 64.0f) { int VAR_40 = av_log2(VAR_35); VAR_35 = (((1 << (VAR_40 - 3)) - 2) << VAR_40) | (VAR_35 & ((1 << VAR_40) - 1)); put_bits(VAR_1, VAR_40 * 2 - 3, VAR_35); } if (VAR_19[VAR_35*2+1] == 64.0f) { int VAR_40 = av_log2(VAR_36); VAR_35 = (((1 << (VAR_40 - 3)) - 2) << VAR_40) | (VAR_36 & ((1 << VAR_40) - 1)); put_bits(VAR_1, VAR_40*2-3, VAR_35); } VAR_35 = (p_codes[VAR_35] << VAR_35) | VAR_35; v_bits  = p_bits[VAR_35] + VAR_35; put_bits(VAR_1, v_bits, VAR_35); if (VAR_19[VAR_35*2  ] == 64.0f) { int VAR_40 = av_log2(VAR_37); VAR_35 = (((1 << (VAR_40 - 3)) - 2) << VAR_40) | (VAR_37 & ((1 << VAR_40) - 1)); put_bits(VAR_1, VAR_40* 2 - 3, VAR_35); } if (VAR_19[VAR_35*2+1] == 64.0f) { int VAR_40 = av_log2(VAR_38); VAR_35 = (((1 << (VAR_40 - 3)) - 2) << VAR_40) | (VAR_38 & ((1 << VAR_40) - 1)); put_bits(VAR_1, VAR_40 * 2 - 3, VAR_35); } if (VAR_3) { VAR_39 = &VAR_19[VAR_35*2]; VAR_39 = &VAR_19[VAR_35*2]; VAR_3[VAR_14+0] = copysignf(VAR_35 * cbrtf(VAR_35) * VAR_13, VAR_2[VAR_14+0]); VAR_3[VAR_14+1] = copysignf(VAR_36 * cbrtf(VAR_36) * VAR_13, VAR_2[VAR_14+1]); VAR_3[VAR_14+2] = copysignf(VAR_37 * cbrtf(VAR_37) * VAR_13, VAR_2[VAR_14+2]); VAR_3[VAR_14+3] = copysignf(VAR_38 * cbrtf(VAR_38) * VAR_13, VAR_2[VAR_14+3]); } } } }