static void gen_wsr_ps(DisasContext *dc, uint32_t sr, TCGv_i32 v)

{

    uint32_t mask = PS_WOE | PS_CALLINC | PS_OWB |

        PS_UM | PS_EXCM | PS_INTLEVEL;



    if (option_enabled(dc, XTENSA_OPTION_MMU)) {

        mask |= PS_RING;

    }

    tcg_gen_andi_i32(cpu_SR[sr], v, mask);

    /* This can change mmu index, so exit tb */

    gen_jumpi(dc, dc->next_pc, -1);

}

static void gen_wsr_ps(DisasContext *dc, uint32_t sr, TCGv_i32 v)

{

    uint32_t mask = PS_WOE | PS_CALLINC | PS_OWB |

        PS_UM | PS_EXCM | PS_INTLEVEL;



    if (option_enabled(dc, XTENSA_OPTION_MMU)) {

        mask |= PS_RING;

    }

    tcg_gen_andi_i32(cpu_SR[sr], v, mask);

    

    gen_jumpi(dc, dc->next_pc, -1);

}

    gen_jumpi(dc, dc->next_pc, -1);
static void FUNC_0(DisasContext *VAR_0, uint32_t VAR_1, TCGv_i32 VAR_2)

{

    uint32_t mask = PS_WOE | PS_CALLINC | PS_OWB |

        PS_UM | PS_EXCM | PS_INTLEVEL;



    if (option_enabled(VAR_0, XTENSA_OPTION_MMU)) {

        mask |= PS_RING;

    }

    tcg_gen_andi_i32(cpu_SR[VAR_1], VAR_2, mask);

    

    gen_jumpi(VAR_0, VAR_0->next_pc, -1);

}

static void FUNC_0(DisasContext *VAR_0, uint32_t VAR_1, TCGv_i32 VAR_2)
{ uint32_t mask = PS_WOE | PS_CALLINC | PS_OWB |
PS_UM | PS_EXCM | PS_INTLEVEL; if (option_enabled(VAR_0, XTENSA_OPTION_MMU)) { mask |= PS_RING; } tcg_gen_andi_i32(cpu_SR[VAR_1], VAR_2, mask); gen_jumpi(VAR_0, VAR_0->next_pc, -1); }