static void pci_device_reset(PCIDevice *dev)

{

    int r;



    memset(dev->irq_state, 0, sizeof dev->irq_state);

    dev->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY |

                                  PCI_COMMAND_MASTER);

    dev->config[PCI_CACHE_LINE_SIZE] = 0x0;

    dev->config[PCI_INTERRUPT_LINE] = 0x0;

    for (r = 0; r < PCI_NUM_REGIONS; ++r) {

        if (!dev->io_regions[r].size) {

            continue;

        }

        pci_set_long(dev->config + pci_bar(dev, r), dev->io_regions[r].type);

    }

    pci_update_mappings(dev);

}

static void pci_device_reset(PCIDevice *dev)

{

    int r;



    memset(dev->irq_state, 0, sizeof dev->irq_state);

    dev->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY |

                                  PCI_COMMAND_MASTER);

    dev->config[PCI_CACHE_LINE_SIZE] = 0x0;

    dev->config[PCI_INTERRUPT_LINE] = 0x0;

    for (r = 0; r < PCI_NUM_REGIONS; ++r) {

        if (!dev->io_regions[r].size) {

            continue;

        }

        pci_set_long(dev->config + pci_bar(dev, r), dev->io_regions[r].type);

    }

    pci_update_mappings(dev);

}

    memset(dev->irq_state, 0, sizeof dev->irq_state);
static void FUNC_0(PCIDevice *VAR_0)

{

    int VAR_1;



    memset(VAR_0->irq_state, 0, sizeof VAR_0->irq_state);

    VAR_0->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY |

                                  PCI_COMMAND_MASTER);

    VAR_0->config[PCI_CACHE_LINE_SIZE] = 0x0;

    VAR_0->config[PCI_INTERRUPT_LINE] = 0x0;

    for (VAR_1 = 0; VAR_1 < PCI_NUM_REGIONS; ++VAR_1) {

        if (!VAR_0->io_regions[VAR_1].size) {

            continue;

        }

        pci_set_long(VAR_0->config + pci_bar(VAR_0, VAR_1), VAR_0->io_regions[VAR_1].type);

    }

    pci_update_mappings(VAR_0);

}

static void FUNC_0(PCIDevice *VAR_0)
{ int VAR_1; memset(VAR_0->irq_state, 0, sizeof VAR_0->irq_state); VAR_0->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
PCI_COMMAND_MASTER); VAR_0->config[PCI_CACHE_LINE_SIZE] = 0x0; VAR_0->config[PCI_INTERRUPT_LINE] = 0x0; for (VAR_1 = 0; VAR_1 < PCI_NUM_REGIONS; ++VAR_1) { if (!VAR_0->io_regions[VAR_1].size) { continue; } pci_set_long(VAR_0->config + pci_bar(VAR_0, VAR_1), VAR_0->io_regions[VAR_1].type); } pci_update_mappings(VAR_0); }