static void pxa2xx_gpio_handler_update(PXA2xxGPIOInfo *s) {

    uint32_t level, diff;

    int i, bit, line;

    for (i = 0; i < PXA2XX_GPIO_BANKS; i ++) {

        level = s->olevel[i] & s->dir[i];



        for (diff = s->prev_level[i] ^ level; diff; diff ^= 1 << bit) {

            bit = ffs(diff) - 1;

            line = bit + 32 * i;

            qemu_set_irq(s->handler[line], (level >> bit) & 1);

        }



        s->prev_level[i] = level;

    }

}

static void pxa2xx_gpio_handler_update(PXA2xxGPIOInfo *s) {

    uint32_t level, diff;

    int i, bit, line;

    for (i = 0; i < PXA2XX_GPIO_BANKS; i ++) {

        level = s->olevel[i] & s->dir[i];



        for (diff = s->prev_level[i] ^ level; diff; diff ^= 1 << bit) {

            bit = ffs(diff) - 1;

            line = bit + 32 * i;

            qemu_set_irq(s->handler[line], (level >> bit) & 1);

        }



        s->prev_level[i] = level;

    }

}

static void FUNC_0(PXA2xxGPIOInfo *VAR_0) {

    uint32_t level, diff;

    int VAR_1, VAR_2, VAR_3;

    for (VAR_1 = 0; VAR_1 < PXA2XX_GPIO_BANKS; VAR_1 ++) {

        level = VAR_0->olevel[VAR_1] & VAR_0->dir[VAR_1];



        for (diff = VAR_0->prev_level[VAR_1] ^ level; diff; diff ^= 1 << VAR_2) {

            VAR_2 = ffs(diff) - 1;

            VAR_3 = VAR_2 + 32 * VAR_1;

            qemu_set_irq(VAR_0->handler[VAR_3], (level >> VAR_2) & 1);

        }



        VAR_0->prev_level[VAR_1] = level;

    }

}

static void FUNC_0(PXA2xxGPIOInfo *VAR_0) { uint32_t level, diff; int VAR_1, VAR_2, VAR_3; for (VAR_1 = 0; VAR_1 < PXA2XX_GPIO_BANKS; VAR_1 ++) { level = VAR_0->olevel[VAR_1] & VAR_0->dir[VAR_1]; for (diff = VAR_0->prev_level[VAR_1] ^ level; diff; diff ^= 1 << VAR_2) { VAR_2 = ffs(diff) - 1; VAR_3 = VAR_2 + 32 * VAR_1; qemu_set_irq(VAR_0->handler[VAR_3], (level >> VAR_2) & 1); } VAR_0->prev_level[VAR_1] = level; } }