static void decode_rlc_opc(CPUTriCoreState *env, DisasContext *ctx,

                           uint32_t op1)

{

    int32_t const16;

    int r1, r2;



    const16 = MASK_OP_RLC_CONST16_SEXT(ctx->opcode);

    r1      = MASK_OP_RLC_S1(ctx->opcode);

    r2      = MASK_OP_RLC_D(ctx->opcode);



    switch (op1) {

    case OPC1_32_RLC_ADDI:

        gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const16);

        break;

    case OPC1_32_RLC_ADDIH:

        gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const16 << 16);

        break;

    case OPC1_32_RLC_ADDIH_A:

        tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r1], const16 << 16);

        break;

    case OPC1_32_RLC_MFCR:

        const16 = MASK_OP_RLC_CONST16(ctx->opcode);

        gen_mfcr(env, cpu_gpr_d[r2], const16);

        break;

    case OPC1_32_RLC_MOV:

        tcg_gen_movi_tl(cpu_gpr_d[r2], const16);

        break;

    case OPC1_32_RLC_MOV_64:

        if (tricore_feature(env, TRICORE_FEATURE_16)) {

            if ((r2 & 0x1) != 0) {

                /* TODO: raise OPD trap */

            }

            tcg_gen_movi_tl(cpu_gpr_d[r2], const16);

            tcg_gen_movi_tl(cpu_gpr_d[r2+1], const16 >> 15);

        } else {

            /* TODO: raise illegal opcode trap */

        }

        break;

    case OPC1_32_RLC_MOV_U:

        const16 = MASK_OP_RLC_CONST16(ctx->opcode);

        tcg_gen_movi_tl(cpu_gpr_d[r2], const16);

        break;

    case OPC1_32_RLC_MOV_H:

        tcg_gen_movi_tl(cpu_gpr_d[r2], const16 << 16);

        break;

    case OPC1_32_RLC_MOVH_A:

        tcg_gen_movi_tl(cpu_gpr_a[r2], const16 << 16);

        break;

    case OPC1_32_RLC_MTCR:

        const16 = MASK_OP_RLC_CONST16(ctx->opcode);

        gen_mtcr(env, ctx, cpu_gpr_d[r1], const16);

        break;

    }

}

static void decode_rlc_opc(CPUTriCoreState *env, DisasContext *ctx,

                           uint32_t op1)

{

    int32_t const16;

    int r1, r2;



    const16 = MASK_OP_RLC_CONST16_SEXT(ctx->opcode);

    r1      = MASK_OP_RLC_S1(ctx->opcode);

    r2      = MASK_OP_RLC_D(ctx->opcode);



    switch (op1) {

    case OPC1_32_RLC_ADDI:

        gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const16);

        break;

    case OPC1_32_RLC_ADDIH:

        gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const16 << 16);

        break;

    case OPC1_32_RLC_ADDIH_A:

        tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r1], const16 << 16);

        break;

    case OPC1_32_RLC_MFCR:

        const16 = MASK_OP_RLC_CONST16(ctx->opcode);

        gen_mfcr(env, cpu_gpr_d[r2], const16);

        break;

    case OPC1_32_RLC_MOV:

        tcg_gen_movi_tl(cpu_gpr_d[r2], const16);

        break;

    case OPC1_32_RLC_MOV_64:

        if (tricore_feature(env, TRICORE_FEATURE_16)) {

            if ((r2 & 0x1) != 0) {

                

            }

            tcg_gen_movi_tl(cpu_gpr_d[r2], const16);

            tcg_gen_movi_tl(cpu_gpr_d[r2+1], const16 >> 15);

        } else {

            

        }

        break;

    case OPC1_32_RLC_MOV_U:

        const16 = MASK_OP_RLC_CONST16(ctx->opcode);

        tcg_gen_movi_tl(cpu_gpr_d[r2], const16);

        break;

    case OPC1_32_RLC_MOV_H:

        tcg_gen_movi_tl(cpu_gpr_d[r2], const16 << 16);

        break;

    case OPC1_32_RLC_MOVH_A:

        tcg_gen_movi_tl(cpu_gpr_a[r2], const16 << 16);

        break;

    case OPC1_32_RLC_MTCR:

        const16 = MASK_OP_RLC_CONST16(ctx->opcode);

        gen_mtcr(env, ctx, cpu_gpr_d[r1], const16);

        break;

    }

}

static void FUNC_0(CPUTriCoreState *VAR_0, DisasContext *VAR_1,

                           uint32_t VAR_2)

{

    int32_t const16;

    int VAR_3, VAR_4;



    const16 = MASK_OP_RLC_CONST16_SEXT(VAR_1->opcode);

    VAR_3      = MASK_OP_RLC_S1(VAR_1->opcode);

    VAR_4      = MASK_OP_RLC_D(VAR_1->opcode);



    switch (VAR_2) {

    case OPC1_32_RLC_ADDI:

        gen_addi_d(cpu_gpr_d[VAR_4], cpu_gpr_d[VAR_3], const16);

        break;

    case OPC1_32_RLC_ADDIH:

        gen_addi_d(cpu_gpr_d[VAR_4], cpu_gpr_d[VAR_3], const16 << 16);

        break;

    case OPC1_32_RLC_ADDIH_A:

        tcg_gen_addi_tl(cpu_gpr_a[VAR_4], cpu_gpr_a[VAR_3], const16 << 16);

        break;

    case OPC1_32_RLC_MFCR:

        const16 = MASK_OP_RLC_CONST16(VAR_1->opcode);

        gen_mfcr(VAR_0, cpu_gpr_d[VAR_4], const16);

        break;

    case OPC1_32_RLC_MOV:

        tcg_gen_movi_tl(cpu_gpr_d[VAR_4], const16);

        break;

    case OPC1_32_RLC_MOV_64:

        if (tricore_feature(VAR_0, TRICORE_FEATURE_16)) {

            if ((VAR_4 & 0x1) != 0) {

                

            }

            tcg_gen_movi_tl(cpu_gpr_d[VAR_4], const16);

            tcg_gen_movi_tl(cpu_gpr_d[VAR_4+1], const16 >> 15);

        } else {

            

        }

        break;

    case OPC1_32_RLC_MOV_U:

        const16 = MASK_OP_RLC_CONST16(VAR_1->opcode);

        tcg_gen_movi_tl(cpu_gpr_d[VAR_4], const16);

        break;

    case OPC1_32_RLC_MOV_H:

        tcg_gen_movi_tl(cpu_gpr_d[VAR_4], const16 << 16);

        break;

    case OPC1_32_RLC_MOVH_A:

        tcg_gen_movi_tl(cpu_gpr_a[VAR_4], const16 << 16);

        break;

    case OPC1_32_RLC_MTCR:

        const16 = MASK_OP_RLC_CONST16(VAR_1->opcode);

        gen_mtcr(VAR_0, VAR_1, cpu_gpr_d[VAR_3], const16);

        break;

    }

}

static void FUNC_0(CPUTriCoreState *VAR_0, DisasContext *VAR_1,
uint32_t VAR_2)
{ int32_t const16; int VAR_3, VAR_4; const16 = MASK_OP_RLC_CONST16_SEXT(VAR_1->opcode); VAR_3      = MASK_OP_RLC_S1(VAR_1->opcode); VAR_4      = MASK_OP_RLC_D(VAR_1->opcode); switch (VAR_2) { case OPC1_32_RLC_ADDI:
gen_addi_d(cpu_gpr_d[VAR_4], cpu_gpr_d[VAR_3], const16); break; case OPC1_32_RLC_ADDIH:
gen_addi_d(cpu_gpr_d[VAR_4], cpu_gpr_d[VAR_3], const16 << 16); break; case OPC1_32_RLC_ADDIH_A:
tcg_gen_addi_tl(cpu_gpr_a[VAR_4], cpu_gpr_a[VAR_3], const16 << 16); break; case OPC1_32_RLC_MFCR:
const16 = MASK_OP_RLC_CONST16(VAR_1->opcode); gen_mfcr(VAR_0, cpu_gpr_d[VAR_4], const16); break; case OPC1_32_RLC_MOV:
tcg_gen_movi_tl(cpu_gpr_d[VAR_4], const16); break; case OPC1_32_RLC_MOV_64:
if (tricore_feature(VAR_0, TRICORE_FEATURE_16)) { if ((VAR_4 & 0x1) != 0) { } tcg_gen_movi_tl(cpu_gpr_d[VAR_4], const16); tcg_gen_movi_tl(cpu_gpr_d[VAR_4+1], const16 >> 15); } else { } break; case OPC1_32_RLC_MOV_U:
const16 = MASK_OP_RLC_CONST16(VAR_1->opcode); tcg_gen_movi_tl(cpu_gpr_d[VAR_4], const16); break; case OPC1_32_RLC_MOV_H:
tcg_gen_movi_tl(cpu_gpr_d[VAR_4], const16 << 16); break; case OPC1_32_RLC_MOVH_A:
tcg_gen_movi_tl(cpu_gpr_a[VAR_4], const16 << 16); break; case OPC1_32_RLC_MTCR:
const16 = MASK_OP_RLC_CONST16(VAR_1->opcode); gen_mtcr(VAR_0, VAR_1, cpu_gpr_d[VAR_3], const16); break; } }