static void ahci_idp_write(void *opaque, target_phys_addr_t addr,

                           uint64_t val, unsigned size)

{

    AHCIState *s = opaque;



    if (addr == s->idp_offset) {

        /* index register - mask off reserved bits */

        s->idp_index = (uint32_t)val & ((AHCI_MEM_BAR_SIZE - 1) & ~3);

    } else if (addr == s->idp_offset + 4) {

        /* data register - do memory write at location selected by index */

        ahci_mem_write(opaque, s->idp_index, val, size);

    }

}

static void ahci_idp_write(void *opaque, target_phys_addr_t addr,

                           uint64_t val, unsigned size)

{

    AHCIState *s = opaque;



    if (addr == s->idp_offset) {

        

        s->idp_index = (uint32_t)val & ((AHCI_MEM_BAR_SIZE - 1) & ~3);

    } else if (addr == s->idp_offset + 4) {

        

        ahci_mem_write(opaque, s->idp_index, val, size);

    }

}

static void FUNC_0(void *VAR_0, target_phys_addr_t VAR_1,

                           uint64_t VAR_2, unsigned VAR_3)

{

    AHCIState *s = VAR_0;



    if (VAR_1 == s->idp_offset) {

        

        s->idp_index = (uint32_t)VAR_2 & ((AHCI_MEM_BAR_SIZE - 1) & ~3);

    } else if (VAR_1 == s->idp_offset + 4) {

        

        ahci_mem_write(VAR_0, s->idp_index, VAR_2, VAR_3);

    }

}

static void FUNC_0(void *VAR_0, target_phys_addr_t VAR_1,
uint64_t VAR_2, unsigned VAR_3)
{ AHCIState *s = VAR_0; if (VAR_1 == s->idp_offset) { s->idp_index = (uint32_t)VAR_2 & ((AHCI_MEM_BAR_SIZE - 1) & ~3); } else if (VAR_1 == s->idp_offset + 4) { ahci_mem_write(VAR_0, s->idp_index, VAR_2, VAR_3); } }