static void piix3_set_irq(void *opaque, int irq_num, int level)

{

    int i, pic_irq, pic_level;

    PIIX3State *piix3 = opaque;



    /* now we change the pic irq level according to the piix irq mappings */

    /* XXX: optimize */

    pic_irq = piix3->dev.config[0x60 + irq_num];

    if (pic_irq < 16) {

        /* The pic level is the logical OR of all the PCI irqs mapped

           to it */

        pic_level = 0;

        for (i = 0; i < 4; i++) {

            if (pic_irq == piix3->dev.config[0x60 + i]) {

                pic_level |= pci_bus_get_irq_level(piix3->dev.bus, i);

            }

        }

        qemu_set_irq(piix3->pic[pic_irq], pic_level);

    }

}

static void piix3_set_irq(void *opaque, int irq_num, int level)

{

    int i, pic_irq, pic_level;

    PIIX3State *piix3 = opaque;



    

    

    pic_irq = piix3->dev.config[0x60 + irq_num];

    if (pic_irq < 16) {

        



        pic_level = 0;

        for (i = 0; i < 4; i++) {

            if (pic_irq == piix3->dev.config[0x60 + i]) {

                pic_level |= pci_bus_get_irq_level(piix3->dev.bus, i);

            }

        }

        qemu_set_irq(piix3->pic[pic_irq], pic_level);

    }

}

static void FUNC_0(void *VAR_0, int VAR_1, int VAR_2)

{

    int VAR_3, VAR_4, VAR_5;

    PIIX3State *piix3 = VAR_0;



    

    

    VAR_4 = piix3->dev.config[0x60 + VAR_1];

    if (VAR_4 < 16) {

        



        VAR_5 = 0;

        for (VAR_3 = 0; VAR_3 < 4; VAR_3++) {

            if (VAR_4 == piix3->dev.config[0x60 + VAR_3]) {

                VAR_5 |= pci_bus_get_irq_level(piix3->dev.bus, VAR_3);

            }

        }

        qemu_set_irq(piix3->pic[VAR_4], VAR_5);

    }

}

static void FUNC_0(void *VAR_0, int VAR_1, int VAR_2)
{ int VAR_3, VAR_4, VAR_5; PIIX3State *piix3 = VAR_0; VAR_4 = piix3->dev.config[0x60 + VAR_1]; if (VAR_4 < 16) { VAR_5 = 0; for (VAR_3 = 0; VAR_3 < 4; VAR_3++) { if (VAR_4 == piix3->dev.config[0x60 + VAR_3]) { VAR_5 |= pci_bus_get_irq_level(piix3->dev.bus, VAR_3); } } qemu_set_irq(piix3->pic[VAR_4], VAR_5); } }