static void send_scsi_cdb_read10(QPCIDevice *dev, void *ide_base,

                                 uint64_t lba, int nblocks)

{

    Read10CDB pkt = { .padding = 0 };

    int i;



    g_assert_cmpint(lba, <=, UINT32_MAX);

    g_assert_cmpint(nblocks, <=, UINT16_MAX);

    g_assert_cmpint(nblocks, >=, 0);



    /* Construct SCSI CDB packet */

    pkt.opcode = 0x28;

    pkt.lba = cpu_to_be32(lba);

    pkt.nblocks = cpu_to_be16(nblocks);



    /* Send Packet */

    for (i = 0; i < sizeof(Read10CDB)/2; i++) {

        qpci_io_writew(dev, ide_base + reg_data,

                       le16_to_cpu(((uint16_t *)&pkt)[i]));

    }

}

static void send_scsi_cdb_read10(QPCIDevice *dev, void *ide_base,

                                 uint64_t lba, int nblocks)

{

    Read10CDB pkt = { .padding = 0 };

    int i;



    g_assert_cmpint(lba, <=, UINT32_MAX);

    g_assert_cmpint(nblocks, <=, UINT16_MAX);

    g_assert_cmpint(nblocks, >=, 0);



    

    pkt.opcode = 0x28;

    pkt.lba = cpu_to_be32(lba);

    pkt.nblocks = cpu_to_be16(nblocks);



    

    for (i = 0; i < sizeof(Read10CDB)/2; i++) {

        qpci_io_writew(dev, ide_base + reg_data,

                       le16_to_cpu(((uint16_t *)&pkt)[i]));

    }

}

static void send_scsi_cdb_read10(QPCIDevice *dev, void *ide_base,         qpci_io_writew(dev, ide_base + reg_data,
static void FUNC_0(QPCIDevice *VAR_0, void *VAR_1,

                                 uint64_t VAR_2, int VAR_3)

{

    Read10CDB pkt = { .padding = 0 };

    int VAR_4;



    g_assert_cmpint(VAR_2, <=, UINT32_MAX);

    g_assert_cmpint(VAR_3, <=, UINT16_MAX);

    g_assert_cmpint(VAR_3, >=, 0);



    

    pkt.opcode = 0x28;

    pkt.VAR_2 = cpu_to_be32(VAR_2);

    pkt.VAR_3 = cpu_to_be16(VAR_3);



    

    for (VAR_4 = 0; VAR_4 < sizeof(Read10CDB)/2; VAR_4++) {

        qpci_io_writew(VAR_0, VAR_1 + reg_data,

                       le16_to_cpu(((uint16_t *)&pkt)[VAR_4]));

    }

}

static void FUNC_0(QPCIDevice *VAR_0, void *VAR_1,
uint64_t VAR_2, int VAR_3)
{ Read10CDB pkt = { .padding = 0 }; int VAR_4; g_assert_cmpint(VAR_2, <=, UINT32_MAX); g_assert_cmpint(VAR_3, <=, UINT16_MAX); g_assert_cmpint(VAR_3, >=, 0); pkt.opcode = 0x28; pkt.VAR_2 = cpu_to_be32(VAR_2); pkt.VAR_3 = cpu_to_be16(VAR_3); for (VAR_4 = 0; VAR_4 < sizeof(Read10CDB)/2; VAR_4++) { qpci_io_writew(VAR_0, VAR_1 + reg_data,
le16_to_cpu(((uint16_t *)&pkt)[VAR_4])); } }