void lm4549_write(lm4549_state *s,

                  target_phys_addr_t offset, uint32_t value)

{

    uint16_t *regfile = s->regfile;



    assert(offset < 128);

    DPRINTF("write [0x%02x] = 0x%04x\n", offset, value);



    switch (offset) {

    case LM4549_Reset:

        lm4549_reset(s);

        break;



    case LM4549_PCM_Front_DAC_Rate:

        regfile[LM4549_PCM_Front_DAC_Rate] = value;

        DPRINTF("DAC rate change = %i\n", value);



        /* Re-open a voice with the new sample rate */

        struct audsettings as;

        as.freq = value;

        as.nchannels = 2;

        as.fmt = AUD_FMT_S16;

        as.endianness = 0;



        s->voice = AUD_open_out(

            &s->card,

            s->voice,

            "lm4549.out",

            s,

            lm4549_audio_out_callback,

            &as

        );

        break;



    case LM4549_Powerdown_Ctrl_Stat:

        value &= ~0xf;

        value |= regfile[LM4549_Powerdown_Ctrl_Stat] & 0xf;

        regfile[LM4549_Powerdown_Ctrl_Stat] = value;

        break;



    case LM4549_Ext_Audio_ID:

    case LM4549_Vendor_ID1:

    case LM4549_Vendor_ID2:

        DPRINTF("Write to read-only register 0x%x\n", (int)offset);

        break;



    default:

        /* Store the new value */

        regfile[offset] = value;

        break;

    }

}

void lm4549_write(lm4549_state *s,

                  target_phys_addr_t offset, uint32_t value)

{

    uint16_t *regfile = s->regfile;



    assert(offset < 128);

    DPRINTF("write [0x%02x] = 0x%04x\n", offset, value);



    switch (offset) {

    case LM4549_Reset:

        lm4549_reset(s);

        break;



    case LM4549_PCM_Front_DAC_Rate:

        regfile[LM4549_PCM_Front_DAC_Rate] = value;

        DPRINTF("DAC rate change = %i\n", value);



        

        struct audsettings as;

        as.freq = value;

        as.nchannels = 2;

        as.fmt = AUD_FMT_S16;

        as.endianness = 0;



        s->voice = AUD_open_out(

            &s->card,

            s->voice,

            "lm4549.out",

            s,

            lm4549_audio_out_callback,

            &as

        );

        break;



    case LM4549_Powerdown_Ctrl_Stat:

        value &= ~0xf;

        value |= regfile[LM4549_Powerdown_Ctrl_Stat] & 0xf;

        regfile[LM4549_Powerdown_Ctrl_Stat] = value;

        break;



    case LM4549_Ext_Audio_ID:

    case LM4549_Vendor_ID1:

    case LM4549_Vendor_ID2:

        DPRINTF("Write to read-only register 0x%x\n", (int)offset);

        break;



    default:

        

        regfile[offset] = value;

        break;

    }

}

void FUNC_0(lm4549_state *VAR_0,

                  target_phys_addr_t VAR_1, uint32_t VAR_2)

{

    uint16_t *regfile = VAR_0->regfile;



    assert(VAR_1 < 128);

    DPRINTF("write [0x%02x] = 0x%04x\n", VAR_1, VAR_2);



    switch (VAR_1) {

    case LM4549_Reset:

        lm4549_reset(VAR_0);

        break;



    case LM4549_PCM_Front_DAC_Rate:

        regfile[LM4549_PCM_Front_DAC_Rate] = VAR_2;

        DPRINTF("DAC rate change = %i\n", VAR_2);



        

        struct audsettings VAR_3;

        VAR_3.freq = VAR_2;

        VAR_3.nchannels = 2;

        VAR_3.fmt = AUD_FMT_S16;

        VAR_3.endianness = 0;



        VAR_0->voice = AUD_open_out(

            &VAR_0->card,

            VAR_0->voice,

            "lm4549.out",

            VAR_0,

            lm4549_audio_out_callback,

            &VAR_3

        );

        break;



    case LM4549_Powerdown_Ctrl_Stat:

        VAR_2 &= ~0xf;

        VAR_2 |= regfile[LM4549_Powerdown_Ctrl_Stat] & 0xf;

        regfile[LM4549_Powerdown_Ctrl_Stat] = VAR_2;

        break;



    case LM4549_Ext_Audio_ID:

    case LM4549_Vendor_ID1:

    case LM4549_Vendor_ID2:

        DPRINTF("Write to read-only register 0x%x\n", (int)VAR_1);

        break;



    default:

        

        regfile[VAR_1] = VAR_2;

        break;

    }

}

void FUNC_0(lm4549_state *VAR_0,
target_phys_addr_t VAR_1, uint32_t VAR_2)
{ uint16_t *regfile = VAR_0->regfile; assert(VAR_1 < 128); DPRINTF("write [0x%02x] = 0x%04x\n", VAR_1, VAR_2); switch (VAR_1) { case LM4549_Reset:
lm4549_reset(VAR_0); break; case LM4549_PCM_Front_DAC_Rate:
regfile[LM4549_PCM_Front_DAC_Rate] = VAR_2; DPRINTF("DAC rate change = %i\n", VAR_2); struct audsettings VAR_3; VAR_3.freq = VAR_2; VAR_3.nchannels = 2; VAR_3.fmt = AUD_FMT_S16; VAR_3.endianness = 0; VAR_0->voice = AUD_open_out(
&VAR_0->card,
VAR_0->voice,
"lm4549.out",
VAR_0,
lm4549_audio_out_callback,
&VAR_3
); break; case LM4549_Powerdown_Ctrl_Stat:
VAR_2 &= ~0xf; VAR_2 |= regfile[LM4549_Powerdown_Ctrl_Stat] & 0xf; regfile[LM4549_Powerdown_Ctrl_Stat] = VAR_2; break; case LM4549_Ext_Audio_ID:
case LM4549_Vendor_ID1:
case LM4549_Vendor_ID2:
DPRINTF("Write to read-only register 0x%x\n", (int)VAR_1); break; default:
regfile[VAR_1] = VAR_2; break; } }