static inline int vmsvga_fifo_length(struct vmsvga_state_s *s)

{

    int num;



    if (!s->config || !s->enable) {

        return 0;

    }



    /* Check range and alignment.  */

    if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) {

        return 0;

    }

    if (CMD(min) < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fifo) {

        return 0;

    }

    if (CMD(max) > SVGA_FIFO_SIZE ||

        CMD(min) >= SVGA_FIFO_SIZE ||

        CMD(stop) >= SVGA_FIFO_SIZE ||

        CMD(next_cmd) >= SVGA_FIFO_SIZE) {

        return 0;

    }

    if (CMD(max) < CMD(min) + 10 * 1024) {

        return 0;

    }



    num = CMD(next_cmd) - CMD(stop);

    if (num < 0) {

        num += CMD(max) - CMD(min);

    }

    return num >> 2;

}

static inline int vmsvga_fifo_length(struct vmsvga_state_s *s)

{

    int num;



    if (!s->config || !s->enable) {

        return 0;

    }



    

    if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) {

        return 0;

    }

    if (CMD(min) < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fifo) {

        return 0;

    }

    if (CMD(max) > SVGA_FIFO_SIZE ||

        CMD(min) >= SVGA_FIFO_SIZE ||

        CMD(stop) >= SVGA_FIFO_SIZE ||

        CMD(next_cmd) >= SVGA_FIFO_SIZE) {

        return 0;

    }

    if (CMD(max) < CMD(min) + 10 * 1024) {

        return 0;

    }



    num = CMD(next_cmd) - CMD(stop);

    if (num < 0) {

        num += CMD(max) - CMD(min);

    }

    return num >> 2;

}

    if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) {     if (CMD(min) < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fifo) {     if (CMD(max) > SVGA_FIFO_SIZE ||         CMD(min) >= SVGA_FIFO_SIZE ||         CMD(stop) >= SVGA_FIFO_SIZE ||         CMD(next_cmd) >= SVGA_FIFO_SIZE) {     if (CMD(max) < CMD(min) + 10 * 1024) {     num = CMD(next_cmd) - CMD(stop);         num += CMD(max) - CMD(min);
static inline int FUNC_0(struct vmsvga_state_s *VAR_0)

{

    int VAR_1;



    if (!VAR_0->config || !VAR_0->enable) {

        return 0;

    }



    

    if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) {

        return 0;

    }

    if (CMD(min) < (uint8_t *) VAR_0->cmd->fifo - (uint8_t *) VAR_0->fifo) {

        return 0;

    }

    if (CMD(max) > SVGA_FIFO_SIZE ||

        CMD(min) >= SVGA_FIFO_SIZE ||

        CMD(stop) >= SVGA_FIFO_SIZE ||

        CMD(next_cmd) >= SVGA_FIFO_SIZE) {

        return 0;

    }

    if (CMD(max) < CMD(min) + 10 * 1024) {

        return 0;

    }



    VAR_1 = CMD(next_cmd) - CMD(stop);

    if (VAR_1 < 0) {

        VAR_1 += CMD(max) - CMD(min);

    }

    return VAR_1 >> 2;

}

static inline int FUNC_0(struct vmsvga_state_s *VAR_0)
{ int VAR_1; if (!VAR_0->config || !VAR_0->enable) { return 0; } if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) { return 0; } if (CMD(min) < (uint8_t *) VAR_0->cmd->fifo - (uint8_t *) VAR_0->fifo) { return 0; } if (CMD(max) > SVGA_FIFO_SIZE ||
CMD(min) >= SVGA_FIFO_SIZE ||
CMD(stop) >= SVGA_FIFO_SIZE ||
CMD(next_cmd) >= SVGA_FIFO_SIZE) { return 0; } if (CMD(max) < CMD(min) + 10 * 1024) { return 0; } VAR_1 = CMD(next_cmd) - CMD(stop); if (VAR_1 < 0) { VAR_1 += CMD(max) - CMD(min); } return VAR_1 >> 2; }