static void quantize_and_encode_band_cost_UPAIR12_mips(struct AACEncContext *s,

                                                       PutBitContext *pb, const float *in, float *out,

                                                       const float *scaled, int size, int scale_idx,

                                                       int cb, const float lambda, const float uplim,

                                                       int *bits, const float ROUNDING)

{

    const float Q34 = ff_aac_pow34sf_tab[POW_SF2_ZERO - scale_idx + SCALE_ONE_POS - SCALE_DIV_512];

    const float IQ  = ff_aac_pow2sf_tab [POW_SF2_ZERO + scale_idx - SCALE_ONE_POS + SCALE_DIV_512];

    int i;

    int qc1, qc2, qc3, qc4;



    uint8_t  *p_bits  = (uint8_t*) ff_aac_spectral_bits[cb-1];

    uint16_t *p_codes = (uint16_t*)ff_aac_spectral_codes[cb-1];

    float    *p_vec   = (float   *)ff_aac_codebook_vectors[cb-1];



    abs_pow34_v(s->scoefs, in, size);

    scaled = s->scoefs;

    for (i = 0; i < size; i += 4) {

        int curidx1, curidx2, sign1, count1, sign2, count2;

        int *in_int = (int *)&in[i];

        uint8_t v_bits;

        unsigned int v_codes;

        int t0, t1, t2, t3, t4;

        const float *vec1, *vec2;



        qc1 = scaled[i  ] * Q34 + ROUND_STANDARD;

        qc2 = scaled[i+1] * Q34 + ROUND_STANDARD;

        qc3 = scaled[i+2] * Q34 + ROUND_STANDARD;

        qc4 = scaled[i+3] * Q34 + ROUND_STANDARD;



        __asm__ volatile (

            ".set push                              \n\t"

            ".set noreorder                         \n\t"



            "ori    %[t4],      $zero,      12      \n\t"

            "ori    %[sign1],   $zero,      0       \n\t"

            "ori    %[sign2],   $zero,      0       \n\t"

            "slt    %[t0],      %[t4],      %[qc1]  \n\t"

            "slt    %[t1],      %[t4],      %[qc2]  \n\t"

            "slt    %[t2],      %[t4],      %[qc3]  \n\t"

            "slt    %[t3],      %[t4],      %[qc4]  \n\t"

            "movn   %[qc1],     %[t4],      %[t0]   \n\t"

            "movn   %[qc2],     %[t4],      %[t1]   \n\t"

            "movn   %[qc3],     %[t4],      %[t2]   \n\t"

            "movn   %[qc4],     %[t4],      %[t3]   \n\t"

            "lw     %[t0],      0(%[in_int])        \n\t"

            "lw     %[t1],      4(%[in_int])        \n\t"

            "lw     %[t2],      8(%[in_int])        \n\t"

            "lw     %[t3],      12(%[in_int])       \n\t"

            "slt    %[t0],      %[t0],      $zero   \n\t"

            "movn   %[sign1],   %[t0],      %[qc1]  \n\t"

            "slt    %[t2],      %[t2],      $zero   \n\t"

            "movn   %[sign2],   %[t2],      %[qc3]  \n\t"

            "slt    %[t1],      %[t1],      $zero   \n\t"

            "sll    %[t0],      %[sign1],   1       \n\t"

            "or     %[t0],      %[t0],      %[t1]   \n\t"

            "movn   %[sign1],   %[t0],      %[qc2]  \n\t"

            "slt    %[t3],      %[t3],      $zero   \n\t"

            "sll    %[t0],      %[sign2],   1       \n\t"

            "or     %[t0],      %[t0],      %[t3]   \n\t"

            "movn   %[sign2],   %[t0],      %[qc4]  \n\t"

            "slt    %[count1],  $zero,      %[qc1]  \n\t"

            "slt    %[t1],      $zero,      %[qc2]  \n\t"

            "slt    %[count2],  $zero,      %[qc3]  \n\t"

            "slt    %[t2],      $zero,      %[qc4]  \n\t"

            "addu   %[count1],  %[count1],  %[t1]   \n\t"

            "addu   %[count2],  %[count2],  %[t2]   \n\t"



            ".set pop                               \n\t"



            : [qc1]"+r"(qc1), [qc2]"+r"(qc2),

              [qc3]"+r"(qc3), [qc4]"+r"(qc4),

              [sign1]"=&r"(sign1), [count1]"=&r"(count1),

              [sign2]"=&r"(sign2), [count2]"=&r"(count2),

              [t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3),

              [t4]"=&r"(t4)

            : [in_int]"r"(in_int)

            : "memory"

        );



        curidx1  = 13 * qc1;

        curidx1 += qc2;



        v_codes = (p_codes[curidx1] << count1) | sign1;

        v_bits  = p_bits[curidx1] + count1;

        put_bits(pb, v_bits, v_codes);



        curidx2  = 13 * qc3;

        curidx2 += qc4;



        v_codes = (p_codes[curidx2] << count2) | sign2;

        v_bits  = p_bits[curidx2] + count2;

        put_bits(pb, v_bits, v_codes);



        if (out) {

           vec1 = &p_vec[curidx1*2];

           vec2 = &p_vec[curidx2*2];

           out[i+0] = copysignf(vec1[0] * IQ, in[i+0]);

           out[i+1] = copysignf(vec1[1] * IQ, in[i+1]);

           out[i+2] = copysignf(vec2[0] * IQ, in[i+2]);

           out[i+3] = copysignf(vec2[1] * IQ, in[i+3]);

        }

    }

}

static void quantize_and_encode_band_cost_UPAIR12_mips(struct AACEncContext *s,

                                                       PutBitContext *pb, const float *in, float *out,

                                                       const float *scaled, int size, int scale_idx,

                                                       int cb, const float lambda, const float uplim,

                                                       int *bits, const float ROUNDING)

{

    const float Q34 = ff_aac_pow34sf_tab[POW_SF2_ZERO - scale_idx + SCALE_ONE_POS - SCALE_DIV_512];

    const float IQ  = ff_aac_pow2sf_tab [POW_SF2_ZERO + scale_idx - SCALE_ONE_POS + SCALE_DIV_512];

    int i;

    int qc1, qc2, qc3, qc4;



    uint8_t  *p_bits  = (uint8_t*) ff_aac_spectral_bits[cb-1];

    uint16_t *p_codes = (uint16_t*)ff_aac_spectral_codes[cb-1];

    float    *p_vec   = (float   *)ff_aac_codebook_vectors[cb-1];



    abs_pow34_v(s->scoefs, in, size);

    scaled = s->scoefs;

    for (i = 0; i < size; i += 4) {

        int curidx1, curidx2, sign1, count1, sign2, count2;

        int *in_int = (int *)&in[i];

        uint8_t v_bits;

        unsigned int v_codes;

        int t0, t1, t2, t3, t4;

        const float *vec1, *vec2;



        qc1 = scaled[i  ] * Q34 + ROUND_STANDARD;

        qc2 = scaled[i+1] * Q34 + ROUND_STANDARD;

        qc3 = scaled[i+2] * Q34 + ROUND_STANDARD;

        qc4 = scaled[i+3] * Q34 + ROUND_STANDARD;



        __asm__ volatile (

            ".set push                              \n\t"

            ".set noreorder                         \n\t"



            "ori    %[t4],      $zero,      12      \n\t"

            "ori    %[sign1],   $zero,      0       \n\t"

            "ori    %[sign2],   $zero,      0       \n\t"

            "slt    %[t0],      %[t4],      %[qc1]  \n\t"

            "slt    %[t1],      %[t4],      %[qc2]  \n\t"

            "slt    %[t2],      %[t4],      %[qc3]  \n\t"

            "slt    %[t3],      %[t4],      %[qc4]  \n\t"

            "movn   %[qc1],     %[t4],      %[t0]   \n\t"

            "movn   %[qc2],     %[t4],      %[t1]   \n\t"

            "movn   %[qc3],     %[t4],      %[t2]   \n\t"

            "movn   %[qc4],     %[t4],      %[t3]   \n\t"

            "lw     %[t0],      0(%[in_int])        \n\t"

            "lw     %[t1],      4(%[in_int])        \n\t"

            "lw     %[t2],      8(%[in_int])        \n\t"

            "lw     %[t3],      12(%[in_int])       \n\t"

            "slt    %[t0],      %[t0],      $zero   \n\t"

            "movn   %[sign1],   %[t0],      %[qc1]  \n\t"

            "slt    %[t2],      %[t2],      $zero   \n\t"

            "movn   %[sign2],   %[t2],      %[qc3]  \n\t"

            "slt    %[t1],      %[t1],      $zero   \n\t"

            "sll    %[t0],      %[sign1],   1       \n\t"

            "or     %[t0],      %[t0],      %[t1]   \n\t"

            "movn   %[sign1],   %[t0],      %[qc2]  \n\t"

            "slt    %[t3],      %[t3],      $zero   \n\t"

            "sll    %[t0],      %[sign2],   1       \n\t"

            "or     %[t0],      %[t0],      %[t3]   \n\t"

            "movn   %[sign2],   %[t0],      %[qc4]  \n\t"

            "slt    %[count1],  $zero,      %[qc1]  \n\t"

            "slt    %[t1],      $zero,      %[qc2]  \n\t"

            "slt    %[count2],  $zero,      %[qc3]  \n\t"

            "slt    %[t2],      $zero,      %[qc4]  \n\t"

            "addu   %[count1],  %[count1],  %[t1]   \n\t"

            "addu   %[count2],  %[count2],  %[t2]   \n\t"



            ".set pop                               \n\t"



            : [qc1]"+r"(qc1), [qc2]"+r"(qc2),

              [qc3]"+r"(qc3), [qc4]"+r"(qc4),

              [sign1]"=&r"(sign1), [count1]"=&r"(count1),

              [sign2]"=&r"(sign2), [count2]"=&r"(count2),

              [t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3),

              [t4]"=&r"(t4)

            : [in_int]"r"(in_int)

            : "memory"

        );



        curidx1  = 13 * qc1;

        curidx1 += qc2;



        v_codes = (p_codes[curidx1] << count1) | sign1;

        v_bits  = p_bits[curidx1] + count1;

        put_bits(pb, v_bits, v_codes);



        curidx2  = 13 * qc3;

        curidx2 += qc4;



        v_codes = (p_codes[curidx2] << count2) | sign2;

        v_bits  = p_bits[curidx2] + count2;

        put_bits(pb, v_bits, v_codes);



        if (out) {

           vec1 = &p_vec[curidx1*2];

           vec2 = &p_vec[curidx2*2];

           out[i+0] = copysignf(vec1[0] * IQ, in[i+0]);

           out[i+1] = copysignf(vec1[1] * IQ, in[i+1]);

           out[i+2] = copysignf(vec2[0] * IQ, in[i+2]);

           out[i+3] = copysignf(vec2[1] * IQ, in[i+3]);

        }

    }

}

        if (out) {         if (out) {         if (out) {            vec2 = &p_vec[curidx2*2];         if (out) {            vec1 = &p_vec[curidx1*2];            vec2 = &p_vec[curidx2*2];            out[i+0] = copysignf(vec1[0] * IQ, in[i+0]);            out[i+1] = copysignf(vec1[1] * IQ, in[i+1]);            out[i+2] = copysignf(vec2[0] * IQ, in[i+2]);            out[i+3] = copysignf(vec2[1] * IQ, in[i+3]);                                                        int *bits, const float ROUNDING)         if (out) {            vec1 = &p_vec[curidx1*2];            vec2 = &p_vec[curidx2*2];            out[i+0] = copysignf(vec1[0] * IQ, in[i+0]);            out[i+1] = copysignf(vec1[1] * IQ, in[i+1]);            out[i+2] = copysignf(vec2[0] * IQ, in[i+2]);            out[i+3] = copysignf(vec2[1] * IQ, in[i+3]);
static void FUNC_0(struct AACEncContext *VAR_0,

                                                       PutBitContext *VAR_1, const float *VAR_2, float *VAR_3,

                                                       const float *VAR_4, int VAR_5, int VAR_6,

                                                       int VAR_7, const float VAR_8, const float VAR_9,

                                                       int *VAR_10, const float VAR_11)

{

    const float VAR_12 = ff_aac_pow34sf_tab[POW_SF2_ZERO - VAR_6 + SCALE_ONE_POS - SCALE_DIV_512];

    const float VAR_13  = ff_aac_pow2sf_tab [POW_SF2_ZERO + VAR_6 - SCALE_ONE_POS + SCALE_DIV_512];

    int VAR_14;

    int VAR_15, VAR_16, VAR_17, VAR_18;



    uint8_t  *p_bits  = (uint8_t*) ff_aac_spectral_bits[VAR_7-1];

    uint16_t *p_codes = (uint16_t*)ff_aac_spectral_codes[VAR_7-1];

    float    *VAR_19   = (float   *)ff_aac_codebook_vectors[VAR_7-1];



    abs_pow34_v(VAR_0->scoefs, VAR_2, VAR_5);

    VAR_4 = VAR_0->scoefs;

    for (VAR_14 = 0; VAR_14 < VAR_5; VAR_14 += 4) {

        int VAR_20, VAR_21, VAR_22, VAR_23, VAR_24, VAR_25;

        int *VAR_26 = (int *)&VAR_2[VAR_14];

        uint8_t v_bits;

        unsigned int VAR_27;

        int VAR_28, VAR_29, VAR_30, VAR_31, VAR_32;

        const float *VAR_33, *VAR_34;



        VAR_15 = VAR_4[VAR_14  ] * VAR_12 + ROUND_STANDARD;

        VAR_16 = VAR_4[VAR_14+1] * VAR_12 + ROUND_STANDARD;

        VAR_17 = VAR_4[VAR_14+2] * VAR_12 + ROUND_STANDARD;

        VAR_18 = VAR_4[VAR_14+3] * VAR_12 + ROUND_STANDARD;



        __asm__ volatile (

            ".set push                              \n\t"

            ".set noreorder                         \n\t"



            "ori    %[VAR_32],      $zero,      12      \n\t"

            "ori    %[VAR_22],   $zero,      0       \n\t"

            "ori    %[VAR_24],   $zero,      0       \n\t"

            "slt    %[VAR_28],      %[VAR_32],      %[VAR_15]  \n\t"

            "slt    %[VAR_29],      %[VAR_32],      %[VAR_16]  \n\t"

            "slt    %[VAR_30],      %[VAR_32],      %[VAR_17]  \n\t"

            "slt    %[VAR_31],      %[VAR_32],      %[VAR_18]  \n\t"

            "movn   %[VAR_15],     %[VAR_32],      %[VAR_28]   \n\t"

            "movn   %[VAR_16],     %[VAR_32],      %[VAR_29]   \n\t"

            "movn   %[VAR_17],     %[VAR_32],      %[VAR_30]   \n\t"

            "movn   %[VAR_18],     %[VAR_32],      %[VAR_31]   \n\t"

            "lw     %[VAR_28],      0(%[VAR_26])        \n\t"

            "lw     %[VAR_29],      4(%[VAR_26])        \n\t"

            "lw     %[VAR_30],      8(%[VAR_26])        \n\t"

            "lw     %[VAR_31],      12(%[VAR_26])       \n\t"

            "slt    %[VAR_28],      %[VAR_28],      $zero   \n\t"

            "movn   %[VAR_22],   %[VAR_28],      %[VAR_15]  \n\t"

            "slt    %[VAR_30],      %[VAR_30],      $zero   \n\t"

            "movn   %[VAR_24],   %[VAR_30],      %[VAR_17]  \n\t"

            "slt    %[VAR_29],      %[VAR_29],      $zero   \n\t"

            "sll    %[VAR_28],      %[VAR_22],   1       \n\t"

            "or     %[VAR_28],      %[VAR_28],      %[VAR_29]   \n\t"

            "movn   %[VAR_22],   %[VAR_28],      %[VAR_16]  \n\t"

            "slt    %[VAR_31],      %[VAR_31],      $zero   \n\t"

            "sll    %[VAR_28],      %[VAR_24],   1       \n\t"

            "or     %[VAR_28],      %[VAR_28],      %[VAR_31]   \n\t"

            "movn   %[VAR_24],   %[VAR_28],      %[VAR_18]  \n\t"

            "slt    %[VAR_23],  $zero,      %[VAR_15]  \n\t"

            "slt    %[VAR_29],      $zero,      %[VAR_16]  \n\t"

            "slt    %[VAR_25],  $zero,      %[VAR_17]  \n\t"

            "slt    %[VAR_30],      $zero,      %[VAR_18]  \n\t"

            "addu   %[VAR_23],  %[VAR_23],  %[VAR_29]   \n\t"

            "addu   %[VAR_25],  %[VAR_25],  %[VAR_30]   \n\t"



            ".set pop                               \n\t"



            : [VAR_15]"+r"(VAR_15), [VAR_16]"+r"(VAR_16),

              [VAR_17]"+r"(VAR_17), [VAR_18]"+r"(VAR_18),

              [VAR_22]"=&r"(VAR_22), [VAR_23]"=&r"(VAR_23),

              [VAR_24]"=&r"(VAR_24), [VAR_25]"=&r"(VAR_25),

              [VAR_28]"=&r"(VAR_28), [VAR_29]"=&r"(VAR_29), [VAR_30]"=&r"(VAR_30), [VAR_31]"=&r"(VAR_31),

              [VAR_32]"=&r"(VAR_32)

            : [VAR_26]"r"(VAR_26)

            : "memory"

        );



        VAR_20  = 13 * VAR_15;

        VAR_20 += VAR_16;



        VAR_27 = (p_codes[VAR_20] << VAR_23) | VAR_22;

        v_bits  = p_bits[VAR_20] + VAR_23;

        put_bits(VAR_1, v_bits, VAR_27);



        VAR_21  = 13 * VAR_17;

        VAR_21 += VAR_18;



        VAR_27 = (p_codes[VAR_21] << VAR_25) | VAR_24;

        v_bits  = p_bits[VAR_21] + VAR_25;

        put_bits(VAR_1, v_bits, VAR_27);



        if (VAR_3) {

           VAR_33 = &VAR_19[VAR_20*2];

           VAR_34 = &VAR_19[VAR_21*2];

           VAR_3[VAR_14+0] = copysignf(VAR_33[0] * VAR_13, VAR_2[VAR_14+0]);

           VAR_3[VAR_14+1] = copysignf(VAR_33[1] * VAR_13, VAR_2[VAR_14+1]);

           VAR_3[VAR_14+2] = copysignf(VAR_34[0] * VAR_13, VAR_2[VAR_14+2]);

           VAR_3[VAR_14+3] = copysignf(VAR_34[1] * VAR_13, VAR_2[VAR_14+3]);

        }

    }

}

static void FUNC_0(struct AACEncContext *VAR_0,
PutBitContext *VAR_1, const float *VAR_2, float *VAR_3,
const float *VAR_4, int VAR_5, int VAR_6,
int VAR_7, const float VAR_8, const float VAR_9,
int *VAR_10, const float VAR_11)
{ const float VAR_12 = ff_aac_pow34sf_tab[POW_SF2_ZERO - VAR_6 + SCALE_ONE_POS - SCALE_DIV_512]; const float VAR_13  = ff_aac_pow2sf_tab [POW_SF2_ZERO + VAR_6 - SCALE_ONE_POS + SCALE_DIV_512]; int VAR_14; int VAR_15, VAR_16, VAR_17, VAR_18; uint8_t  *p_bits  = (uint8_t*) ff_aac_spectral_bits[VAR_7-1]; uint16_t *p_codes = (uint16_t*)ff_aac_spectral_codes[VAR_7-1]; float    *VAR_19   = (float   *)ff_aac_codebook_vectors[VAR_7-1]; abs_pow34_v(VAR_0->scoefs, VAR_2, VAR_5); VAR_4 = VAR_0->scoefs; for (VAR_14 = 0; VAR_14 < VAR_5; VAR_14 += 4) { int VAR_20, VAR_21, VAR_22, VAR_23, VAR_24, VAR_25; int *VAR_26 = (int *)&VAR_2[VAR_14]; uint8_t v_bits; unsigned int VAR_27; int VAR_28, VAR_29, VAR_30, VAR_31, VAR_32; const float *VAR_33, *VAR_34; VAR_15 = VAR_4[VAR_14  ] * VAR_12 + ROUND_STANDARD; VAR_16 = VAR_4[VAR_14+1] * VAR_12 + ROUND_STANDARD; VAR_17 = VAR_4[VAR_14+2] * VAR_12 + ROUND_STANDARD; VAR_18 = VAR_4[VAR_14+3] * VAR_12 + ROUND_STANDARD; __asm__ volatile (
".set push                              \n\t"
".set noreorder                         \n\t"
"ori    %[VAR_32],      $zero,      12      \n\t"
"ori    %[VAR_22],   $zero,      0       \n\t"
"ori    %[VAR_24],   $zero,      0       \n\t"
"slt    %[VAR_28],      %[VAR_32],      %[VAR_15]  \n\t"
"slt    %[VAR_29],      %[VAR_32],      %[VAR_16]  \n\t"
"slt    %[VAR_30],      %[VAR_32],      %[VAR_17]  \n\t"
"slt    %[VAR_31],      %[VAR_32],      %[VAR_18]  \n\t"
"movn   %[VAR_15],     %[VAR_32],      %[VAR_28]   \n\t"
"movn   %[VAR_16],     %[VAR_32],      %[VAR_29]   \n\t"
"movn   %[VAR_17],     %[VAR_32],      %[VAR_30]   \n\t"
"movn   %[VAR_18],     %[VAR_32],      %[VAR_31]   \n\t"
"lw     %[VAR_28],      0(%[VAR_26])        \n\t"
"lw     %[VAR_29],      4(%[VAR_26])        \n\t"
"lw     %[VAR_30],      8(%[VAR_26])        \n\t"
"lw     %[VAR_31],      12(%[VAR_26])       \n\t"
"slt    %[VAR_28],      %[VAR_28],      $zero   \n\t"
"movn   %[VAR_22],   %[VAR_28],      %[VAR_15]  \n\t"
"slt    %[VAR_30],      %[VAR_30],      $zero   \n\t"
"movn   %[VAR_24],   %[VAR_30],      %[VAR_17]  \n\t"
"slt    %[VAR_29],      %[VAR_29],      $zero   \n\t"
"sll    %[VAR_28],      %[VAR_22],   1       \n\t"
"or     %[VAR_28],      %[VAR_28],      %[VAR_29]   \n\t"
"movn   %[VAR_22],   %[VAR_28],      %[VAR_16]  \n\t"
"slt    %[VAR_31],      %[VAR_31],      $zero   \n\t"
"sll    %[VAR_28],      %[VAR_24],   1       \n\t"
"or     %[VAR_28],      %[VAR_28],      %[VAR_31]   \n\t"
"movn   %[VAR_24],   %[VAR_28],      %[VAR_18]  \n\t"
"slt    %[VAR_23],  $zero,      %[VAR_15]  \n\t"
"slt    %[VAR_29],      $zero,      %[VAR_16]  \n\t"
"slt    %[VAR_25],  $zero,      %[VAR_17]  \n\t"
"slt    %[VAR_30],      $zero,      %[VAR_18]  \n\t"
"addu   %[VAR_23],  %[VAR_23],  %[VAR_29]   \n\t"
"addu   %[VAR_25],  %[VAR_25],  %[VAR_30]   \n\t"
".set pop                               \n\t"
: [VAR_15]"+r"(VAR_15), [VAR_16]"+r"(VAR_16),
[VAR_17]"+r"(VAR_17), [VAR_18]"+r"(VAR_18),
[VAR_22]"=&r"(VAR_22), [VAR_23]"=&r"(VAR_23),
[VAR_24]"=&r"(VAR_24), [VAR_25]"=&r"(VAR_25),
[VAR_28]"=&r"(VAR_28), [VAR_29]"=&r"(VAR_29), [VAR_30]"=&r"(VAR_30), [VAR_31]"=&r"(VAR_31),
[VAR_32]"=&r"(VAR_32)
: [VAR_26]"r"(VAR_26)
: "memory"
); VAR_20  = 13 * VAR_15; VAR_20 += VAR_16; VAR_27 = (p_codes[VAR_20] << VAR_23) | VAR_22; v_bits  = p_bits[VAR_20] + VAR_23; put_bits(VAR_1, v_bits, VAR_27); VAR_21  = 13 * VAR_17; VAR_21 += VAR_18; VAR_27 = (p_codes[VAR_21] << VAR_25) | VAR_24; v_bits  = p_bits[VAR_21] + VAR_25; put_bits(VAR_1, v_bits, VAR_27); if (VAR_3) { VAR_33 = &VAR_19[VAR_20*2]; VAR_34 = &VAR_19[VAR_21*2]; VAR_3[VAR_14+0] = copysignf(VAR_33[0] * VAR_13, VAR_2[VAR_14+0]); VAR_3[VAR_14+1] = copysignf(VAR_33[1] * VAR_13, VAR_2[VAR_14+1]); VAR_3[VAR_14+2] = copysignf(VAR_34[0] * VAR_13, VAR_2[VAR_14+2]); VAR_3[VAR_14+3] = copysignf(VAR_34[1] * VAR_13, VAR_2[VAR_14+3]); } } }