void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,

                       const char *boot_device, DisplayState *ds,

                       const char *kernel_filename, const char *kernel_cmdline,

                       const char *initrd_filename, const char *cpu_model)

{

    CPUState *env;

    struct etraxfs_pic *pic;

    void *etraxfs_dmac;

    struct etraxfs_dma_client *eth[2] = {NULL, NULL};

    int kernel_size;

    int i;

    ram_addr_t phys_ram;

    ram_addr_t phys_flash;

    ram_addr_t phys_intmem;



    /* init CPUs */

    if (cpu_model == NULL) {

        cpu_model = "crisv32";

    }

    env = cpu_init(cpu_model);

    qemu_register_reset(main_cpu_reset, env);



    /* allocate RAM */

    phys_ram = qemu_ram_alloc(ram_size);

    cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);



    /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the 

       internal memory.  */

    phys_intmem = qemu_ram_alloc(INTMEM_SIZE);

    cpu_register_physical_memory(0x38000000, INTMEM_SIZE,

                                 phys_intmem | IO_MEM_RAM);





    phys_flash = qemu_ram_alloc(FLASH_SIZE);

    i = drive_get_index(IF_PFLASH, 0, 0);

    pflash_cfi02_register(0x0, phys_flash,

                          i != -1 ? drives_table[i].bdrv : NULL, (64 * 1024),

                          FLASH_SIZE >> 16,

                          1, 2, 0x0000, 0x0000, 0x0000, 0x0000,

                          0x555, 0x2aa);

    pic = etraxfs_pic_init(env, 0x3001c000);

    etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);

    for (i = 0; i < 10; i++) {

        /* On ETRAX, odd numbered channels are inputs.  */

        etraxfs_dmac_connect(etraxfs_dmac, i, pic->irq + 7 + i, i & 1);

    }



    /* Add the two ethernet blocks.  */

    eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0x30034000);

    if (nb_nics > 1)

        eth[1] = etraxfs_eth_init(&nd_table[1], env, pic->irq + 26, 0x30036000);



    /* The DMA Connector block is missing, hardwire things for now.  */

    etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);

    etraxfs_dmac_connect_client(etraxfs_dmac, 1, eth[0] + 1);

    if (eth[1]) {

        etraxfs_dmac_connect_client(etraxfs_dmac, 6, eth[1]);

        etraxfs_dmac_connect_client(etraxfs_dmac, 7, eth[1] + 1);

    }



    /* 2 timers.  */

    etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3001e000);

    etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3005e000);



    for (i = 0; i < 4; i++) {

        if (serial_hds[i]) {

            etraxfs_ser_init(env, pic->irq + 0x14 + i,

                             serial_hds[i], 0x30026000 + i * 0x2000);

        }

    }



    if (kernel_filename) {

        uint64_t entry, high;

        int kcmdline_len;



        /* Boots a kernel elf binary, os/linux-2.6/vmlinux from the axis 

           devboard SDK.  */

        kernel_size = load_elf(kernel_filename, -0x80000000LL,

                               &entry, NULL, &high);

        bootstrap_pc = entry;

        if (kernel_size < 0) {

            /* Takes a kimage from the axis devboard SDK.  */

            kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000);

            bootstrap_pc = 0x40004000;

            env->regs[9] = 0x40004000 + kernel_size;

        }

        env->regs[8] = 0x56902387; /* RAM init magic.  */



        if (kernel_cmdline && (kcmdline_len = strlen(kernel_cmdline))) {

            if (kcmdline_len > 256) {

                fprintf(stderr, "Too long CRIS kernel cmdline (max 256)\n");

                exit(1);

            }

            pstrcpy_targphys(high, 256, kernel_cmdline);

            /* Let the kernel know we are modifying the cmdline.  */

            env->regs[10] = 0x87109563;

            env->regs[11] = high;

        }

    }

    env->pc = bootstrap_pc;



    printf ("pc =%x\n", env->pc);

    printf ("ram size =%ld\n", ram_size);

}

void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,

                       const char *boot_device, DisplayState *ds,

                       const char *kernel_filename, const char *kernel_cmdline,

                       const char *initrd_filename, const char *cpu_model)

{

    CPUState *env;

    struct etraxfs_pic *pic;

    void *etraxfs_dmac;

    struct etraxfs_dma_client *eth[2] = {NULL, NULL};

    int kernel_size;

    int i;

    ram_addr_t phys_ram;

    ram_addr_t phys_flash;

    ram_addr_t phys_intmem;



    

    if (cpu_model == NULL) {

        cpu_model = "crisv32";

    }

    env = cpu_init(cpu_model);

    qemu_register_reset(main_cpu_reset, env);



    

    phys_ram = qemu_ram_alloc(ram_size);

    cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);



    



    phys_intmem = qemu_ram_alloc(INTMEM_SIZE);

    cpu_register_physical_memory(0x38000000, INTMEM_SIZE,

                                 phys_intmem | IO_MEM_RAM);





    phys_flash = qemu_ram_alloc(FLASH_SIZE);

    i = drive_get_index(IF_PFLASH, 0, 0);

    pflash_cfi02_register(0x0, phys_flash,

                          i != -1 ? drives_table[i].bdrv : NULL, (64 * 1024),

                          FLASH_SIZE >> 16,

                          1, 2, 0x0000, 0x0000, 0x0000, 0x0000,

                          0x555, 0x2aa);

    pic = etraxfs_pic_init(env, 0x3001c000);

    etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);

    for (i = 0; i < 10; i++) {

        

        etraxfs_dmac_connect(etraxfs_dmac, i, pic->irq + 7 + i, i & 1);

    }



    

    eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0x30034000);

    if (nb_nics > 1)

        eth[1] = etraxfs_eth_init(&nd_table[1], env, pic->irq + 26, 0x30036000);



    

    etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);

    etraxfs_dmac_connect_client(etraxfs_dmac, 1, eth[0] + 1);

    if (eth[1]) {

        etraxfs_dmac_connect_client(etraxfs_dmac, 6, eth[1]);

        etraxfs_dmac_connect_client(etraxfs_dmac, 7, eth[1] + 1);

    }



    

    etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3001e000);

    etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3005e000);



    for (i = 0; i < 4; i++) {

        if (serial_hds[i]) {

            etraxfs_ser_init(env, pic->irq + 0x14 + i,

                             serial_hds[i], 0x30026000 + i * 0x2000);

        }

    }



    if (kernel_filename) {

        uint64_t entry, high;

        int kcmdline_len;



        



        kernel_size = load_elf(kernel_filename, -0x80000000LL,

                               &entry, NULL, &high);

        bootstrap_pc = entry;

        if (kernel_size < 0) {

            

            kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000);

            bootstrap_pc = 0x40004000;

            env->regs[9] = 0x40004000 + kernel_size;

        }

        env->regs[8] = 0x56902387; 



        if (kernel_cmdline && (kcmdline_len = strlen(kernel_cmdline))) {

            if (kcmdline_len > 256) {

                fprintf(stderr, "Too long CRIS kernel cmdline (max 256)\n");

                exit(1);

            }

            pstrcpy_targphys(high, 256, kernel_cmdline);

            

            env->regs[10] = 0x87109563;

            env->regs[11] = high;

        }

    }

    env->pc = bootstrap_pc;



    printf ("pc =%x\n", env->pc);

    printf ("ram size =%ld\n", ram_size);

}

void FUNC_0 (ram_addr_t VAR_0, int VAR_1,

                       const char *VAR_2, DisplayState *VAR_3,

                       const char *VAR_4, const char *VAR_5,

                       const char *VAR_6, const char *VAR_7)

{

    CPUState *env;

    struct etraxfs_pic *VAR_8;

    void *VAR_9;

    struct etraxfs_dma_client *VAR_10[2] = {NULL, NULL};

    int VAR_11;

    int VAR_12;

    ram_addr_t phys_ram;

    ram_addr_t phys_flash;

    ram_addr_t phys_intmem;



    

    if (VAR_7 == NULL) {

        VAR_7 = "crisv32";

    }

    env = cpu_init(VAR_7);

    qemu_register_reset(main_cpu_reset, env);



    

    phys_ram = qemu_ram_alloc(VAR_0);

    cpu_register_physical_memory(0x40000000, VAR_0, phys_ram | IO_MEM_RAM);



    



    phys_intmem = qemu_ram_alloc(INTMEM_SIZE);

    cpu_register_physical_memory(0x38000000, INTMEM_SIZE,

                                 phys_intmem | IO_MEM_RAM);





    phys_flash = qemu_ram_alloc(FLASH_SIZE);

    VAR_12 = drive_get_index(IF_PFLASH, 0, 0);

    pflash_cfi02_register(0x0, phys_flash,

                          VAR_12 != -1 ? drives_table[VAR_12].bdrv : NULL, (64 * 1024),

                          FLASH_SIZE >> 16,

                          1, 2, 0x0000, 0x0000, 0x0000, 0x0000,

                          0x555, 0x2aa);

    VAR_8 = etraxfs_pic_init(env, 0x3001c000);

    VAR_9 = etraxfs_dmac_init(env, 0x30000000, 10);

    for (VAR_12 = 0; VAR_12 < 10; VAR_12++) {

        

        etraxfs_dmac_connect(VAR_9, VAR_12, VAR_8->irq + 7 + VAR_12, VAR_12 & 1);

    }



    

    VAR_10[0] = etraxfs_eth_init(&nd_table[0], env, VAR_8->irq + 25, 0x30034000);

    if (nb_nics > 1)

        VAR_10[1] = etraxfs_eth_init(&nd_table[1], env, VAR_8->irq + 26, 0x30036000);



    

    etraxfs_dmac_connect_client(VAR_9, 0, VAR_10[0]);

    etraxfs_dmac_connect_client(VAR_9, 1, VAR_10[0] + 1);

    if (VAR_10[1]) {

        etraxfs_dmac_connect_client(VAR_9, 6, VAR_10[1]);

        etraxfs_dmac_connect_client(VAR_9, 7, VAR_10[1] + 1);

    }



    

    etraxfs_timer_init(env, VAR_8->irq + 0x1b, VAR_8->nmi + 1, 0x3001e000);

    etraxfs_timer_init(env, VAR_8->irq + 0x1b, VAR_8->nmi + 1, 0x3005e000);



    for (VAR_12 = 0; VAR_12 < 4; VAR_12++) {

        if (serial_hds[VAR_12]) {

            etraxfs_ser_init(env, VAR_8->irq + 0x14 + VAR_12,

                             serial_hds[VAR_12], 0x30026000 + VAR_12 * 0x2000);

        }

    }



    if (VAR_4) {

        uint64_t entry, high;

        int VAR_13;



        



        VAR_11 = load_elf(VAR_4, -0x80000000LL,

                               &entry, NULL, &high);

        bootstrap_pc = entry;

        if (VAR_11 < 0) {

            

            VAR_11 = load_image(VAR_4, phys_ram_base + 0x4000);

            bootstrap_pc = 0x40004000;

            env->regs[9] = 0x40004000 + VAR_11;

        }

        env->regs[8] = 0x56902387; 



        if (VAR_5 && (VAR_13 = strlen(VAR_5))) {

            if (VAR_13 > 256) {

                fprintf(stderr, "Too long CRIS kernel cmdline (max 256)\n");

                exit(1);

            }

            pstrcpy_targphys(high, 256, VAR_5);

            

            env->regs[10] = 0x87109563;

            env->regs[11] = high;

        }

    }

    env->pc = bootstrap_pc;



    printf ("pc =%x\n", env->pc);

    printf ("ram size =%ld\n", VAR_0);

}

void FUNC_0 (ram_addr_t VAR_0, int VAR_1,
const char *VAR_2, DisplayState *VAR_3,
const char *VAR_4, const char *VAR_5,
const char *VAR_6, const char *VAR_7)
{ CPUState *env; struct etraxfs_pic *VAR_8; void *VAR_9; struct etraxfs_dma_client *VAR_10[2] = {NULL, NULL}; int VAR_11; int VAR_12; ram_addr_t phys_ram; ram_addr_t phys_flash; ram_addr_t phys_intmem; if (VAR_7 == NULL) { VAR_7 = "crisv32"; } env = cpu_init(VAR_7); qemu_register_reset(main_cpu_reset, env); phys_ram = qemu_ram_alloc(VAR_0); cpu_register_physical_memory(0x40000000, VAR_0, phys_ram | IO_MEM_RAM); phys_intmem = qemu_ram_alloc(INTMEM_SIZE); cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
phys_intmem | IO_MEM_RAM); phys_flash = qemu_ram_alloc(FLASH_SIZE); VAR_12 = drive_get_index(IF_PFLASH, 0, 0); pflash_cfi02_register(0x0, phys_flash,
VAR_12 != -1 ? drives_table[VAR_12].bdrv : NULL, (64 * 1024),
FLASH_SIZE >> 16,
1, 2, 0x0000, 0x0000, 0x0000, 0x0000,
0x555, 0x2aa); VAR_8 = etraxfs_pic_init(env, 0x3001c000); VAR_9 = etraxfs_dmac_init(env, 0x30000000, 10); for (VAR_12 = 0; VAR_12 < 10; VAR_12++) { etraxfs_dmac_connect(VAR_9, VAR_12, VAR_8->irq + 7 + VAR_12, VAR_12 & 1); } VAR_10[0] = etraxfs_eth_init(&nd_table[0], env, VAR_8->irq + 25, 0x30034000); if (nb_nics > 1)
VAR_10[1] = etraxfs_eth_init(&nd_table[1], env, VAR_8->irq + 26, 0x30036000); etraxfs_dmac_connect_client(VAR_9, 0, VAR_10[0]); etraxfs_dmac_connect_client(VAR_9, 1, VAR_10[0] + 1); if (VAR_10[1]) { etraxfs_dmac_connect_client(VAR_9, 6, VAR_10[1]); etraxfs_dmac_connect_client(VAR_9, 7, VAR_10[1] + 1); } etraxfs_timer_init(env, VAR_8->irq + 0x1b, VAR_8->nmi + 1, 0x3001e000); etraxfs_timer_init(env, VAR_8->irq + 0x1b, VAR_8->nmi + 1, 0x3005e000); for (VAR_12 = 0; VAR_12 < 4; VAR_12++) { if (serial_hds[VAR_12]) { etraxfs_ser_init(env, VAR_8->irq + 0x14 + VAR_12,
serial_hds[VAR_12], 0x30026000 + VAR_12 * 0x2000); } } if (VAR_4) { uint64_t entry, high; int VAR_13; VAR_11 = load_elf(VAR_4, -0x80000000LL,
&entry, NULL, &high); bootstrap_pc = entry; if (VAR_11 < 0) { VAR_11 = load_image(VAR_4, phys_ram_base + 0x4000); bootstrap_pc = 0x40004000; env->regs[9] = 0x40004000 + VAR_11; } env->regs[8] = 0x56902387; if (VAR_5 && (VAR_13 = strlen(VAR_5))) { if (VAR_13 > 256) { fprintf(stderr, "Too long CRIS kernel cmdline (max 256)\n"); exit(1); } pstrcpy_targphys(high, 256, VAR_5); env->regs[10] = 0x87109563; env->regs[11] = high; } } env->pc = bootstrap_pc; printf ("pc =%x\n", env->pc); printf ("ram size =%ld\n", VAR_0); }