static inline void omap_timer_update(struct omap_mpu_timer_s *timer)

{

    int64_t expires;



    if (timer->enable && timer->st && timer->rate) {

        timer->val = timer->reset_val;	/* Should skip this on clk enable */

        expires = timer->time + muldiv64(timer->val << (timer->ptv + 1),

                        ticks_per_sec, timer->rate);

        qemu_mod_timer(timer->timer, expires);

    } else

        qemu_del_timer(timer->timer);

}

static inline void omap_timer_update(struct omap_mpu_timer_s *timer)

{

    int64_t expires;



    if (timer->enable && timer->st && timer->rate) {

        timer->val = timer->reset_val;	

        expires = timer->time + muldiv64(timer->val << (timer->ptv + 1),

                        ticks_per_sec, timer->rate);

        qemu_mod_timer(timer->timer, expires);

    } else

        qemu_del_timer(timer->timer);

}

static inline void FUNC_0(struct omap_mpu_timer_s *VAR_0)

{

    int64_t expires;



    if (VAR_0->enable && VAR_0->st && VAR_0->rate) {

        VAR_0->val = VAR_0->reset_val;	

        expires = VAR_0->time + muldiv64(VAR_0->val << (VAR_0->ptv + 1),

                        ticks_per_sec, VAR_0->rate);

        qemu_mod_timer(VAR_0->VAR_0, expires);

    } else

        qemu_del_timer(VAR_0->VAR_0);

}

static inline void FUNC_0(struct omap_mpu_timer_s *VAR_0)
{ int64_t expires; if (VAR_0->enable && VAR_0->st && VAR_0->rate) { VAR_0->val = VAR_0->reset_val; expires = VAR_0->time + muldiv64(VAR_0->val << (VAR_0->ptv + 1),
ticks_per_sec, VAR_0->rate); qemu_mod_timer(VAR_0->VAR_0, expires); } else qemu_del_timer(VAR_0->VAR_0); }