static inline void tcg_out_rld(TCGContext *s, int op, TCGReg ra, TCGReg rs,

                               int sh, int mb)

{

    assert(TCG_TARGET_REG_BITS == 64);

    sh = SH(sh & 0x1f) | (((sh >> 5) & 1) << 1);

    mb = MB64((mb >> 5) | ((mb << 1) & 0x3f));

    tcg_out32(s, op | RA(ra) | RS(rs) | sh | mb);

}

static inline void tcg_out_rld(TCGContext *s, int op, TCGReg ra, TCGReg rs,

                               int sh, int mb)

{

    assert(TCG_TARGET_REG_BITS == 64);

    sh = SH(sh & 0x1f) | (((sh >> 5) & 1) << 1);

    mb = MB64((mb >> 5) | ((mb << 1) & 0x3f));

    tcg_out32(s, op | RA(ra) | RS(rs) | sh | mb);

}

static inline void FUNC_0(TCGContext *VAR_0, int VAR_1, TCGReg VAR_2, TCGReg VAR_3,

                               int VAR_4, int VAR_5)

{

    assert(TCG_TARGET_REG_BITS == 64);

    VAR_4 = SH(VAR_4 & 0x1f) | (((VAR_4 >> 5) & 1) << 1);

    VAR_5 = MB64((VAR_5 >> 5) | ((VAR_5 << 1) & 0x3f));

    tcg_out32(VAR_0, VAR_1 | RA(VAR_2) | RS(VAR_3) | VAR_4 | VAR_5);

}

static inline void FUNC_0(TCGContext *VAR_0, int VAR_1, TCGReg VAR_2, TCGReg VAR_3,
int VAR_4, int VAR_5)
{ assert(TCG_TARGET_REG_BITS == 64); VAR_4 = SH(VAR_4 & 0x1f) | (((VAR_4 >> 5) & 1) << 1); VAR_5 = MB64((VAR_5 >> 5) | ((VAR_5 << 1) & 0x3f)); tcg_out32(VAR_0, VAR_1 | RA(VAR_2) | RS(VAR_3) | VAR_4 | VAR_5); }