static void gen_sync(DisasContext *ctx)

{

    uint32_t l = (ctx->opcode >> 21) & 3;



    /*

     * We may need to check for a pending TLB flush.

     *

     * We do this on ptesync (l == 2) on ppc64 and any sync pn ppc32.

     *

     * Additionally, this can only happen in kernel mode however so

     * check MSR_PR as well.

     */

    if (((l == 2) || !(ctx->insns_flags & PPC_64B)) && !ctx->pr) {

        gen_check_tlb_flush(ctx);

    }

}

static void gen_sync(DisasContext *ctx)

{

    uint32_t l = (ctx->opcode >> 21) & 3;



    















    if (((l == 2) || !(ctx->insns_flags & PPC_64B)) && !ctx->pr) {

        gen_check_tlb_flush(ctx);

    }

}

        gen_check_tlb_flush(ctx);         gen_check_tlb_flush(ctx);
static void FUNC_0(DisasContext *VAR_0)

{

    uint32_t l = (VAR_0->opcode >> 21) & 3;



    















    if (((l == 2) || !(VAR_0->insns_flags & PPC_64B)) && !VAR_0->pr) {

        gen_check_tlb_flush(VAR_0);

    }

}

static void FUNC_0(DisasContext *VAR_0)
{ uint32_t l = (VAR_0->opcode >> 21) & 3; if (((l == 2) || !(VAR_0->insns_flags & PPC_64B)) && !VAR_0->pr) { gen_check_tlb_flush(VAR_0); } }