void helper_iret_protected(int shift, int next_eip)

{

    int tss_selector, type;

    uint32_t e1, e2;



    /* specific case for TSS */

    if (env->eflags & NT_MASK) {

#ifdef TARGET_X86_64

        if (env->hflags & HF_LMA_MASK)

            raise_exception_err(EXCP0D_GPF, 0);

#endif

        tss_selector = lduw_kernel(env->tr.base + 0);

        if (tss_selector & 4)

            raise_exception_err(EXCP0A_TSS, tss_selector & 0xfffc);

        if (load_segment(&e1, &e2, tss_selector) != 0)

            raise_exception_err(EXCP0A_TSS, tss_selector & 0xfffc);

        type = (e2 >> DESC_TYPE_SHIFT) & 0x17;

        /* NOTE: we check both segment and busy TSS */

        if (type != 3)

            raise_exception_err(EXCP0A_TSS, tss_selector & 0xfffc);

        switch_tss(tss_selector, e1, e2, SWITCH_TSS_IRET, next_eip);

    } else {

        helper_ret_protected(shift, 1, 0);

    }

    env->hflags2 &= ~HF2_NMI_MASK;

#ifdef CONFIG_KQEMU

    if (kqemu_is_ok(env)) {

        CC_OP = CC_OP_EFLAGS;

        env->exception_index = -1;

        cpu_loop_exit();

    }

#endif

}

void helper_iret_protected(int shift, int next_eip)

{

    int tss_selector, type;

    uint32_t e1, e2;



    

    if (env->eflags & NT_MASK) {

#ifdef TARGET_X86_64

        if (env->hflags & HF_LMA_MASK)

            raise_exception_err(EXCP0D_GPF, 0);

#endif

        tss_selector = lduw_kernel(env->tr.base + 0);

        if (tss_selector & 4)

            raise_exception_err(EXCP0A_TSS, tss_selector & 0xfffc);

        if (load_segment(&e1, &e2, tss_selector) != 0)

            raise_exception_err(EXCP0A_TSS, tss_selector & 0xfffc);

        type = (e2 >> DESC_TYPE_SHIFT) & 0x17;

        

        if (type != 3)

            raise_exception_err(EXCP0A_TSS, tss_selector & 0xfffc);

        switch_tss(tss_selector, e1, e2, SWITCH_TSS_IRET, next_eip);

    } else {

        helper_ret_protected(shift, 1, 0);

    }

    env->hflags2 &= ~HF2_NMI_MASK;

#ifdef CONFIG_KQEMU

    if (kqemu_is_ok(env)) {

        CC_OP = CC_OP_EFLAGS;

        env->exception_index = -1;

        cpu_loop_exit();

    }

#endif

}

void FUNC_0(int VAR_0, int VAR_1)

{

    int VAR_2, VAR_3;

    uint32_t e1, e2;



    

    if (env->eflags & NT_MASK) {

#ifdef TARGET_X86_64

        if (env->hflags & HF_LMA_MASK)

            raise_exception_err(EXCP0D_GPF, 0);

#endif

        VAR_2 = lduw_kernel(env->tr.base + 0);

        if (VAR_2 & 4)

            raise_exception_err(EXCP0A_TSS, VAR_2 & 0xfffc);

        if (load_segment(&e1, &e2, VAR_2) != 0)

            raise_exception_err(EXCP0A_TSS, VAR_2 & 0xfffc);

        VAR_3 = (e2 >> DESC_TYPE_SHIFT) & 0x17;

        

        if (VAR_3 != 3)

            raise_exception_err(EXCP0A_TSS, VAR_2 & 0xfffc);

        switch_tss(VAR_2, e1, e2, SWITCH_TSS_IRET, VAR_1);

    } else {

        helper_ret_protected(VAR_0, 1, 0);

    }

    env->hflags2 &= ~HF2_NMI_MASK;

#ifdef CONFIG_KQEMU

    if (kqemu_is_ok(env)) {

        CC_OP = CC_OP_EFLAGS;

        env->exception_index = -1;

        cpu_loop_exit();

    }

#endif

}

void FUNC_0(int VAR_0, int VAR_1)
{ int VAR_2, VAR_3; uint32_t e1, e2; if (env->eflags & NT_MASK) { #ifdef TARGET_X86_64
if (env->hflags & HF_LMA_MASK)
raise_exception_err(EXCP0D_GPF, 0); #endif
VAR_2 = lduw_kernel(env->tr.base + 0); if (VAR_2 & 4)
raise_exception_err(EXCP0A_TSS, VAR_2 & 0xfffc); if (load_segment(&e1, &e2, VAR_2) != 0)
raise_exception_err(EXCP0A_TSS, VAR_2 & 0xfffc); VAR_3 = (e2 >> DESC_TYPE_SHIFT) & 0x17; if (VAR_3 != 3)
raise_exception_err(EXCP0A_TSS, VAR_2 & 0xfffc); switch_tss(VAR_2, e1, e2, SWITCH_TSS_IRET, VAR_1); } else { helper_ret_protected(VAR_0, 1, 0); } env->hflags2 &= ~HF2_NMI_MASK; #ifdef CONFIG_KQEMU
if (kqemu_is_ok(env)) { CC_OP = CC_OP_EFLAGS; env->exception_index = -1; cpu_loop_exit(); } #endif
}