void msix_write_config(PCIDevice *dev, uint32_t addr,

                       uint32_t val, int len)

{

    unsigned enable_pos = dev->msix_cap + MSIX_CONTROL_OFFSET;

    int vector;

    bool was_masked;



    if (!range_covers_byte(addr, len, enable_pos)) {

        return;

    }



    was_masked = dev->msix_function_masked;

    msix_update_function_masked(dev);



    if (!msix_enabled(dev)) {

        return;

    }



    pci_device_deassert_intx(dev);



    if (dev->msix_function_masked == was_masked) {

        return;

    }



    for (vector = 0; vector < dev->msix_entries_nr; ++vector) {

        msix_handle_mask_update(dev, vector);

    }

}

void msix_write_config(PCIDevice *dev, uint32_t addr,

                       uint32_t val, int len)

{

    unsigned enable_pos = dev->msix_cap + MSIX_CONTROL_OFFSET;

    int vector;

    bool was_masked;



    if (!range_covers_byte(addr, len, enable_pos)) {

        return;

    }



    was_masked = dev->msix_function_masked;

    msix_update_function_masked(dev);



    if (!msix_enabled(dev)) {

        return;

    }



    pci_device_deassert_intx(dev);



    if (dev->msix_function_masked == was_masked) {

        return;

    }



    for (vector = 0; vector < dev->msix_entries_nr; ++vector) {

        msix_handle_mask_update(dev, vector);

    }

}

        msix_handle_mask_update(dev, vector);
void FUNC_0(PCIDevice *VAR_0, uint32_t VAR_1,

                       uint32_t VAR_2, int VAR_3)

{

    unsigned VAR_4 = VAR_0->msix_cap + MSIX_CONTROL_OFFSET;

    int VAR_5;

    bool was_masked;



    if (!range_covers_byte(VAR_1, VAR_3, VAR_4)) {

        return;

    }



    was_masked = VAR_0->msix_function_masked;

    msix_update_function_masked(VAR_0);



    if (!msix_enabled(VAR_0)) {

        return;

    }



    pci_device_deassert_intx(VAR_0);



    if (VAR_0->msix_function_masked == was_masked) {

        return;

    }



    for (VAR_5 = 0; VAR_5 < VAR_0->msix_entries_nr; ++VAR_5) {

        msix_handle_mask_update(VAR_0, VAR_5);

    }

}

void FUNC_0(PCIDevice *VAR_0, uint32_t VAR_1,
uint32_t VAR_2, int VAR_3)
{ unsigned VAR_4 = VAR_0->msix_cap + MSIX_CONTROL_OFFSET; int VAR_5; bool was_masked; if (!range_covers_byte(VAR_1, VAR_3, VAR_4)) { return; } was_masked = VAR_0->msix_function_masked; msix_update_function_masked(VAR_0); if (!msix_enabled(VAR_0)) { return; } pci_device_deassert_intx(VAR_0); if (VAR_0->msix_function_masked == was_masked) { return; } for (VAR_5 = 0; VAR_5 < VAR_0->msix_entries_nr; ++VAR_5) { msix_handle_mask_update(VAR_0, VAR_5); } }