void cpu_alpha_store_fpcr (CPUState *env, uint64_t val)

{

    int round_mode, mask;



    set_float_exception_flags((val >> 52) & 0x3F, &env->fp_status);



    mask = 0;

    if (val & FPCR_INVD)

        mask |= float_flag_invalid;

    if (val & FPCR_DZED)

        mask |= float_flag_divbyzero;

    if (val & FPCR_OVFD)

        mask |= float_flag_overflow;

    if (val & FPCR_UNFD)

        mask |= float_flag_underflow;

    if (val & FPCR_INED)

        mask |= float_flag_inexact;

    env->fp_status.float_exception_mask = mask;



    switch ((val >> FPCR_DYN_SHIFT) & 3) {

    case 0:

        round_mode = float_round_to_zero;

        break;

    case 1:

        round_mode = float_round_down;

        break;

    case 2:

        round_mode = float_round_nearest_even;

        break;

    case 3:


        round_mode = float_round_up;

        break;

    }

    set_float_rounding_mode(round_mode, &env->fp_status);

}
void cpu_alpha_store_fpcr (CPUState *env, uint64_t val)

{

    int round_mode, mask;



    set_float_exception_flags((val >> 52) & 0x3F, &env->fp_status);



    mask = 0;

    if (val & FPCR_INVD)

        mask |= float_flag_invalid;

    if (val & FPCR_DZED)

        mask |= float_flag_divbyzero;

    if (val & FPCR_OVFD)

        mask |= float_flag_overflow;

    if (val & FPCR_UNFD)

        mask |= float_flag_underflow;

    if (val & FPCR_INED)

        mask |= float_flag_inexact;

    env->fp_status.float_exception_mask = mask;



    switch ((val >> FPCR_DYN_SHIFT) & 3) {

    case 0:

        round_mode = float_round_to_zero;

        break;

    case 1:

        round_mode = float_round_down;

        break;

    case 2:

        round_mode = float_round_nearest_even;

        break;

    case 3:


        round_mode = float_round_up;

        break;

    }

    set_float_rounding_mode(round_mode, &env->fp_status);

}
void FUNC_0 (CPUState *VAR_0, uint64_t VAR_1)

{

    int VAR_2, VAR_3;



    set_float_exception_flags((VAR_1 >> 52) & 0x3F, &VAR_0->fp_status);



    VAR_3 = 0;

    if (VAR_1 & FPCR_INVD)

        VAR_3 |= float_flag_invalid;

    if (VAR_1 & FPCR_DZED)

        VAR_3 |= float_flag_divbyzero;

    if (VAR_1 & FPCR_OVFD)

        VAR_3 |= float_flag_overflow;

    if (VAR_1 & FPCR_UNFD)

        VAR_3 |= float_flag_underflow;

    if (VAR_1 & FPCR_INED)

        VAR_3 |= float_flag_inexact;

    VAR_0->fp_status.float_exception_mask = VAR_3;



    switch ((VAR_1 >> FPCR_DYN_SHIFT) & 3) {

    case 0:

        VAR_2 = float_round_to_zero;

        break;

    case 1:

        VAR_2 = float_round_down;

        break;

    case 2:

        VAR_2 = float_round_nearest_even;

        break;

    case 3:


        VAR_2 = float_round_up;

        break;

    }

    set_float_rounding_mode(VAR_2, &VAR_0->fp_status);

}
void FUNC_0 (CPUState *VAR_0, uint64_t VAR_1)
{ int VAR_2, VAR_3; set_float_exception_flags((VAR_1 >> 52) & 0x3F, &VAR_0->fp_status); VAR_3 = 0; if (VAR_1 & FPCR_INVD)
VAR_3 |= float_flag_invalid; if (VAR_1 & FPCR_DZED)
VAR_3 |= float_flag_divbyzero; if (VAR_1 & FPCR_OVFD)
VAR_3 |= float_flag_overflow; if (VAR_1 & FPCR_UNFD)
VAR_3 |= float_flag_underflow; if (VAR_1 & FPCR_INED)
VAR_3 |= float_flag_inexact; VAR_0->fp_status.float_exception_mask = VAR_3; switch ((VAR_1 >> FPCR_DYN_SHIFT) & 3) { case 0:
VAR_2 = float_round_to_zero; break; case 1:
VAR_2 = float_round_down; break; case 2:
VAR_2 = float_round_nearest_even; break; case 3:
VAR_2 = float_round_up; break; } set_float_rounding_mode(VAR_2, &VAR_0->fp_status); }