static inline int tcg_gen_code_common(TCGContext *s,

                                      tcg_insn_unit *gen_code_buf,

                                      long search_pc)

{

    int oi, oi_next;



#ifdef DEBUG_DISAS

    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {

        qemu_log("OP:\n");

        tcg_dump_ops(s);

        qemu_log("\n");

    }

#endif



#ifdef CONFIG_PROFILER

    s->opt_time -= profile_getclock();

#endif



#ifdef USE_TCG_OPTIMIZATIONS

    tcg_optimize(s);

#endif



#ifdef CONFIG_PROFILER

    s->opt_time += profile_getclock();

    s->la_time -= profile_getclock();

#endif



    tcg_liveness_analysis(s);



#ifdef CONFIG_PROFILER

    s->la_time += profile_getclock();

#endif



#ifdef DEBUG_DISAS

    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {

        qemu_log("OP after optimization and liveness analysis:\n");

        tcg_dump_ops(s);

        qemu_log("\n");

    }

#endif



    tcg_reg_alloc_start(s);



    s->code_buf = gen_code_buf;

    s->code_ptr = gen_code_buf;



    tcg_out_tb_init(s);



    for (oi = s->gen_first_op_idx; oi >= 0; oi = oi_next) {

        TCGOp * const op = &s->gen_op_buf[oi];

        TCGArg * const args = &s->gen_opparam_buf[op->args];

        TCGOpcode opc = op->opc;

        const TCGOpDef *def = &tcg_op_defs[opc];

        uint16_t dead_args = s->op_dead_args[oi];

        uint8_t sync_args = s->op_sync_args[oi];



        oi_next = op->next;

#ifdef CONFIG_PROFILER

        tcg_table_op_count[opc]++;

#endif



        switch (opc) {

        case INDEX_op_mov_i32:

        case INDEX_op_mov_i64:

            tcg_reg_alloc_mov(s, def, args, dead_args, sync_args);

            break;

        case INDEX_op_movi_i32:

        case INDEX_op_movi_i64:

            tcg_reg_alloc_movi(s, args, dead_args, sync_args);

            break;

        case INDEX_op_debug_insn_start:

            break;

        case INDEX_op_discard:

            temp_dead(s, args[0]);

            break;

        case INDEX_op_set_label:

            tcg_reg_alloc_bb_end(s, s->reserved_regs);

            tcg_out_label(s, args[0], s->code_ptr);

            break;

        case INDEX_op_call:

            tcg_reg_alloc_call(s, op->callo, op->calli, args,

                               dead_args, sync_args);

            break;

        default:

            /* Sanity check that we've not introduced any unhandled opcodes. */

            if (def->flags & TCG_OPF_NOT_PRESENT) {

                tcg_abort();

            }

            /* Note: in order to speed up the code, it would be much

               faster to have specialized register allocator functions for

               some common argument patterns */

            tcg_reg_alloc_op(s, def, opc, args, dead_args, sync_args);

            break;

        }

        if (search_pc >= 0 && search_pc < tcg_current_code_size(s)) {

            return oi;

        }

#ifndef NDEBUG

        check_regs(s);

#endif

    }



    /* Generate TB finalization at the end of block */

    tcg_out_tb_finalize(s);

    return -1;

}

static inline int tcg_gen_code_common(TCGContext *s,

                                      tcg_insn_unit *gen_code_buf,

                                      long search_pc)

{

    int oi, oi_next;



#ifdef DEBUG_DISAS

    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {

        qemu_log("OP:\n");

        tcg_dump_ops(s);

        qemu_log("\n");

    }

#endif



#ifdef CONFIG_PROFILER

    s->opt_time -= profile_getclock();

#endif



#ifdef USE_TCG_OPTIMIZATIONS

    tcg_optimize(s);

#endif



#ifdef CONFIG_PROFILER

    s->opt_time += profile_getclock();

    s->la_time -= profile_getclock();

#endif



    tcg_liveness_analysis(s);



#ifdef CONFIG_PROFILER

    s->la_time += profile_getclock();

#endif



#ifdef DEBUG_DISAS

    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {

        qemu_log("OP after optimization and liveness analysis:\n");

        tcg_dump_ops(s);

        qemu_log("\n");

    }

#endif



    tcg_reg_alloc_start(s);



    s->code_buf = gen_code_buf;

    s->code_ptr = gen_code_buf;



    tcg_out_tb_init(s);



    for (oi = s->gen_first_op_idx; oi >= 0; oi = oi_next) {

        TCGOp * const op = &s->gen_op_buf[oi];

        TCGArg * const args = &s->gen_opparam_buf[op->args];

        TCGOpcode opc = op->opc;

        const TCGOpDef *def = &tcg_op_defs[opc];

        uint16_t dead_args = s->op_dead_args[oi];

        uint8_t sync_args = s->op_sync_args[oi];



        oi_next = op->next;

#ifdef CONFIG_PROFILER

        tcg_table_op_count[opc]++;

#endif



        switch (opc) {

        case INDEX_op_mov_i32:

        case INDEX_op_mov_i64:

            tcg_reg_alloc_mov(s, def, args, dead_args, sync_args);

            break;

        case INDEX_op_movi_i32:

        case INDEX_op_movi_i64:

            tcg_reg_alloc_movi(s, args, dead_args, sync_args);

            break;

        case INDEX_op_debug_insn_start:

            break;

        case INDEX_op_discard:

            temp_dead(s, args[0]);

            break;

        case INDEX_op_set_label:

            tcg_reg_alloc_bb_end(s, s->reserved_regs);

            tcg_out_label(s, args[0], s->code_ptr);

            break;

        case INDEX_op_call:

            tcg_reg_alloc_call(s, op->callo, op->calli, args,

                               dead_args, sync_args);

            break;

        default:

            

            if (def->flags & TCG_OPF_NOT_PRESENT) {

                tcg_abort();

            }

            





            tcg_reg_alloc_op(s, def, opc, args, dead_args, sync_args);

            break;

        }

        if (search_pc >= 0 && search_pc < tcg_current_code_size(s)) {

            return oi;

        }

#ifndef NDEBUG

        check_regs(s);

#endif

    }



    

    tcg_out_tb_finalize(s);

    return -1;

}

static inline int FUNC_0(TCGContext *VAR_0,

                                      tcg_insn_unit *VAR_1,

                                      long VAR_2)

{

    int VAR_3, VAR_4;



#ifdef DEBUG_DISAS

    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {

        qemu_log("OP:\n");

        tcg_dump_ops(VAR_0);

        qemu_log("\n");

    }

#endif



#ifdef CONFIG_PROFILER

    VAR_0->opt_time -= profile_getclock();

#endif



#ifdef USE_TCG_OPTIMIZATIONS

    tcg_optimize(VAR_0);

#endif



#ifdef CONFIG_PROFILER

    VAR_0->opt_time += profile_getclock();

    VAR_0->la_time -= profile_getclock();

#endif



    tcg_liveness_analysis(VAR_0);



#ifdef CONFIG_PROFILER

    VAR_0->la_time += profile_getclock();

#endif



#ifdef DEBUG_DISAS

    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {

        qemu_log("OP after optimization and liveness analysis:\n");

        tcg_dump_ops(VAR_0);

        qemu_log("\n");

    }

#endif



    tcg_reg_alloc_start(VAR_0);



    VAR_0->code_buf = VAR_1;

    VAR_0->code_ptr = VAR_1;



    tcg_out_tb_init(VAR_0);



    for (VAR_3 = VAR_0->gen_first_op_idx; VAR_3 >= 0; VAR_3 = VAR_4) {

        TCGOp * const op = &VAR_0->gen_op_buf[VAR_3];

        TCGArg * const args = &VAR_0->gen_opparam_buf[op->args];

        TCGOpcode opc = op->opc;

        const TCGOpDef *VAR_5 = &tcg_op_defs[opc];

        uint16_t dead_args = VAR_0->op_dead_args[VAR_3];

        uint8_t sync_args = VAR_0->op_sync_args[VAR_3];



        VAR_4 = op->next;

#ifdef CONFIG_PROFILER

        tcg_table_op_count[opc]++;

#endif



        switch (opc) {

        case INDEX_op_mov_i32:

        case INDEX_op_mov_i64:

            tcg_reg_alloc_mov(VAR_0, VAR_5, args, dead_args, sync_args);

            break;

        case INDEX_op_movi_i32:

        case INDEX_op_movi_i64:

            tcg_reg_alloc_movi(VAR_0, args, dead_args, sync_args);

            break;

        case INDEX_op_debug_insn_start:

            break;

        case INDEX_op_discard:

            temp_dead(VAR_0, args[0]);

            break;

        case INDEX_op_set_label:

            tcg_reg_alloc_bb_end(VAR_0, VAR_0->reserved_regs);

            tcg_out_label(VAR_0, args[0], VAR_0->code_ptr);

            break;

        case INDEX_op_call:

            tcg_reg_alloc_call(VAR_0, op->callo, op->calli, args,

                               dead_args, sync_args);

            break;

        default:

            

            if (VAR_5->flags & TCG_OPF_NOT_PRESENT) {

                tcg_abort();

            }

            





            tcg_reg_alloc_op(VAR_0, VAR_5, opc, args, dead_args, sync_args);

            break;

        }

        if (VAR_2 >= 0 && VAR_2 < tcg_current_code_size(VAR_0)) {

            return VAR_3;

        }

#ifndef NDEBUG

        check_regs(VAR_0);

#endif

    }



    

    tcg_out_tb_finalize(VAR_0);

    return -1;

}

static inline int FUNC_0(TCGContext *VAR_0,
tcg_insn_unit *VAR_1,
long VAR_2)
{ int VAR_3, VAR_4; #ifdef DEBUG_DISAS
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { qemu_log("OP:\n"); tcg_dump_ops(VAR_0); qemu_log("\n"); } #endif
#ifdef CONFIG_PROFILER
VAR_0->opt_time -= profile_getclock(); #endif
#ifdef USE_TCG_OPTIMIZATIONS
tcg_optimize(VAR_0); #endif
#ifdef CONFIG_PROFILER
VAR_0->opt_time += profile_getclock(); VAR_0->la_time -= profile_getclock(); #endif
tcg_liveness_analysis(VAR_0); #ifdef CONFIG_PROFILER
VAR_0->la_time += profile_getclock(); #endif
#ifdef DEBUG_DISAS
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { qemu_log("OP after optimization and liveness analysis:\n"); tcg_dump_ops(VAR_0); qemu_log("\n"); } #endif
tcg_reg_alloc_start(VAR_0); VAR_0->code_buf = VAR_1; VAR_0->code_ptr = VAR_1; tcg_out_tb_init(VAR_0); for (VAR_3 = VAR_0->gen_first_op_idx; VAR_3 >= 0; VAR_3 = VAR_4) { TCGOp * const op = &VAR_0->gen_op_buf[VAR_3]; TCGArg * const args = &VAR_0->gen_opparam_buf[op->args]; TCGOpcode opc = op->opc; const TCGOpDef *VAR_5 = &tcg_op_defs[opc]; uint16_t dead_args = VAR_0->op_dead_args[VAR_3]; uint8_t sync_args = VAR_0->op_sync_args[VAR_3]; VAR_4 = op->next; #ifdef CONFIG_PROFILER
tcg_table_op_count[opc]++; #endif
switch (opc) { case INDEX_op_mov_i32:
case INDEX_op_mov_i64:
tcg_reg_alloc_mov(VAR_0, VAR_5, args, dead_args, sync_args); break; case INDEX_op_movi_i32:
case INDEX_op_movi_i64:
tcg_reg_alloc_movi(VAR_0, args, dead_args, sync_args); break; case INDEX_op_debug_insn_start:
break; case INDEX_op_discard:
temp_dead(VAR_0, args[0]); break; case INDEX_op_set_label:
tcg_reg_alloc_bb_end(VAR_0, VAR_0->reserved_regs); tcg_out_label(VAR_0, args[0], VAR_0->code_ptr); break; case INDEX_op_call:
tcg_reg_alloc_call(VAR_0, op->callo, op->calli, args,
dead_args, sync_args); break; default:
if (VAR_5->flags & TCG_OPF_NOT_PRESENT) { tcg_abort(); } tcg_reg_alloc_op(VAR_0, VAR_5, opc, args, dead_args, sync_args); break; } if (VAR_2 >= 0 && VAR_2 < tcg_current_code_size(VAR_0)) { return VAR_3; } #ifndef NDEBUG
check_regs(VAR_0); #endif
} tcg_out_tb_finalize(VAR_0); return -1; }