static void gic_set_irq(void *opaque, int irq, int level)

{

    gic_state *s = (gic_state *)opaque;

    /* The first external input line is internal interrupt 32.  */

    irq += GIC_INTERNAL;

    if (level == GIC_TEST_LEVEL(irq, ALL_CPU_MASK))

        return;



    if (level) {

        GIC_SET_LEVEL(irq, ALL_CPU_MASK);

        if (GIC_TEST_TRIGGER(irq) || GIC_TEST_ENABLED(irq, ALL_CPU_MASK)) {

            DPRINTF("Set %d pending mask %x\n", irq, GIC_TARGET(irq));

            GIC_SET_PENDING(irq, GIC_TARGET(irq));

        }

    } else {

        GIC_CLEAR_LEVEL(irq, ALL_CPU_MASK);

    }

    gic_update(s);

}

static void gic_set_irq(void *opaque, int irq, int level)

{

    gic_state *s = (gic_state *)opaque;

    

    irq += GIC_INTERNAL;

    if (level == GIC_TEST_LEVEL(irq, ALL_CPU_MASK))

        return;



    if (level) {

        GIC_SET_LEVEL(irq, ALL_CPU_MASK);

        if (GIC_TEST_TRIGGER(irq) || GIC_TEST_ENABLED(irq, ALL_CPU_MASK)) {

            DPRINTF("Set %d pending mask %x\n", irq, GIC_TARGET(irq));

            GIC_SET_PENDING(irq, GIC_TARGET(irq));

        }

    } else {

        GIC_CLEAR_LEVEL(irq, ALL_CPU_MASK);

    }

    gic_update(s);

}

static void FUNC_0(void *VAR_0, int VAR_1, int VAR_2)

{

    gic_state *s = (gic_state *)VAR_0;

    

    VAR_1 += GIC_INTERNAL;

    if (VAR_2 == GIC_TEST_LEVEL(VAR_1, ALL_CPU_MASK))

        return;



    if (VAR_2) {

        GIC_SET_LEVEL(VAR_1, ALL_CPU_MASK);

        if (GIC_TEST_TRIGGER(VAR_1) || GIC_TEST_ENABLED(VAR_1, ALL_CPU_MASK)) {

            DPRINTF("Set %d pending mask %x\n", VAR_1, GIC_TARGET(VAR_1));

            GIC_SET_PENDING(VAR_1, GIC_TARGET(VAR_1));

        }

    } else {

        GIC_CLEAR_LEVEL(VAR_1, ALL_CPU_MASK);

    }

    gic_update(s);

}

static void FUNC_0(void *VAR_0, int VAR_1, int VAR_2)
{ gic_state *s = (gic_state *)VAR_0; VAR_1 += GIC_INTERNAL; if (VAR_2 == GIC_TEST_LEVEL(VAR_1, ALL_CPU_MASK))
return; if (VAR_2) { GIC_SET_LEVEL(VAR_1, ALL_CPU_MASK); if (GIC_TEST_TRIGGER(VAR_1) || GIC_TEST_ENABLED(VAR_1, ALL_CPU_MASK)) { DPRINTF("Set %d pending mask %x\n", VAR_1, GIC_TARGET(VAR_1)); GIC_SET_PENDING(VAR_1, GIC_TARGET(VAR_1)); } } else { GIC_CLEAR_LEVEL(VAR_1, ALL_CPU_MASK); } gic_update(s); }