void *qxl_phys2virt(PCIQXLDevice *qxl, QXLPHYSICAL pqxl, int group_id)

{

    uint64_t phys   = le64_to_cpu(pqxl);

    uint32_t slot   = (phys >> (64 -  8)) & 0xff;

    uint64_t offset = phys & 0xffffffffffff;



    switch (group_id) {

    case MEMSLOT_GROUP_HOST:

        return (void *)(intptr_t)offset;

    case MEMSLOT_GROUP_GUEST:

        PANIC_ON(slot >= NUM_MEMSLOTS);

        PANIC_ON(!qxl->guest_slots[slot].active);

        PANIC_ON(offset < qxl->guest_slots[slot].delta);

        offset -= qxl->guest_slots[slot].delta;

        PANIC_ON(offset > qxl->guest_slots[slot].size)

        return qxl->guest_slots[slot].ptr + offset;

    default:

        PANIC_ON(1);

    }

}

void *qxl_phys2virt(PCIQXLDevice *qxl, QXLPHYSICAL pqxl, int group_id)

{

    uint64_t phys   = le64_to_cpu(pqxl);

    uint32_t slot   = (phys >> (64 -  8)) & 0xff;

    uint64_t offset = phys & 0xffffffffffff;



    switch (group_id) {

    case MEMSLOT_GROUP_HOST:

        return (void *)(intptr_t)offset;

    case MEMSLOT_GROUP_GUEST:

        PANIC_ON(slot >= NUM_MEMSLOTS);

        PANIC_ON(!qxl->guest_slots[slot].active);

        PANIC_ON(offset < qxl->guest_slots[slot].delta);

        offset -= qxl->guest_slots[slot].delta;

        PANIC_ON(offset > qxl->guest_slots[slot].size)

        return qxl->guest_slots[slot].ptr + offset;

    default:

        PANIC_ON(1);

    }

}

        PANIC_ON(slot >= NUM_MEMSLOTS);         PANIC_ON(!qxl->guest_slots[slot].active);         PANIC_ON(offset < qxl->guest_slots[slot].delta);         PANIC_ON(offset > qxl->guest_slots[slot].size)     default:         PANIC_ON(1);
void *FUNC_0(PCIQXLDevice *VAR_0, QXLPHYSICAL VAR_1, int VAR_2)

{

    uint64_t phys   = le64_to_cpu(VAR_1);

    uint32_t slot   = (phys >> (64 -  8)) & 0xff;

    uint64_t offset = phys & 0xffffffffffff;



    switch (VAR_2) {

    case MEMSLOT_GROUP_HOST:

        return (void *)(intptr_t)offset;

    case MEMSLOT_GROUP_GUEST:

        PANIC_ON(slot >= NUM_MEMSLOTS);

        PANIC_ON(!VAR_0->guest_slots[slot].active);

        PANIC_ON(offset < VAR_0->guest_slots[slot].delta);

        offset -= VAR_0->guest_slots[slot].delta;

        PANIC_ON(offset > VAR_0->guest_slots[slot].size)

        return VAR_0->guest_slots[slot].ptr + offset;

    default:

        PANIC_ON(1);

    }

}

void *FUNC_0(PCIQXLDevice *VAR_0, QXLPHYSICAL VAR_1, int VAR_2)
{ uint64_t phys   = le64_to_cpu(VAR_1); uint32_t slot   = (phys >> (64 -  8)) & 0xff; uint64_t offset = phys & 0xffffffffffff; switch (VAR_2) { case MEMSLOT_GROUP_HOST:
return (void *)(intptr_t)offset; case MEMSLOT_GROUP_GUEST:
PANIC_ON(slot >= NUM_MEMSLOTS); PANIC_ON(!VAR_0->guest_slots[slot].active); PANIC_ON(offset < VAR_0->guest_slots[slot].delta); offset -= VAR_0->guest_slots[slot].delta; PANIC_ON(offset > VAR_0->guest_slots[slot].size)
return VAR_0->guest_slots[slot].ptr + offset; default:
PANIC_ON(1); } }