static void fdctrl_raise_irq(FDCtrl *fdctrl, uint8_t status0)

{

    /* Sparc mutation */

    if (fdctrl->sun4m && (fdctrl->msr & FD_MSR_CMDBUSY)) {

        /* XXX: not sure */

        fdctrl->msr &= ~FD_MSR_CMDBUSY;

        fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;

        fdctrl->status0 = status0;

        return;

    }

    if (!(fdctrl->sra & FD_SRA_INTPEND)) {

        qemu_set_irq(fdctrl->irq, 1);

        fdctrl->sra |= FD_SRA_INTPEND;

    }

    if (status0 & FD_SR0_SEEK) {

        FDrive *cur_drv;

        /* A seek clears the disk change line (if a disk is inserted) */

        cur_drv = get_cur_drv(fdctrl);

        if (cur_drv->max_track) {

            cur_drv->media_changed = 0;

        }

    }



    fdctrl->reset_sensei = 0;

    fdctrl->status0 = status0;

    FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);

}

static void fdctrl_raise_irq(FDCtrl *fdctrl, uint8_t status0)

{

    

    if (fdctrl->sun4m && (fdctrl->msr & FD_MSR_CMDBUSY)) {

        

        fdctrl->msr &= ~FD_MSR_CMDBUSY;

        fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;

        fdctrl->status0 = status0;

        return;

    }

    if (!(fdctrl->sra & FD_SRA_INTPEND)) {

        qemu_set_irq(fdctrl->irq, 1);

        fdctrl->sra |= FD_SRA_INTPEND;

    }

    if (status0 & FD_SR0_SEEK) {

        FDrive *cur_drv;

        

        cur_drv = get_cur_drv(fdctrl);

        if (cur_drv->max_track) {

            cur_drv->media_changed = 0;

        }

    }



    fdctrl->reset_sensei = 0;

    fdctrl->status0 = status0;

    FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);

}

        if (cur_drv->max_track) {
static void FUNC_0(FDCtrl *VAR_0, uint8_t VAR_1)

{

    

    if (VAR_0->sun4m && (VAR_0->msr & FD_MSR_CMDBUSY)) {

        

        VAR_0->msr &= ~FD_MSR_CMDBUSY;

        VAR_0->msr |= FD_MSR_RQM | FD_MSR_DIO;

        VAR_0->VAR_1 = VAR_1;

        return;

    }

    if (!(VAR_0->sra & FD_SRA_INTPEND)) {

        qemu_set_irq(VAR_0->irq, 1);

        VAR_0->sra |= FD_SRA_INTPEND;

    }

    if (VAR_1 & FD_SR0_SEEK) {

        FDrive *cur_drv;

        

        cur_drv = get_cur_drv(VAR_0);

        if (cur_drv->max_track) {

            cur_drv->media_changed = 0;

        }

    }



    VAR_0->reset_sensei = 0;

    VAR_0->VAR_1 = VAR_1;

    FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", VAR_0->VAR_1);

}

static void FUNC_0(FDCtrl *VAR_0, uint8_t VAR_1)
{ if (VAR_0->sun4m && (VAR_0->msr & FD_MSR_CMDBUSY)) { VAR_0->msr &= ~FD_MSR_CMDBUSY; VAR_0->msr |= FD_MSR_RQM | FD_MSR_DIO; VAR_0->VAR_1 = VAR_1; return; } if (!(VAR_0->sra & FD_SRA_INTPEND)) { qemu_set_irq(VAR_0->irq, 1); VAR_0->sra |= FD_SRA_INTPEND; } if (VAR_1 & FD_SR0_SEEK) { FDrive *cur_drv; cur_drv = get_cur_drv(VAR_0); if (cur_drv->max_track) { cur_drv->media_changed = 0; } } VAR_0->reset_sensei = 0; VAR_0->VAR_1 = VAR_1; FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", VAR_0->VAR_1); }