Question: A real-time method for suppressing impulse noise in images using an efficient weighted-average filter.

This letter introduces an innovative approach for the effective removal of salt-and-pepper noise from images affected by impulse noise. Our methodology involves the utilization of a sophisticated impulse noise detector to accurately identify noisy pixels, followed by the application of an edge-preserving filter to restore the intensity values of these pixels. A series of comprehensive experiments confirms that our technique outperforms contemporary impulse denoising methods in both subjective and objective assessments. Notably, the proposed method excels in preserving edges while efficiently eliminating impulse noise. Given its simplicity and efficiency, this algorithm is ideally suited for deployment in various real-time applications, where speed and accuracy are paramount.

X iv :1 31 1. 25 61 v2 [ cs .C V ] 1 2 N ov 2 01 3 Performing edge detection by difference of Gaussians using q-Gaussian kernels Lucas Assirati, Núbia R. da Silva, 2 Lilian Berton, Alneu de A. Lopes, and Odemir M. Bruno 2 Scientific Computing Group, São Carlos Institute of Physics, University of São Paulo (USP), cx 369 13560-970 São Carlos, São Paulo, Brazil www.scg.ifsc.usp.br Institute of Mathematics and Computer Science, University of São Paulo (USP), Avenida Trabalhador são-carlense, 40

In order to simultaneously sharpen image details and attenuate noise, we propose to combine the recent blockmatching and 3D Þltering (BM3D) denoising approach, based on 3D transform-domain collaborative Þltering, with alpha-rooting, a transform-domain sharpening technique. The BM3D exploits grouping of similar image blocks into 3D arrays (groups) on which collaborative Þltering (by hard-thresholding) is applied. We propose two approaches of sharpening by alpha-rooting; the Þrst applies alpharooting individually on the 2D transform spectra of each grouped block; the second applies alpha-rooting on the 3D-transform spectra of each 3D array in order to sharpen Þne image details shared by all grouped blocks and further enhance the interblock differences. The conducted experiments with the proposed method show that it can preserve and sharpen Þne image details and effectively attenuate noise.

In this paper, a novel algorithm for single image super resolution is proposed. Back-projection [1] can minimize the reconstruction error with an efficient iterative procedure. Although it can produce visually appealing result, this method suffers from the chessboard effect and ringing effect, especially along strong edges. The underlining reason is that there is no edge guidance in the error correction process. Bilateral filtering can achieve edge-preserving image smoothing by adding the extra information from the feature domain. The basic idea is to do the smoothing on the pixels which are nearby both in space domain and in feature domain. The proposed bilateral back-projection algorithm strives to integrate the bilateral filtering into the back-projection method. In our approach, the back-projection process can be guided by the edge information to avoid across-edge smoothing, thus the chessboard effect and ringing effect along image edges are removed. Promising results can be obtained by the proposed bilateral back-projection method efficiently.

We present in this paper a new method for contrast enhancement based on the curvelet transform. The curvelet transform represents edges better than wavelets, and is therefore well-suited for multiscale edge enhancement. We compare this approach with enhancement based on the wavelet transform, and the Multiscale Retinex. In a range of examples, we use edge detection and segmentation, among other processing applications, to provide for quantitative comparative evaluation. Our findings are that curvelet based enhancement out-performs other enhancement methods on noisy images, but on noiseless or near noiseless images curvelet based enhancement is not remarkably better than wavelet based enhancement.

High dynamic range (HDR) images play an important role in todays computer graphics: Typical applications are the improved display of a photograph with a tone mapper and the relighting of a virtual object in a natural environment using an HDR environment map. Generating an HDR image usually requires a sequence of photographs with different exposure times which are combined to a single image. In practice two problems occur when taking an image sequence: The camera is moving or objects are moving during the sequence. This results in a blurry HDR image due to the camera movement and moving objects appear multiple times as ghost images in the combined image. In this paper, we present a simple and fast algorithm for a robust HDR generation that removes these artifacts without prior knowledge of the camera response function.

Images captured under hazy conditions have low contrast and poor color. This is primarily due to air-light which degrades image quality according to the transmission map. The approach to enhance these hazy images we introduce here is based on the `Dark-Channel Prior' method with image refinement by the `Weighted Least Square' based edge-preserving smoothing. Local contrast is further enhanced by multi-scale tone manipulation. The proposed method improves the contrast, color and detail for the entire image domain effectively. In the experiment, we compare the proposed method with conventional methods to validate performance.

This is Part II of the paper, "Gray-Level Grouping (GLG): an Automatic Method for Optimized Image Contrast Enhancement". Part I of this paper introduced a new automatic contrast enhancement technique: gray-level grouping (GLG). GLG is a general and powerful technique, which can be conveniently applied to a broad variety of low-contrast images and outperforms conventional contrast enhancement techniques. However, the basic GLG method still has limitations and cannot enhance certain classes of low-contrast images well, e.g., images with a noisy background. The basic GLG also cannot fulfill certain special application purposes, e.g., enhancing only part of an image which corresponds to a certain segment of the image histogram. In order to break through these limitations, this paper introduces an extension of the basic GLG algorithm, selective gray-level grouping (SGLG), which groups the histogram components in different segments of the grayscale using different criteria and, hence, is able to enhance different parts of the histogram to various extents. This paper also introduces two new preprocessing methods to eliminate background noise in noisy low-contrast images so that such images can be properly enhanced by the (S)GLG technique. The extension of (S)GLG to color images is also discussed in this paper. SGLG and its variations extend the capability of the basic GLG to a larger variety of low-contrast images, and can fulfill special application requirements. SGLG and its variations not only produce results superior to conventional contrast enhancement techniques, but are also fully automatic under most circumstances, and are applicable to a broad variety of images.

1 Consultant, Maplewood, MN USA 4 * Correspondence: sahyun@infionline.net; 1-(651)-927-9686 5 6 Abstract: We examined a series of real-world, pictorial photographs with varying 7 characteristics, along with their modification by noise addition and unsharp masking. As 8 response metrics we used three different versions of the aesthetic measure originally 9 proposed by Birkhoff. The first aesthetic measure, which has been used in other studies, 10 and which we used in our previous work as well, showed a preference for the least 11 complex of the images. It provided no justification for noise addition, but did reveal 12 enhancement on unsharp masking. Optimum level of unsharp masking varied with the 13 image, but was predictable from the individual image’s GIF compressibility. We expect this 14 result to be useful for guiding the processing of pictorial photographic imagery. The 15 second aesthetic measure, that of informational aesthetics based on entropy alone failed 16 to provide useful discrimination among the images or the conditions of their modification. 17 A third measure, derived from the concepts of entropy maximization, as well as the 18 hypothesized preference of observers for “simpler”, i.e., more compressible, images, 19 yielded qualitatively the same results as the more traditional version of the measure. 20 Differences among the photographs and the conditions of their modification were more 21 clearly defined with this metric, however. 22

Traditional Support Vector Domain Description (SVDD) and some improved SVDD algorithms are suboptimal in detecting some complex outliers. To solve the difficulty, we proposed a novel adaptive weighted SVDD (AW-SVDD) algorithm. Firstly, a weighting is computed for each data point based on their spatial position distribution and density distribution in a training dataset. The weighting can be used to measure the degree of the data point to be an outlier. Then the weighted data are trained by traditional SVDD. Lastly, a sphere shaped data description can be obtained for the training data. Experimental results demonstrate that AW-SVDD can overcome the interference from some complex outliers objectively, therefore the algorithm has a better performance than traditional SVDD and other improved SVDD algorithms.

The most effective superresolution methods proposed in the literature require precise knowledge of the so-called point spread function of the imager, while in practice its accurate estimation is nearly impossible. This paper presents a new superresolution method, whose main feature is its ability to account for the scant knowledge of the imager point spread function. This ability is based on representing this imprecise knowledge via a non-additive neighborhood function. The superresolution reconstruction algorithm transfers this imprecise knowledge to output by producing an imprecise (interval-valued) high-resolution image. We propose some experiments illustrating the robustness of the proposed method with respect to the imager point spread function. These experiments also highlight its high performance compared with very competitive earlier approaches. Finally, we show that the imprecision of the high-resolution interval-valued reconstructed image is a reconstruction error marker.


Question: A real-time method for suppressing impulse noise in images using an efficient weighted-average filter.

This letter introduces an innovative two-phase noise adaptive fuzzy switching median (NAFSM) filter designed for the effective reduction of salt-and-pepper noise in images. The initial phase involves noise detection, utilizing the histogram of the noise-affected image to pinpoint pixels corrupted by noise. These identified "noise pixels" are then channeled into the subsequent filtering phase, whereas the "noise-free pixels" remain untouched, preserving the original image quality where possible. In the filtering phase, the NAFSM mechanism employs fuzzy logic to manage the uncertainty inherent in the local image data, which is exacerbated by the presence of noise. This approach ensures a more precise and nuanced handling of the image data, leading to superior noise suppression. Experimental outcomes affirm that the NAFSM filter outperforms several established salt-and-pepper noise filters documented in the literature, showcasing its efficiency and adaptability in real-time noise suppression scenarios.

This paper describes a machine learning approach for visual object detection which is capable of processing images extremely rapidly and achieving high detection rates. This work is distinguished by three key contributions. The first is the introduction of a new image representation called the “Integral Image” which allows the features used by our detector to be computed very quickly. The second is a learning algorithm, based on AdaBoost, which selects a small number of critical visual features from a larger set and yields extremely efficient classifiers[6]. The third contribution is a method for combining increasingly more complex classifiers in a “cascade” which allows background regions of the image to be quickly discarded while spending more computation on promising object-like regions. The cascade can be viewed as an object specific focus-of-attention mechanism which unlike previous approaches provides statistical guarantees that discarded regions are unlikely to contain the object of interest. In the domain of face detection the system yields detection rates comparable to the best previous systems. Used in real-time applications, the detector runs at 15 frames per second without resorting to image differencing or skin color detection.

Common method in image enhancement that's often use is histogram equalization, due to this method is simple and has low computation load. In this research, we use Contrast Limited Adaptive Histogram Equalization (CLAHE) to enhance the color retinal image. To reduce this noise effect in color retinal image due to the acquisition process, we need to enhance this image. Color retinal image has unique characteristic than other image, that is, this image has important in green (G) channel. Image enhancement has important contribution in ophthalmology. In this paper, we propose new enhancement method using CLAHE in G channel to improve the color retinal image quality. The enhancement process conduct in G channel is appropriate to enhance the color retinal image quality.

In recent years, lots of object tracking methods have been presented for better tracking accuracies. However, few of them can be applied to the real-time applications due to high computational cost. Aiming at achieving better realtime tracking performance, we propose an adaptive robust framework for object tracking based on the CamShift approach, which is notable for its simplicity and high processing efficiency. An adaptive local search method is presented to search for the best object candidate to avoid that the CamShift tracker gets confused by the surrounding background and erroneously incorporates it into the object region. A Kalman filter is also incorporated into our framework for prediction of the object's movement, so as to reduce the search effort and possible tracking failure caused by fast object motion. The experimental results demonstrate that the proposed tracking framework is robust and computationally effective.

This paper presents a robust method for defect detection in textures, entropy-based automatic selection of the wavelet decomposition level (EADL), based on a wavelet reconstruction scheme, for detecting defects in a wide variety of structural and statistical textures. Two main features are presented. One of the new features is an original use of the normalized absolute function value (NABS) calculated from the wavelet coefficients derived at various different decomposition levels in order to identify textures where the defect can be isolated by eliminating the texture pattern in the first decomposition level. The second is the use of Shannon's entropy, calculated over detail subimages, for automatic selection of the band for image reconstruction, which, unlike other techniques, such as those based on the co-occurrence matrix or on energy calculation, provides a lower decomposition level, thus avoiding excessive degradation of the image, allowing a more accurate defect segmentation. A metric analysis of the results of the proposed method with nine different thresholding algorithms determined that selecting the appropriate thresholding method is important to achieve optimum performance in defect detection. As a consequence, several different thresholding algorithms depending on the type of texture are proposed.

The fuzzy technique is an operator introduced in order to simulate at a mathematical level the compensatory behavior in process of decision making or subjective evaluation. The following paper introduces such operators on hand of computer vision application. In this paper a novel method based on fuzzy logic reasoning strategy is proposed for edge detection in digital images without determining the threshold value. The proposed approach begins by segmenting the images into regions using floating 3x3 binary matrix. The edge pixels are mapped to a range of values distinct from each other. The robustness of the proposed method results for different captured images are compared to those obtained with the linear Sobel operator. It is gave a permanent effect in the lines smoothness and straightness for the straight lines and good roundness for the curved lines. In the same time the corners get sharper and can be defined easily. Keywords—Fuzzy logic, Edge detection, Image processing, computer vision, Mechanical parts, Measurement.

Background subtraction is a method typically used to segment moving regions in image sequences taken from a static camera by comparing each new frame to a model of the scene background. We present a novel non-parametric background model and a background subtraction approach. The model can handle situations where the background of the scene is cluttered and not completely static but contains small motions such as tree branches and bushes. The model estimates the probability of observing pixel intensity values based on a sample of intensity values for each pixel. The model adapts quickly to changes in the scene which enables very sensitive detection of moving targets. We also show how the model can use color information to suppress detection of shadows. The implementation of the model runs in real-time for both gray level and color imagery. Evaluation shows that this approach achieves very sensitive detection with very low false alarm rates.

High dynamic range (HDR) images play an important role in todays computer graphics: Typical applications are the improved display of a photograph with a tone mapper and the relighting of a virtual object in a natural environment using an HDR environment map. Generating an HDR image usually requires a sequence of photographs with different exposure times which are combined to a single image. In practice two problems occur when taking an image sequence: The camera is moving or objects are moving during the sequence. This results in a blurry HDR image due to the camera movement and moving objects appear multiple times as ghost images in the combined image. In this paper, we present a simple and fast algorithm for a robust HDR generation that removes these artifacts without prior knowledge of the camera response function.

This paper makes available a concise review of data windows and their affect on the detection of harmonic signals in the presence of broad-band noise, and in the presence of nearby strong harmonic interference. We also call attention to a number of common errors in the application of windows when used with the fast Fourier transform. This paper includes a comprehensive catalog of data windows along with their significant performance parameters from which the different windows can be compared. Finally, an example demonstrates the use and value of windows to resolve closely spaced harmonic signals characterized by large differences in amplitude.

We analyze the computer vision task of pixel-level background subtraction. We present recursive equations that are used to constantly update the parameters of a Gaussian mixture model and to simultaneously select the appropriate number of components for each pixel. We also present a simple non-parametric adaptive density estimation method. The two methods are compared with each other and with some previously proposed algorithms. 2005 Elsevier B.V. All rights reserved.

Although the number of pixels in image sensors is increasing exponentially, production techniques have only been able to linearly reduce the probability that a pixel will be defective. The result is a rapidly increasing probability that a sensor will contain one or more defective pixels. The defect pixel detection and defect pixel correction are operated separately but the former must employ before the latter is in use. Traditional detection scheme, which finds the defect pixels during manufacturing, is not able to discover the spread defect pixels years late. Consequently, the lifetime and robust defect pixel detection technique, which identifies the fault pixels when camera is in use, is more practical and developed. The paper presents a two stages dead pixel detection technique without complicated mathematic computations so that the embedded devices can easily implement it. Using six dead pixel types are tested and the experimental result indicates that it can be accelerated more than four times the detection time.


Question: Design, implementation, and assessment of a versatile low-latency nanowatt wake-up radio receiver.

This paper explores a variety of innovative and significant research domains within the realm of wireless industrial communications, focusing on protocol and system design. The topics chosen reflect either the recent surge in interest within the industrial communications sector—such as wireless sensor networks—or prospective areas of investigation that hold promise for future exploration. Examples include cooperative diversity methods for enhancing error control and the application of cognitive radio and opportunistic spectrum access to mitigate the impact of external interferences, both of which are anticipated to gain prominence in the coming years.

**Question**: A Comprehensive Study on the Performance of a Novel Hybrid Renewable Energy System for Rural Electrification

**Documents**: An analysis of renewable energy policies and rural electrification in Sub-Saharan Africa
This paper analyses the policies on renewable energy and rural electrification in Sub-Saharan Africa. It is a review paper, based on desk research. It discusses the importance of electrification for socio-economic development and the potential of renewable energy for rural electrification in Sub-Saharan Africa. It analyses the renewable energy and rural electrification policies in the region, and discusses the challenges and opportunities for implementing these policies. The paper concludes that there is a need for more effective policies and better implementation strategies to achieve the potential of renewable energy for rural electrification in Sub-Saharan Africa.

**Similar Documents**: This paper conducts an in-depth analysis of renewable energy policies and their implications for rural electrification, specifically within the context of Sub-Saharan Africa. As a review paper, it is grounded in comprehensive desk research. The study highlights the critical role of electrification in driving socio-economic development and the significant potential that renewable energy holds for rural areas in Sub-Saharan Africa. It delves into the policies governing renewable energy and rural electrification in the region, examining both the challenges and the opportunities they present. The paper underscores the necessity for more robust and effective policies, coupled with improved implementation strategies, to fully harness the potential of renewable energy for rural electrification in Sub-Saharan Africa.

A low-power FMCW 80 GHz radar transmitter front-end chip is presented, which was fabricated in a SiGe bipolar production technology ( fT=180 GHz, fmax=250 GHz ). Additionally to the fundamental 80 GHz VCO, a 4:1-frequency divider (up to 100 GHz), a 23 GHz local oscillator (VCO) with a low phase noise of -112 dBc/Hz (1 MHz offset), a PLL-mixer and a static frequency divider is integrated together with several output buffers. This chip was designed for low power consumption (in total <; 0.5 W, i.e., 100 mA at 5 V supply voltage), which is dominated by the 80 GHz VCO due to the demands for high output power (≈ 12 dBm) and low phase noise (minimum -97 dBc/Hz at 1 MHz offset) within the total wide tuning range from 68 GHz to 92.5 GHz (Δf = 24.5 GHz). Measurements of the double-PLL system at 80 GHz showed a low phase noise of -88 dBc/Hz at 10 kHz offset frequency.

A low cost pulse transceiver has been developed for measuring the electrical properties of materials. The transceiver generates an ultra wide band (UWB) pulse as well as samples the received pulse. The pulse generator has been designed using a silicon-germanium (SiGe) analog comparator which is a possible alternative to step recovery diodes. The pulse is received by an extended time sampling circuit. The sampling circuit presented is an alternative design that does not require the use of a broadband balun.

Non-contact ECG/EEG electrodes, which operate primarily through capacitive coupling, have been extensively studied for unobtrusive physiological monitoring. Previous implementations using discrete off-the-shelf amplifiers have been encumbered by the need for manually tuned input capacitance neutralization networks and complex DC-biasing schemes. We have designed and fabricated a custom integrated high input impedance (60 fF∥5TΩ), low noise (0.05 fA/√Hz) non-contact sensor front-end specifically to bypass these limitations. The amplifier fully bootstraps both the internal and external parasitic impedances to achieve an input capacitance of 60 fF without neutralization. To ensure DC stability and eliminate the need for external large valued resistances, a low-leakage, on-chip biasing network is included. Stable frequency response is demonstrated below 0.05 Hz even with coupling capacitances as low as 0.5 pF.

In this paper, we present a novel level shifter circuit converting subthreshold signal levels to super-threshold signal levels at high-speed using ultra low-power and a small silicon area, making it well-suited for low-power applications such as wireless sensor networks and implantable medical devices. The proposed circuit introduces a new voltage level shifter topology employing a level-shifting capacitor contributing to increase the range of conversion voltages, while significantly reducing the conversion delay. Such a level-shifting capacitor is quickly charged, whenever the input signal detects a low-to-high transition, in order to boost internal voltage nodes, and quickly reach a high output voltage level. The proposed circuit achieves a shorter propagation delay and a smaller silicon area for a given operating frequency and power consumption compared to other circuit solutions. Measurement results are presented for the proposed circuit fabricated in a 0.18- $\mu \text {m}$  TSMC technology. The proposed circuit can convert a wide range of the input voltages from 330 mV to 1.8 V, and operate over a frequency range of 100 Hz to 100 MHz. It has a propagation delay of 29 ns and a power consumption of 61.5 nW for input signals 0.4 V, at a frequency of 500-kHz, outperforming previous designs.

This letter presents a compact fractal loop rectenna for RF energy harvesting at GSM1800 bands. First, a fractal loop antenna with novel in-loop ground-plane impedance matching is proposed for the rectenna design. Also, a high-efficiency rectifier is designed in the loop antenna to form a compact rectenna. Measured results show that an efficiency of 61% and an output dc voltage of 1.8 V have been achieved over 12-kΩ resistor for 10 μW/cm2 power density at 1.8 GHz. The rectenna is able to power up a battery-less LCD watch at a distance of 10 m from the cell tower. The proposed rectenna is compact, easy to fabricate, and useful for various energy harvesting applications.

Technological progress in integrated, low-power, CMOS communication devices and sensors makes a rich design space of networked sensors viable. They can be deeply embedded in the physical world and spread throughout our environment like smart dust. The missing elements are an overall system architecture and a methodology for systematic advance. To this end, we identify key requirements, develop a small device that is representative of the class, design a tiny event-driven operating system, and show that it provides support for efficient modularity and concurrency-intensive operation. Our operating system fits in 178 bytes of memory, propagates events in the time it takes to copy 1.25 bytes of memory, context switches in the time it takes to copy 6 bytes of memory and supports two level scheduling. The analysis lays a groundwork for future architectural advances.

The systems based on intelligent sensors are currently expanding, due to theirs functions and theirs performances of intelligence: transmitting and receiving data in real-time, computation and processing algorithms, metrology remote, diagnostics, automation and storage measurements...The radio frequency wireless communication with its multitude offers a better solution for data traffic in this kind of systems. The mains objectives of this paper is to present a solution of the problem related to the selection criteria of a better wireless communication technology face up to the constraints imposed by the intended application and the evaluation of its key features. The comparison between the different wireless technologies (WiFi, Wi-Max, UWB, Bluetooth, ZigBee, ZigBeeIP, GSM/GPRS) focuses on their performance which depends on the areas of utilization. Furthermore, it shows the limits of their characteristics. Study findings can be used by the developers/ engineers to deduce the optimal mode to integrate and to operate a system that guarantees quality of communication, minimizing energy consumption, reducing the implementation cost and avoiding time constraints. Keywords—Wireless communications; Performances; Energy; Protocols; Intelligent sensors; Applications

Low-Power Wide Area Networks (LPWANs) have arisen as a promising communication technology for supporting Internet of Things (IoT) services due to their low power operation, wide coverage range, low cost and scalability. However, most LPWAN solutions like SIGFOXTMor LoRaWANTMrely on star topology networks, where stations (STAs) transmit directly to the gateway (GW), which often leads to rapid battery depletion in STAs located far from it. In this work, we analyze the impact on LPWANs energy consumption of multi-hop communication in the uplink, allowing STAs to transmit data packets in lower power levels and higher data rates to closer parent STAs, reducing their energy consumption consequently. To that aim, we introduce the DistanceRing Exponential Stations Generator (DRESG) framework, designed to evaluate the performance of the so-called optimal-hop routing model, which establishes optimal routing connections in terms of energy efficiency, aiming to balance the consumption among all the STAs in the network. Results show that enabling such multi-hop connections entails higher network lifetimes, reducing significantly the bottleneck consumption in LPWANs with up to thousands of STAs. These results lead to foresee multi-hop communication in the uplink as a promising routing alternative for extending the lifetime of LPWAN deployments.

Radio-frequency identification (RFID) technology is the enabler for applications like the future internet of things (IoT), where security plays an important role. When integrating security to RFID tags, not only the cryptographic algorithms need to be secure but also their implementation. In this work we present differential power analysis (DPA) and differential electromagnetic analysis (DEMA) attacks on a securityenabled RFID tag. The attacks are conducted on both an ASIC-chip version and on an FPGA-prototype version of the tag. The design of the ASIC version equals that of commercial RFID tags and has analog and digital part integrated on a single chip. Target of the attacks is an implementation of the Advanced Encryption Standard (AES) with 128-bit key length and DPA countermeasures. The countermeasures are shuffling of operations and insertion of dummy rounds. Our results illustrate that the effort for successfully attacking the ASIC chip in a real-world scenario is only 4.5 times higher than for the FPGA prototype in a laboratory environment. This let us come to the conclusion that the effort for attacking contactless devices like RFID tags is only slightly higher than that for contact-based devices. The results further underline that the design of countermeasures like the insertion of dummy rounds has to be done with great care, since the detection of patterns in power or electromagnetic traces can be used to significantly lower the attacking effort.

This paper presents an NMOS pseudo-digital low-dropout (PD-LDO) regulator that supports low-voltage operation by eliminating the amplifier of an analog LDO. The proposed pseudo-digital control loop consists of a latched comparator, a 2X charge pump and a RC network. It detects the output voltage and provides a continuous gate control signal for the power transistor by charging and discharging the RC network. Fast transient response is achieved due to the source follower structure of the power NMOS, with a small output capacitor and small occupied chip area and without consuming large quiescent current. The proof-of-concept design of the proposed PD-LDO is implemented in a 0.18-J.1m CMOS process. The minimum supply voltage is 0.7 V, with a dropout voltage of 100 mV and a maximum load current of 100 mA. Using only 20 pF of on-chip output capacitor and 10 MHz comparator clock frequency, the undershoot is 106 mV with 90 mA load current step and 150 ns edge time. The quiescent current is only 6.3 μA and the active chip area is 0.08 mm2.


Question: Design, implementation, and assessment of a versatile low-latency nanowatt wake-up radio receiver.

This document presents the design, implementation, testing, and measurement of an ultra-low power Wake Up Receiver (WUR) for Wireless Body Area Networks (WBAN). The system employs Gaussian On-Off Keying (GOOK) and Pulse Width Modulation (PWM) for signal modulation and encoding, respectively. A noteworthy feature is the integration of a decoder that supports Serial Peripheral Interface (SPI), enhancing its compatibility and functionality. Extensive testing was conducted to evaluate the WUR's power consumption and resilience against RF interference, a common concern in environments where WBANs are deployed alongside other wireless devices. The results showcase the WUR's exceptional power efficiency, with a listening power of just 270nW, significantly lower than current state-of-the-art alternatives. The proposed preamble detection mechanism effectively minimizes false wake-ups caused by nearby wireless devices, a critical aspect for WBAN reliability. Moreover, the incorporation of SPI leads to a substantial reduction in overall power consumption during packet reception and decoding processes.

Low power consumption, low transceiver chip cost and large coverage area are the main characteristics of the low power wide area networks (LPWAN) technologies. We expect that LPWAN can be part of enabling new human-centric health and wellness monitoring applications. Therefore in this work we study the indoor performance of one LPWAN technology, namely LoRa, by the means of real-life measurements. The measurements were conducted using the commercially available equipment in the main campus of the University of Oulu, Finland, which has an indoor area spanning for over 570 meters North to South and over 320 meters East to West. The measurements were executed for a sensor node operating close to human body that was periodically reporting the sensed data to a base station. The obtained results show that when using 14 dBm transmit power and the largest spreading factor of 12 for the 868 MHz ISM band, the whole campus area can be covered. Measured packet success delivery ratio was 96.7 % without acknowledgements and retransmissions.

The full degree of freedom in mobile systems heavily depends on the energy provided by the mobile phone's batteries. Their capacity is in general limited and for sure not keeping pace as the mobile devices are crammed up with new functionalities. The discrepancy of Moore's law, offering twice the processing power at least each second year, and the development in batteries, which did not even double over the last decade, makes a shift in researchers' way of designing networks, protocols, and the mobile device itself. The bottleneck to take care of in the design process of mobile systems is not only the wireless data rate, but even more the energy limitation as the customers ask for new energy-hungry services, e.g., requiring faster connections or even multiple air interfaces, and longer standby or operational times of their mobile devices at the same time. In this survey, the energy consuming entities of a mobile device such as wireless air interfaces, display, mp3 player and others are measured and compared. The presented measurement results allow the reader to understand what the energy hungry parts of a mobile device are and use those findings for the design of future mobile protocols and applications. All results presented in this work and further results are made public on our web page [2].

More than a decade of research in the field of thermal, motion, vibration and electromagnetic radiation energy harvesting has yielded increasing power output and smaller embodiments. Power management circuits for rectification and DC–DC conversion are becoming able to efficiently convert the power from these energy harvesters. This paper summarizes recent energy harvesting results and their power man-

The wireless sensor networks community, has now an increased understanding of the need for realistic link layer models. Recent experimental studies have shown that real deployments have a "transitional region" with highly unreliable links, and that therefore the idealized perfect-reception-within-range models used in common network simulation tools can be very misleading. In this paper, we use mathematical techniques from communication theory to model and analyze the low power wireless links. The primary contribution of this work is the identification of the causes of the transitional region, and a quantification of their influence. Specifically, we derive expressions for the packet reception rate as a function of distance, and for the width of the transitional region. These expressions incorporate important channel and radio parameters such as the path loss exponent and shadowing variance of the channel; and the modulation and encoding of the radio. A key finding is that for radios using narrow-band modulation, the transitional region is not an artifact of the radio non-ideality, as it would exist even with perfect-threshold receivers because of multi-path fading. However, we hypothesize that radios with mechanisms to combat multi-path effects, such as spread-spectrum and diversity techniques, can reduce the transitional region.

The demand for low voltage, low drop-out (LDO) regulators is increasing because of the growing demand for portable electronics, i.e., cellular phones, pagers, laptops, etc. LDOs are used coherently with dc-dc converters as well as standalone parts. In power supply systems, they are typically cascaded onto switching regulators to suppress noise and provide a low noise output. The need for low voltage is innate to portable low power devices and corroborated by lower breakdown voltages resulting from reductions in feature size. Low quiescent current in a battery operated system is an intrinsic performance parameter because it partially determines battery life. This paper discusses some techniques that enable the practical realizations of low quiescent current LDOs at low voltages and in existing technologies. The proposed circuit exploits the frequency response dependence on load-current to minimize quiescent current flow. Moreover, the output current capabilities of MOS power transistors are enhanced and drop-out voltages are decreased for a given device size. Other applications, like dc-dc converters, can also reap the benefits of these enhanced MOS devices. An LDO prototype incorporating the aforementioned techniques was fabricated. The circuit was operable down to input voltages of 1 V with a zero-load quiescent current flow of 23 μA. Moreover, the regulator provided 18 and 50 mA of output current at input voltages of 1 and 1.2 V respectively.

Bluetooth transceivers have been in the active area of recent research being the key component of physical layer in the Bluetooth technology. The low power consumption of Bluetooth low energy (LE) devices compared to the conventional Bluetooth devices has enhanced its importance in Internet-of-Things (IoT) applications. Therefore, Bluetooth low energy device based solution needs expansion in the IoT network infrastructure. The transceivers in the literature and modulation schemes are compared and summarized. Energy consumption of modulation schemes in Bluetooth communication are analyzed and compared using the model presented in this work. In this approach considering both circuit and signal power consumption, optimum modulation order for minimum energy consumption has been found using numerical calculation and relation between signal to noise ratio (SNR) and channel capacity. Battery life for IoT sensors using Bluetooth LE technology as a wireless link has been analyzed considering multiple transaction times for transmitters having different power consumption. MFSK and more bandwidth-efficient GFSK are identified as low energy solution for all smart devices.

At its peak, the Internet-of-Things will largely be composed of low-power devices with wireless radios attached. Yet, secure authentication of these devices amidst adversaries with much higher power and computational capability remains a challenge, even for advanced cryptographic and wireless security protocols. For instance, a high-power software radio could simply replay chunks of signals from a low-power device to emulate it. This paper presents a deep-learning classifier that learns hardware imperfections of low-power radios that are challenging to emulate, even for high- power adversaries. We build an LSTM framework, specifically sensitive to signal imperfections that persist over long durations. Experimental results from a testbed of 30 low-power nodes demonstrate high resilience to advanced software radio adversaries.

CMOS transmit-receive (T/R) switches have been integrated in a 0.18-/spl mu/m standard CMOS technology for wireless applications at 2.4 and 5.2 GHz. This switch design achieves low loss and high linearity by increasing the substrate impedance of a MOSFET at the frequency of operation using a properly tuned LC tank. The switch design is asymmetric to accommodate the different linearity and isolation requirements in the transmit and receive modes. In the transmit mode, the switch exhibits 1.5-dB insertion loss, 28-dBm power, 1-dB compression point (P/sub 1dB/), and 30-dB isolation, at 2.4 and 5.2 GHz. In the receive mode, the switch achieves 1.6-dB insertion loss, 11.5-dBm P/sub 1dB/, and 15-dB isolation, at 2.4 and 5.2 GHz. The linearity obtained in the transmit mode is the highest reported to date in a standard CMOS process. The switch passes the 4-kV Human Body Model electrostatic discharge test. These results show that the switch design is suitable for narrow-band applications requiring a moderate-high transmitter power level (<1 W).

We present a fully differential two-stage Miller op-amp operating from a 0.5 V power supply. The input signal is applied to the bulk nodes of the input devices. A prototype was designed in a standard 0.18 /spl mu/m CMOS process using standard 0.5 V V/sub T/ devices. It has a measured 52 dB DC gain, a 2.5 MHz gain-bandwidth and consumes 110 /spl mu/W.

A syringe-implantable electrocardiography (ECG) monitoring system is proposed. The noise optimization and circuit techniques in the analog front-end (AFE) enable 31 nA current consumption while a minimum energy computation approach in the digital back-end reduces digital energy consumption by 40%. The proposed SoC is fabricated in 65 nm CMOS and consumes 64 nW while successfully detecting atrial fibrillation arrhythmia and storing the irregular waveform in memory in experiments using an ECG simulator, a live sheep, and an isolated sheep heart.


Question: Design, execution, and assessment of a versatile low-latency nanowatt wake-up radio receiver's performance.

This paper delves into a comprehensive performance evaluation and comparative analysis of SubCarrier Modulation (SCM) Wake-up Radio (WuR) systems designed for energy-efficient wireless sensor networks. The quest for energy-efficient communication in wireless sensor networks has led to the widespread adoption of duty-cycled radio operation, where the radio's transceiver is intermittently activated and deactivated to listen for incoming messages. However, this method is inefficient in scenarios with low or sporadic traffic due to the unnecessary activation of the transceiver. WuR systems offer a more energy-efficient alternative by enabling on-demand activation of target devices through a specialized radio signal and a WuR receiver.

In this research, we explore an innovative WuR approach that seamlessly integrates data communication and wake-up functionalities, offering a flexible radio operation. We conduct physical experiments to assess the system's delay, current consumption, and operational range under varying transmit power conditions. Additionally, we showcase a practical single-hop WuR application and demonstrate the system's multi-hop capabilities, marking a significant advancement in WuR technology. Our simulations further reinforce the system's performance in multi-hop scenarios.

Through a detailed qualitative comparison with leading WuR proposals in the literature, we assert that the proposed WuR system is a compelling choice for any application that demands energy-efficient wireless sensor node communications, particularly in scenarios requiring multi-hop functionality. The integration of data communication and wake-up capabilities, along with the system's operational flexibility and efficiency, make it a standout solution for enhancing the energy efficiency of wireless sensor networks.

In this paper, a fully integrated low voltage charge pump for thermoelectric energy harvesters is presented. The proposed dual-mode architecture achieves both the low startup voltage in a startup mode and high conversion efficiency in a normal operation mode without off-chip inductors and capacitors. In the measurement, the proposed circuit successfully converts 120-mV input to 770-mV output with 38.8% conversion efficiency.

A fully integrated step-down switched-capacitor dc–dc converter ring with 123 phases has been designed that could achieve fast dynamic voltage scaling for the microprocessor of wearable devices. The symmetrical multiphase converter ring surrounds its load in the square and supplies power to the on-chip power grid that is easily accessible at any point of the chip edges. The frequency of the <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {DD}}$ </tex-math></inline-formula>-controlled oscillator is adjusted through its supply voltage <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {DD}}$ </tex-math></inline-formula>, which allows the unity-gain frequency to be designed higher than the switching frequency. The converter ring has been fabricated in a low-leakage 65-nm CMOS process. This converter achieves a response time of 3 ns, a reference tracking speed of 2.5 V/<inline-formula> <tex-math notation="LaTeX">$\mu \text{s}$ </tex-math></inline-formula>, and a minimum output ripple of 2.2 mV. The peak efficiency is 80% at the power density of 66.6 mW/mm2, and the maximum power density is 180 mW/mm2.

Non-contact ECG/EEG electrodes, which operate primarily through capacitive coupling, have been extensively studied for unobtrusive physiological monitoring. Previous implementations using discrete off-the-shelf amplifiers have been encumbered by the need for manually tuned input capacitance neutralization networks and complex DC-biasing schemes. We have designed and fabricated a custom integrated high input impedance (60 fF∥5TΩ), low noise (0.05 fA/√Hz) non-contact sensor front-end specifically to bypass these limitations. The amplifier fully bootstraps both the internal and external parasitic impedances to achieve an input capacitance of 60 fF without neutralization. To ensure DC stability and eliminate the need for external large valued resistances, a low-leakage, on-chip biasing network is included. Stable frequency response is demonstrated below 0.05 Hz even with coupling capacitances as low as 0.5 pF.

A power-efficient 6.25Gb/s transceiver in 90nm CMOS for chip-to-chip communication is presented, it dissipates 2.2mW/Gb/s operating at a BER of <10-15 over a channel with -15dB attenuation at 3.125GHz. A shared LC-PLL, resonant clock distribution, a low-swing voltage-mode transmitter, a low-power phase rotator, and a software-based CDR and an adaptive equalizer are used to reduce power

This paper describes the design of a 2.5-Gb/s 15mW clock recovery circuit based on the quadricorrelator architecture. Employing both phase and frequency detection, the circuit combines high-speed operations such as differentiation, full-wave rectification, and mixing in one stage to lower the power dissipation. In addition, a two-stage voltage-controlled oscillator is utilized that incorporates both phase shift elements to provide a wide tuning range and isolation techniques to suppress the feedthrough due to input data transitions. Fabricated in a 20GHz 1m BiCMOS technology, the circuit exhibits an rms jitter of 9.5 ps and a capture range of 300 MHz.

This paper presents a systematic design methodology for impedance matching circuits of an RF energy harvester to maximize the harvested energy for a range of input power levels with known distribution. Design of input matching networks for RF rectifier differs from those for traditional RF circuits such as low-noise amplifier because the transistors in the RF rectifiers operate in different regions. In this work, it is shown that the input impedance of the rectifier estimated based on small signal simulation of transistors at the peak of input signal in the rectifier when the transistors are biased with stable DC operating voltage provides the largest harvested energy from a fixed input power. For variable input power levels, a matching network selection strategy is proposed to maximize expected harvested energy given the probability density distribution of input power levels. As an experimental sample, an RF energy harvester circuit is designed to maximize the harvested energy in the 902–928 MHz band employing an off-chip impedance matching circuit designed using the proposed methodology. The proposed RF energy harvester exhibits a measured maximum power conversion efficiency (PCE) of 32% at −15 dBm (32 μW) and delivers an output DC voltage of 3.2 V to a 1 MΩ load.

The shift register is a type of sequential logic circuit which is mostly used for storing digital data or the transferring of data in the form of binary numbers in radio frequency identification (RFID) applications to improve the security of the system. A power-efficient shift register utilizing a new flip-flop with an implicit pulse-triggered structure is presented in this article. The proposed flip-flop has features of high performance and low power. It is composed of a sampling circuit implemented by five transistors, a C-element for rise and fall paths, and a keeper stage. The speed is enhanced by executing four clocked transistors together with a transition condition technique. The simulation result confirms that the proposed topology consumes the lowest amounts of power of 30.1997 and 22.7071 nW for parallel in –parallel out (PIPO) and serial in –serial out (SISO) shift register respectively covering 22 μm2 chip area. The overall design consist of only 16 transistors and is simulated in 130 nm complementary-metal-oxide-semiconductor (CMOS) technology with a 1.2 V power supply.

We present the first all-digital PLL and polar transmitter for mobile phones. They are part of a single-chip GSM/EDGE transceiver SoC fabricated in a 90 nm digital CMOS process. The circuits are architectured from the ground up to be compatible with digital deep-submicron CMOS processes and be readily integrateable with a digital baseband and application processor. To achieve this, we exploit the new paradigm of a deep-submicron CMOS process environment by leveraging on the fast switching times of MOS transistors, the fine lithography and the precise device matching, while avoiding problems related to the limited voltage headroom. The transmitter architecture is fully digital and utilizes the wideband direct frequency modulation capability of the all-digital PLL. The amplitude modulation is realized digitally by regulating the number of active NMOS transistor switches in accordance with the instantaneous amplitude. The conventional RF frequency synthesizer architecture, based on a voltage-controlled oscillator and phase/frequency detector and charge-pump combination, has been replaced with a digitally controlled oscillator and a time-to-digital converter. The transmitter performs GMSK modulation with less than 0.5/spl deg/ rms phase error, -165 dBc/Hz phase noise at 20 MHz offset, and 10 /spl mu/s settling time. The 8-PSK EDGE spectral mask is met with 1.2% EVM. The transmitter occupies 1.5 mm/sup 2/ and consumes 42 mA at 1.2 V supply while producing 6 dBm RF output power.

Known elementary wide-band amplifiers suffer from a fundamental tradeoff between noise figure (NF) and source impedance matching, which limits the NF to values typically above 3 dB. Global negative feedback can be used to break this tradeoff, however, at the price of potential instability. In contrast, this paper presents a feedforward noise-canceling technique, which allows for simultaneous noise and impedance matching, while canceling the noise and distortion contributions of the matching device. This allows for designing wide-band impedance-matching amplifiers with NF well below 3 dB, without suffering from instability issues. An amplifier realized in 0.25-/spl mu/m standard CMOS shows NF values below 2.4 dB over more than one decade of bandwidth (i.e., 150-2000 MHz) and below 2 dB over more than two octaves (i.e., 250-1100 MHz). Furthermore, the total voltage gain is 13.7 dB, the -3-dB bandwidth is from 2 MHz to 1.6 GHz, the IIP2 is +12 dBm, and the IIP3 is 0 dBm. The LNA drains 14 mA from a 2.5-V supply and the die area is 0.3/spl times/0.25 mm/sup 2/.

A digital clock and data recovery circuit employs simple 3-level digital-to-analog converters to interface the digital loop filter to the voltage controlled oscillator and achieves low jitter performance. Test chip fabricated in a 0.13mum CMOS process achieves BER < 10-12 , plusmn1500ppm lock-in range, plusmn2500ppm tracking range, recovered clock jitter of 8.9ps rms and consumes 12mW power from a single-pin 1.2V supply, while operating at 1.6Gbps


Question: Design, implementation, and assessment of a versatile low-latency nanowatt wake-up radio receiver.

This paper explores the diverse facets of the publish/subscribe model, a communication paradigm that has gained significant traction due to its suitability for loosely coupled interactions in large-scale systems. The publish/subscribe approach facilitates a decoupled interaction mechanism where subscribers express interest in specific events or patterns, leading to asynchronous notifications from publishers when such events occur. A multitude of variations on this theme have emerged, each tailored to specific applications or network models. Our analysis distills the core attributes that unify these variants: complete decoupling of entities in terms of time, space, and synchronization. By examining these dimensions, we highlight the synergies and differences between publish/subscribe and conventional interaction paradigms. The paper categorizes and synthesizes the various publish/subscribe implementations, offering insights into their respective advantages and limitations from both interface and implementation perspectives.

**Question**: An Optimization Framework for Energy-Efficient Data Dissemination in Wireless Sensor Networks

**Documents**: A Survey on Wireless Sensor Networks for Environmental Monitoring
Wireless Sensor Networks (WSNs) have become a powerful tool for environmental monitoring, providing a means to gather, process, and disseminate data from remote and inaccessible areas. This survey aims to provide a comprehensive overview of the use of WSNs in environmental monitoring applications. We begin by discussing the fundamental components and architectural design of WSNs, including the hardware, software, and network protocols. We then delve into the various environmental monitoring scenarios where WSNs have been deployed, such as air and water quality monitoring, wildlife tracking, and disaster management. The paper also addresses the challenges and limitations associated with WSNs in environmental monitoring, including energy constraints, scalability, and data reliability. Furthermore, we present an analysis of existing research and highlight the future trends and research directions in this field.

**Similar Documents**: This comprehensive survey explores the application of Wireless Sensor Networks (WSNs) in environmental monitoring, highlighting their role in collecting, processing, and distributing data from hard-to-reach locations. We start by examining the foundational elements and architectural design of WSNs, encompassing hardware, software, and network protocols. The survey then transitions into a detailed exploration of the diverse environmental monitoring contexts where WSNs are employed, such as monitoring air and water quality, wildlife observation, and emergency response scenarios. The document also confronts the challenges and limitations inherent to WSNs in environmental monitoring, focusing on issues like power management, network scalability, and data integrity. Additionally, we review pertinent research studies and outline emerging trends and potential avenues for future research in this

We present the first all-digital PLL and polar transmitter for mobile phones. They are part of a single-chip GSM/EDGE transceiver SoC fabricated in a 90 nm digital CMOS process. The circuits are architectured from the ground up to be compatible with digital deep-submicron CMOS processes and be readily integrateable with a digital baseband and application processor. To achieve this, we exploit the new paradigm of a deep-submicron CMOS process environment by leveraging on the fast switching times of MOS transistors, the fine lithography and the precise device matching, while avoiding problems related to the limited voltage headroom. The transmitter architecture is fully digital and utilizes the wideband direct frequency modulation capability of the all-digital PLL. The amplitude modulation is realized digitally by regulating the number of active NMOS transistor switches in accordance with the instantaneous amplitude. The conventional RF frequency synthesizer architecture, based on a voltage-controlled oscillator and phase/frequency detector and charge-pump combination, has been replaced with a digitally controlled oscillator and a time-to-digital converter. The transmitter performs GMSK modulation with less than 0.5/spl deg/ rms phase error, -165 dBc/Hz phase noise at 20 MHz offset, and 10 /spl mu/s settling time. The 8-PSK EDGE spectral mask is met with 1.2% EVM. The transmitter occupies 1.5 mm/sup 2/ and consumes 42 mA at 1.2 V supply while producing 6 dBm RF output power.

Technological progress in integrated, low-power, CMOS communication devices and sensors makes a rich design space of networked sensors viable. They can be deeply embedded in the physical world and spread throughout our environment like smart dust. The missing elements are an overall system architecture and a methodology for systematic advance. To this end, we identify key requirements, develop a small device that is representative of the class, design a tiny event-driven operating system, and show that it provides support for efficient modularity and concurrency-intensive operation. Our operating system fits in 178 bytes of memory, propagates events in the time it takes to copy 1.25 bytes of memory, context switches in the time it takes to copy 6 bytes of memory and supports two level scheduling. The analysis lays a groundwork for future architectural advances.

This paper presents an analog design methodology, using the selection of inversion coefficient of MOS devices, to design low voltage and low-power (LVLP) CMOS voltage references. These circuits often work under subthreshold operation. Hence, there is a demand for analog design methods that optimize the sizing process of transistors working in weak and moderate inversion. The advantage of the presented method -- compared with the traditional approach to design circuits -- is the reduction of design cycle time and minimization of trial-and-error simulations, if the proposed equations are used. As a case study, a LVLP voltage reference based on subthreshold MOSFETs with supply voltage of 0.7 V was designed for 0.18-¼m CMOS technology.

Based on the avalanche effect of avalanche transistor, a kind of ultra-wideband nanosecond pulse circuit has been designed, whose frequency, pulse width and amplitude are tunable. In this paper, the principle, structure and selection of components' parameters in the circuit are analyzed in detail. The circuit generates periodic negative pulse, whose pulse full width is 890 ps and pulse amplitude is -11.2 V in simulation mode. By setting up circuit for experiment and changing parameters properly, a kind of ultra-wideband pulse with pulse width of 2.131 ns and pulse amplitude of -9.23 V is achieved. With the features such as simple structure, stable and reliable performance and low cost, this pulse generator is applicable to ultra-wideband wireless communication system.

Wireless distributed microsensor systems will enable the reliable monitoring of a variety of environments for both civil and military applications. In this paper, we look at communication protocols, which can have significant impact on the overall energy dissipation of these networks. Based on our findings that the conventional protocols of direct transmission, minimum-transmission-energy, multihop routing, and static clustering may not be optimal for sensor networks, we propose LEACH (Low-Energy Adap tive Clustering Hierarchy), a clustering-based protocol that utilizes randomized rotation of local cluster base stations (cluster-heads) to evenly distribute the energy load among the sensors in the network. LEACH uses localized coordination to enable scalability and robustness for dynamic networks, and incorporates data fusion into the routing protocol to reduce the amount of information that must be transmitted to the base station. Simulations show that LEACH can achieve as much as a factor of 8 reduction in energy dissipation compared with conventional routing protocols. In addition, LEACH is able to distribute energy dissipation evenly throughout the sensors, doubling the useful system lifetime for the networks we simulated.

Bluetooth transceivers have been in the active area of recent research being the key component of physical layer in the Bluetooth technology. The low power consumption of Bluetooth low energy (LE) devices compared to the conventional Bluetooth devices has enhanced its importance in Internet-of-Things (IoT) applications. Therefore, Bluetooth low energy device based solution needs expansion in the IoT network infrastructure. The transceivers in the literature and modulation schemes are compared and summarized. Energy consumption of modulation schemes in Bluetooth communication are analyzed and compared using the model presented in this work. In this approach considering both circuit and signal power consumption, optimum modulation order for minimum energy consumption has been found using numerical calculation and relation between signal to noise ratio (SNR) and channel capacity. Battery life for IoT sensors using Bluetooth LE technology as a wireless link has been analyzed considering multiple transaction times for transmitters having different power consumption. MFSK and more bandwidth-efficient GFSK are identified as low energy solution for all smart devices.

An experimental investigation on the inkjet-printed power harvester for 2.4GHz and review of RF characterization of substrate and printed conductors are presented in this paper. A one stage discrete rectifier based on a voltage doubler structure and a planar monopole antenna are fabricated on cardboard using inkjet printing. The performance of the whole system is examined by measuring the output voltage of the RF power harvester. By the utilization of the proposed idea, the fabrication of low-cost environmentally-friendly battery-less wireless modules is conceivable.

This paper presents a noninvasive wireless sensor platform for continuous health monitoring. The sensor system integrates a loop antenna, wireless sensor interface chip, and glucose sensor on a polymer substrate. The IC consists of power management, readout circuitry, wireless communication interface, LED driver, and energy storage capacitors in a 0.36-mm2 CMOS chip with no external components. The sensitivity of our glucose sensor is 0.18 μA·mm-2·mM-1. The system is wirelessly powered and achieves a measured glucose range of 0.05-1 mM with a sensitivity of 400 Hz/mM while consuming 3 μW from a regulated 1.2-V supply.

A syringe-implantable electrocardiography (ECG) monitoring system is proposed. The noise optimization and circuit techniques in the analog front-end (AFE) enable 31 nA current consumption while a minimum energy computation approach in the digital back-end reduces digital energy consumption by 40%. The proposed SoC is fabricated in 65 nm CMOS and consumes 64 nW while successfully detecting atrial fibrillation arrhythmia and storing the irregular waveform in memory in experiments using an ECG simulator, a live sheep, and an isolated sheep heart.

In this study, a wireless bio-radar sensor was designed to detect a human heartbeat and respiration signals without direct skin contact. In order to design a wireless bio-radar sensor quantitatively, the signal-to-noise ratio (SNR) in the baseband output of a sensor should be calculated. Therefore, we analyzed the SNR of the wireless bio-radar sensor, considering the signal power attenuation in a human body and all kinds of noise sources. Especially, we measured a residual phase noise of a typical free-running oscillator and used its value for the SNR analysis. Based on these analysis and the measurement results, a compact, low-cost 2.4 GHz direct conversion bio-radar sensor was designed and implemented in a printed circuit board. The demonstrated sensor consists of two printed antennas, a


Question: Design, implementation, and assessment of a versatile low-latency nanowatt wake-up radio receiver.

This paper presents the design and implementation of a highly power-efficient wake-up receiver for body channel communication (BCC) in a wireless body area network (WBAN), fabricated using a 130 nm CMOS process. The novel receiver architecture employs an injection-locking ring oscillator (ILRO) in lieu of a conventional RF amplifier, significantly curtailing power usage. The ILRO amplifies the frequency-modulated input signal, converting it into a full-swing rectangular signal, which is then demodulated by a subsequent low-power PLL-based FSK demodulator. The energy-efficient BCC link reduces the stringent sensitivity and selectivity demands on the receiver, further contributing to power savings. To address frequency drift due to temperature fluctuations and leakage currents, an auto frequency calibrator (AFC) is integrated. This AFC utilizes the PLL-based demodulator for periodic recalibration of the ring oscillator's free-running frequency to the target frequency, achieving this without incurring additional area costs. Consequently, the proposed wake-up receiver attains a sensitivity of -62.7 dBm at a data rate of 200 kbps while operating on a mere 37.5 μW from a 0.7 V supply, showcasing its suitability for low-latency, nanowatt WBAN applications.

This paper describes the implementation of a pseudo-random noise radar system on a scalable sensor platform that consists of several multi-purpose 61- and 122-GHz transceivers in a Silicon-Germanium BiCMOS technology. The multi-band transceivers are equipped with a frequency multiplier to generate the 61- and 122-GHz carrier signals from a single 30.5-GHz LO signal and can be cascaded to build a MIMO radar system with 2 different frequency bands. The implemented scalable sensor system is suitable for various radar and communication applications by using the same transceiver chips with integrated binary phase-shift keying modulators and I/Q receiver. A suitable pseudo-random binary sequence was used in a radar measurement to demonstrate the applicability of the developed chips.

Bluetooth transceivers have been in the active area of recent research being the key component of physical layer in the Bluetooth technology. The low power consumption of Bluetooth low energy (LE) devices compared to the conventional Bluetooth devices has enhanced its importance in Internet-of-Things (IoT) applications. Therefore, Bluetooth low energy device based solution needs expansion in the IoT network infrastructure. The transceivers in the literature and modulation schemes are compared and summarized. Energy consumption of modulation schemes in Bluetooth communication are analyzed and compared using the model presented in this work. In this approach considering both circuit and signal power consumption, optimum modulation order for minimum energy consumption has been found using numerical calculation and relation between signal to noise ratio (SNR) and channel capacity. Battery life for IoT sensors using Bluetooth LE technology as a wireless link has been analyzed considering multiple transaction times for transmitters having different power consumption. MFSK and more bandwidth-efficient GFSK are identified as low energy solution for all smart devices.

CMOS transmit-receive (T/R) switches have been integrated in a 0.18-/spl mu/m standard CMOS technology for wireless applications at 2.4 and 5.2 GHz. This switch design achieves low loss and high linearity by increasing the substrate impedance of a MOSFET at the frequency of operation using a properly tuned LC tank. The switch design is asymmetric to accommodate the different linearity and isolation requirements in the transmit and receive modes. In the transmit mode, the switch exhibits 1.5-dB insertion loss, 28-dBm power, 1-dB compression point (P/sub 1dB/), and 30-dB isolation, at 2.4 and 5.2 GHz. In the receive mode, the switch achieves 1.6-dB insertion loss, 11.5-dBm P/sub 1dB/, and 15-dB isolation, at 2.4 and 5.2 GHz. The linearity obtained in the transmit mode is the highest reported to date in a standard CMOS process. The switch passes the 4-kV Human Body Model electrostatic discharge test. These results show that the switch design is suitable for narrow-band applications requiring a moderate-high transmitter power level (<1 W).

Accurate knowledge of the input impedance of a radio-frequency identification (RFID) integrated circuit (IC) at its wake-up power is valuable as it enables the design of a performance-optimized tag for a specific IC. However, since the IC impedance is power dependent, few methods exist to measure it without advanced equipment. We propose and demonstrate a wireless method, based on electromagnetic simulation and threshold power measurement, applicable to fully assembled RFID tags, to determine the mounted IC's input impedance in the absorbing state, including any parasitics arising from the packaging and the antenna-IC connection. The proposed method can be extended to measure the IC's input impedance in the modulating state as well.

This paper reports the design and analysis of 21-29-GHz CMOS low-noise amplifier (LNA), balun and mixer in a standard 0.18-μm CMOS process for ultra-wideband automotive radar systems. To verify the proposed LNA, balun, and mixer architectures, a simplified receiver front-end comprising an LNA, a double-balanced Gilbert-cell-based mixer, and two Marchand baluns was implemented. The wideband Marchand baluns can convert the single RF and local oscillator (LO) signals to nearly perfect differential signals over the 21-29-GHz band. The performance of the mixer is improved with the current-bleeding technique and a parallel resonant inductor at the differential outputs of the RF transconductance stage. Over the 21-29-GHz band, the receiver front-end exhibits excellent noise figure of 4.6±0.5 dB, conversion gain of 23.7±1.4 dB, RF port reflection coefficient lower than -8.8 dB, LO-IF isolation lower than -47 dB, LO-RF isolation lower than -55 dB, and RF-IF isolation lower than -35.5 dB. The circuit occupies a chip area of 1.25×1.06 mm2, including the test pads. The dc power dissipation is only 39.2 mW.

Winner-Take-All (WTA) circuits play an important role in applications where a single element must be selected according to its relevance. They have been successfully applied in neural networks and vision sensors. These applications usually require a large number of inputs for the WTA circuit, especially for vision applications where thousands to millions of pixels may compete to be selected. WTA circuits usually exhibit poor response-time scaling with the number of competitors, and most of the current WTA implementations are designed to work with less than 100 inputs. Another problem related to the large number of inputs is the difficulty to select just one winner, since many competitors may have differences below the WTA resolution. In this paper, a WTA circuit is presented that handles more than four thousand inputs, to our best knowledge the hitherto largest WTA, with response times below the microsecond, and with a guaranty of just a single winner selection. This performance is obtained by the combination of a standard analog WTA circuit and a fast digital single-winner selector with almost no size penalty. This WTA circuit has been successfully employed in the fabrication of a Selective Change-Driven Vision Sensor based on 180 nm CMOS technology. Both simulated and experimental results are presented in the paper, showing that a single pixel event can be selected in just 560 ns, and a multipixel pixel event can be processed in 100 us. Similar results with a conventional approach would require a camera working at more than 1 Mfps for the single-pixel event detection, and 10 kfps for the whole multipixel event to be processed.

LoRa is a long-range, low power, low bit rate and single-hop wireless communication technology. It is intended to be used in Internet of Things (IoT) applications involving battery-powered devices with low throughput requirements. A LoRaWAN network consists of multiple end nodes that communicate with one or more gateways. These gateways act like a transparent bridge towards a common network server. The amount of end devices and their throughput requirements will have an impact on the performance of the LoRaWAN network. This study investigates the scalability in terms of the number of end devices per gateway of single-gateway LoRaWAN deployments. First, we determine the intra-technology interference behavior with two physical end nodes, by checking the impact of an interfering node on a transmitting node. Measurements show that even under concurrent transmission, one of the packets can be received under certain conditions. Based on these measurements, we create a simulation model for assessing the scalability of a single gateway LoRaWAN network. We show that when the number of nodes increases up to 1000 per gateway, the losses will be up to 32%. In such a case, pure Aloha will have around 90% losses. However, when the duty cycle of the application layer becomes lower than the allowed radio duty cycle of 1%, losses will be even lower. We also show network scalability simulation results for some IoT use cases based on real data.

A new miniaturized antenna for 433MHz frequency band is introduced for sensor networks. The antenna is a magnetic monopole loaded with a capacitor, which can significantly decrease the resonant frequency of the structure. It is designed to operate in the ISM 433MHz band on a small PCB (103mm⋆55mm) and has at least 3MHz bandwidth. Moreover, its radiation efficiency is suitable for the possible applications and its pattern is omnidirectionnal.

For the successful design of low-cost and high-performance radar systems accurate and efficient system simulation is a key requirement. In this paper we present a new versatile simulation environment for frequency-modulated continuous-wave radar systems. Besides common hardware simulation it covers integrated system simulation and concept analysis from signal synthesis to baseband. It includes a flexible scenario generator, accurate noise modeling, and efficiently delivers simulation data for development and testing of signal processing algorithms. A comparison of simulations and measurement results for an integrated 77-GHz radar prototype shows the capabilities of the simulator on two different scenarios.

This paper describes a bioamplifier that employs a voltage-controlled-pseudo-resistor to achieve tunable bandwidth and wide operating voltage range for biomedical applications. The versatile pseudo-resistor employed provides ultra-high resistance for ac coupling to cancel the dc offset from electrode–tissue interface. The voltage-controlled-pseudo-resistor consists of serial-connected PMOS transistors working at the subthreshold region and an auto-tuning circuit that makes sure the constant (time-invariant) control-voltage of the pseudo-resistor. This bandwidth-tunable bioamplifier is designed in a 0.18-μm standard CMOS process, achieving a gain of 40.2 dB with 10.35-μW power consumption. The designed chip was also used to develop the proof-of-concept prototype. An operation bandwidth of 9.5 kHz, inputreferred noise of 5.2 μVrms from 6.3 Hz to 9.5 kHz and 5.54 μVrms from 250 Hz to 9.5 kHz, and a tunable cutoff-frequency from 6.3–600 Hz were demonstrated to prove our design. & 2015 Elsevier Ltd. All rights reserved.


Question: An exponential moving average model utilized in parallel speech recognition training.

In recent advancements in unsupervised feature learning and deep learning, the capability to train extensive models has proven to significantly enhance performance. This paper addresses the challenge of training deep networks with an order of magnitude more parameters, reaching billions, using a vast array of tens of thousands of CPU cores. To tackle this, we have engineered a software framework, DistBelief, which enables the harnessing of computing clusters comprising thousands of machines for the purpose of training large-scale models. Embedded within this framework, we have devised two methodologies for the distributed training of large models: (i) Downpour SGD, an asynchronous stochastic gradient descent algorithm that facilitates a multitude of model replicas, and (ii) Sandblaster, a versatile framework that supports a spectrum of distributed batch optimization techniques, notably a distributed implementation of the L-BFGS algorithm. Both Downpour SGD and Sandblaster L-BFGS have been instrumental in amplifying the scale and velocity of deep network training. Through our system, we have successfully trained a deep network that is 30 times larger than any previously documented in the literature, achieving state-of-the-art performance on ImageNet, a prominent visual object recognition task encompassing 16 million images across 21k categories. Additionally, we demonstrate that these methodologies drastically expedite the training of a comparably smaller deep network for a commercial speech recognition application. While our focus and reported outcomes are centered on the application of these techniques to the training of large neural networks, the underlying algorithms are universally applicable to any gradient-based machine learning algorithm.

The (batch) EM algorithm plays an important role in unsupervised induction, but it sometimes suffers from slow convergence. In this paper, we show that online variants (1) provide significant speedups and (2) can even find better solutions than those found by batch EM. We support these findings on four unsupervised tasks: part-of-speech tagging, document classification, word segmentation, and word alignment.

Improved automatic speech recognition (ASR) in babble noise conditions continues to pose major challenges. In this paper, we propose a new local binary pattern (LBP) based speech presence indicator (SPI) to distinguish speech and non-speech components. Babble noise is subsequently estimated using recursive averaging. In the speech enhancement system optimally-modified log-spectral amplitude (OMLSA) uses the estimated noise spectrum obtained from the LBP based recursive averaging (LRA). The performance of the LRA speech enhancement system is compared to the conventional improved minima controlled recursive averaging (IMCRA). Segmental SNR improvements and perceptual evaluations of speech quality (PESQ) scores show that LRA offers superior babble noise reduction compared to the IMCRA system. Hidden Markov model (HMM) based word recognition results show a corresponding improvement.

This paper presents preliminary experiments using the Kaldi toolkit [1] to investigate audiovisual speech recognition (AVSR) in noisy environments using deep neural networks (DNNs). In particular we use a single-speaker large vocabulary, continuous audiovisual speech corpus to compare the performance of visual-only, audio-only and audiovisual speech recognition. The models trained using the Kaldi toolkit are compared with the performance of models trained using conventional hidden Markov models (HMMs). In addition, we compare the performance of a speech recognizer both with and without visual features over nine different SNR levels of babble noise ranging from 20dB down to -20dB. The results show that the DNN outperforms conventional HMMs in all experimental conditions, especially for the lip-reading only system, which achieves a gain of 37.19% accuracy (84.67% absolute word accuracy). Moreover, the DNN provides an effective improvement of 10 and 12dB SNR respectively for both the single modal and bimodal speech recognition systems. However, integrating the visual features using simple feature fusion is only effective in SNRs at 5dB and above. Below this the degradion in accuracy of an audiovisual system is similar to the audio only recognizer.

Probabilistic Principal Component Analysis (PPCA) based low dimensional representation of speech utterances is found to be useful for speaker recognition. Although, performance of the FA (Factor Analysis)-based total variability space model is found to be superior, hyperparameter estimation procedure in PPCA is computationally efficient. In this work, recent insight on the FA-based approach as a combination of dictionary learning and encoding is explored to use its encoding procedure in the PPCA framework. With the use of an alternate encoding technique on dictionaries learnt using PPCA, performance of state-of-the-art FA-based i-vector approach is matched by using the proposed procedure. A speed up of 4x is obtained while estimating the hyperparameter at the cost of 0.51% deterioration in performance in terms of the Equal Error Rate (EER) in the worst case. Compared to the conventional PPCA model, absolute improvements of 2.1% and 2.8% are observed on two telephone conditions of NIST 2008 SRE database. Using Canonical Correlational Analysis, it is shown that the i-vectors extracted from the conventional FA model and the proposed approach are highly correlated.

In this paper, we evaluate the performance of several objective measures in terms of predicting the quality of noisy speech enhanced by noise suppression algorithms. The objective measures considered a wide range of distortions introduced by four types of real-world noise at two signal-to-noise ratio levels by four classes of speech enhancement algorithms: spectral subtractive, subspace, statistical-model based, and Wiener algorithms. The subjective quality ratings were obtained using the ITU-T P.835 methodology designed to evaluate the quality of enhanced speech along three dimensions: signal distortion, noise distortion, and overall quality. This paper reports on the evaluation of correlations of several objective measures with these three subjective rating scales. Several new composite objective measures are also proposed by combining the individual objective measures using nonparametric and parametric regression analysis techniques.

A set of simple new procedures has been developed to enable the real-time manipulation of speech parameters. The proposed method uses pitch-adaptive spectral analysis combined with a surface reconstruction method in the time± frequency region. The method also consists of a fundamental frequency (F0) extraction using instantaneous frequency calculation based on a new concept called `fundamentalness'. The proposed procedures preserve the details of time± frequency surfaces while almost perfectly removing ®ne structures due to signal periodicity. This close-to-perfect elimination of interferences and smooth F0 trajectory allow for over 600% manipulation of such speech parameters as pitch, vocal tract length, and speaking rate, while maintaining high reproductive quality. Ó 1999 Elsevier Science B.V. All rights reserved.

Accurate, real-time Automatic Speech Recognition (ASR) requires huge memory storage and computational power. The main bottleneck in state-of-the-art ASR systems is the Viterbi search on a Weighted Finite State Transducer (WFST). The WFST is a graph-based model created by composing an Acoustic Model (AM) and a Language Model (LM) offline. Offline composition simplifies the implementation of a speech recognizer as only one WFST has to be searched. However, the size of the composed WFST is huge, typically larger than a Gigabyte, resulting in a large memory footprint and memory bandwidth requirements.
 In this paper, we take a completely different approach and propose a hardware accelerator for speech recognition that composes the AM and LM graphs on-the-fly. In our ASR system, the fully-composed WFST is never generated in main memory. On the contrary, only the subset required for decoding each input speech fragment is dynamically generated from the AM and LM models. In addition to the direct benefits of this on-the-fly composition, the resulting approach is more amenable to further reduction in storage requirements through compression techniques.
 The resulting accelerator, called UNFOLD, performs the decoding in real-time using the compressed AM and LM models, and reduces the size of the datasets from more than one Gigabyte to less than 40 Megabytes, which can be very important in small form factor mobile and wearable devices.
 Besides, UNFOLD improves energy-efficiency by orders of magnitude with respect to CPUs and GPUs. Compared to a state-of-the-art Viterbi search accelerators, the proposed ASR system outperforms by providing 31x reduction in memory footprint and 28% energy savings on average.

Direct acoustics-to-word (A2W) models in the end-to-end paradigm have received increasing attention compared to conventional subword based automatic speech recognition models using phones, characters, or context-dependent hidden Markov model states. This is because A2W models recognize words from speech without any decoder, pronunciation lexicon, or externally-trained language model, making training and decoding with such models simple. Prior work has shown that A2W models require orders of magnitude more training data in order to perform comparably to conventional models. Our work also showed this accuracy gap when using the English Switchboard-Fisher data set. This paper describes a recipe to train an A2W model that closes this gap and is at-par with state-of-the-art sub-word based models. We achieve a word error rate of 8.8.8%/13.9% on the Hub5-2000 Switchboard/CallHome test sets without any decoder or language model. We find that model initialization, training data order, and regularization have the most impact on the A2W model performance. Next, we present a joint word-character A2W model that learns to first spell the word and then recognize it. This model provides a rich output to the user instead of simple word hypotheses, making it especially useful in the case of words unseen or rarely-seen during training.

Indonesia has a lot of tribe, so that there are a lot of dialects. Speech classification is difficult if the database uses speech signals from various people who have different characteristics because of gender and dialect. The different characteristics will influence frequency, intonation, amplitude, and period of the speech. It makes the system must be trained for the various templates reference of speech signal. Therefore, this study has been developed for Indonesian speech classification. This study designs the solution of the different characteristics for Indonesian speech classification. The solution combines Fuzzy on Hidden Markov Models. The new design of fuzzy Hidden Markov Models will be proposed in this study. The models will consist of Fuzzy C-Means Clustering which will be designed to substitute the vector quantization process and a new forward and backward method to handle the membership degree of data. The result shows FHMM is better than HMM and the improvement was 3.33 %.

Speech enhancement (SE) aims to reduce noise in speech signals. Most SE techniques focus on addressing audio information only. In this work, inspired by multimodal learning, which utilizes data from different modalities, and the recent success of convolutional neural networks (CNNs) in SE, we propose an audio-visual deep CNN (AVDCNN) SE model, which incorporates audio and visual streams into a unified network model. In the proposed AVDCNN SE model, audio and visual features are first processed using individual CNNs, and then, fused into a joint network to generate enhanced speech at an output layer. The AVDCNN model is trained in an end-toend manner, and parameters are jointly learned through backpropagation. We evaluate enhanced speech using five objective criteria. Results show that the AVDCNN yields notably better performance as compared to an audio-only CNN-based SE model, confirming the effectiveness of integrating visual information into the SE process.