Question: Customized soft robotic gripper sensor skins for tactile object visualization.

This article introduces a novel soft robotic glove designed to enhance hand rehabilitation for individuals suffering from functional grasp impairments, offering both assistance and at-home therapy. The glove features soft actuators made from molded elastomeric chambers reinforced with fibers, which, when pressurized with fluid, can induce precise bending, twisting, and extending motions that closely mimic the natural range of motion of the fingers. These actuators have been engineered to provide substantial force when activated and remain compliant when inactive. To manage the operation of the soft robotic glove, a custom control hardware system was developed, incorporating fluidic pressure sensors for monitoring the hydraulic actuators and a closed-loop controller to maintain optimal pressure levels. Comprehensive testing was conducted to assess the glove's capability to execute both coarse and fine motor skills required for functional grasping. Unlike conventional rehabilitation devices, this soft robotic glove boasts a portable design, with a waist belt pack and an open palm configuration, potentially enhancing user mobility and autonomy. This innovative solution represents a significant advancement in the field of assistive robotics for rehabilitation.

Conventional pneumatic actuators have been a popular choice due to their decent force/torque output. Nowadays, new generation of pneumatic actuator made out of highly compliant elastomers, which we call soft pneumatic actuators (SPA), are drawing increasing attention due to their ease of fabrication, high customizability and innately softness. However, there is no effective method presented to characterize and understand these actuators, such as to measure the force and torque output, range of motion and the speed of actuation. In this work, we present two types of SPAs: bending and rotary actuators. In addition, we have developed two measurement setups to characterize actuators of different geometries. The measured force/torque outputs of different actuators are presented and analyzed. Step responses to certain pressure input are presented and discussed. A simple model is presented to provide physical insight to the observed behavior of the soft actuators. This work provides the basis for designing customized SPAs with application-specific requirements.

Current robotics have failed to replicate the great dexterity of the animal’s motions. We believe that it is because most of the works have focused on the controller part rather than on its body structure. Indeed, the musculoskeletal system is essential to produce the animal’s motions and several researchers have attempted to exploit it [1][2][3]. However, most of them have used simple mono-articular muscles and torque control which cannot replicate the nonlinearity of the living tissues, muscles and nerves [4]. In contrast, bipedal robots with monoand bi-articular muscles for performing adaptive motions [5][6][7] have been produced. To further investigate the role of the musculoskeletal system for animal motions, we desgned a quadruped robot with monoand bi-articular muscles. We used artificial pneumatic muscles as actuators due to their high mass/power ratio and their high compliance. Although these actuators replicate several characteristics of biological muscles in terms of damping and elasticity, the length-tension relation differs from them [8][9]. In the result, the angle-torque relation of the robot with pneumatic muscles differed substantially from the one of animals. Thus, we tried to bring the angle-torque relation as close as the one of living tissues by devising the angle-moment arm relation.

Soft actuation allows robots to interact safely with humans, other machines, and their surroundings. Full exploitation of the potential of soft actuators has, however, been hindered by the lack of simple manufacturing routes to generate multimaterial parts with intricate shapes and architectures. Here, we report a 3D printing platform for the seamless digital fabrication of pneumatic silicone actuators exhibiting programmable bioinspired architectures and motions. The actuators comprise an elastomeric body whose surface is decorated with reinforcing stripes at a well-defined lead angle. Similar to the fibrous architectures found in muscular hydrostats, the lead angle can be altered to achieve elongation, contraction, or twisting motions. Using a quantitative model based on lamination theory, we establish design principles for the digital fabrication of silicone-based soft actuators whose functional response is programmed within the material's properties and architecture. Exploring such programmability enables 3D printing of a broad range of soft morphing structures. 3D-printed soft actuators have limited motion and are far from reaching the level of complexity found in biological systems. Here the authors present a multimaterial 3D printing platform for the fabrication of soft actuators displaying a wide range of motions that are programmable.

In this paper, we present preliminary results towards the development of the Virtual Dermatologist: A 3D image and tactile database for virtual examination of dermatology patients. This system, which can be installed and operated by non-dermatologists in remotes areas where access to a dermatologist is difficult, will enhance and broaden the application of tele-healthcare, and it will greatly facilitate the surveillance and consequent diagnosis of various skin diseases. Unlike other systems that monitor the progress of skin diseases using qualitative data on simple baseline (2D) photography, the proposed system will also allow for the quantitative assessment of the progress of the disease over time (e.g. thickness, size, roughness, etc). In fact, the 3D model created by the proposed system will let the dermatologist perform dermatoscopic-like examinations over specially annotated areas of the 3D model of the patient's body (i.e. higher definition areas of the 3D model). As part of its future development, the system will also allow the dermatologist to virtually touch and feel the lesion through a haptic interface. In its current form, the system can detect skin lesions smaller than 1mm, as we demonstrate in the result section.

This paper describes a novel actuation system for very compact and light-weight robotic devices, like artificial hands. The actuation concept presented here allows the implementation of powerful tendon-based driving systems, using as actuators small-size DC motors characterized by high speed and low torque. After the presentation of the basic concept of this novel actuation system, the constitutive equations of the system are given, validated by means of laboratory tests. Moreover, the problem of tracking a desired actuation force profile is taken into account, considering as load a mass-spring-damper system. A control algorithm based on a second-order sliding manifold has been firstly evaluated by means of simulations, and then validated by experiments. This output-feedback controller has been chosen to guarantee a high level of robustness against disturbances, parameter variations and uncertainties while maintaining a low computational burden.

Mobile robots with complex morphology are essential for traversing rough terrains in Urban Search & Rescue missions. Since teleoperation of the complex morphology causes high cognitive load of the operator, the morphology is controlled autonomously. The autonomous control measures the robot state and surrounding terrain which is usually only partially observable, and thus the data are often incomplete. We marginalize the control over the missing measurements and evaluate an explicit safety condition. If the safety condition is violated, tactile terrain exploration by the body-mounted robotic arm gathers the missing data.

Fiber-Reinforced Elastofluidic Enclosures (FREEs), are a subset of pneumatic soft robots with an asymmetric continuously deformable skin that are able to generate a wide range of deformations and forces, including rotation and screw motions. Though these soft robots are able to generate a variety of motions, simultaneously controlling their end effector rotation and position has remained challenging due to the lack of a simple model. This paper presents a model that establishes a relationship between the pressure, torque due to axial loading, and axial rotation to enable a model-driven open-loop control for FREEs. The modeling technique relies on describing force equilibrium between the fiber, fluid, and an elastomer model which is computed via system identification. The model is experimentally tested as these variables are changed, illustrating that it provides good agreement with the real system. To further illustrate the potential of the model, a precision open-loop control experiment of opening a rotational combination lock is presented2.

This paper presents a flexible and low-power ReadOut Circuit (ROC) with tunable sensitivity, designed to interface a wide range of commercial resistive pressure sensors for robotic applications. The ROC provides contact detection, monitoring small capacitance variations at low pressure (<;100 mbar), and encodes pressure measurement on 8 bit, evaluating resistive variations. Two all-digital circuits implement the conversion of the input resistance and capacitance-to-frequency, exploiting an on-chip ring oscillator as timing reference. A 130 nm RFCMOS prototype (with an active area of 428 × 159 μm2) has a power consumption of 27.2 μW, for VDD 1 V. Using digital control inputs, the ROC allows a wide range tuning of measurement sensitivity (6.7-46.4 mbar/LSB) and adjustable acquisition time (226.6-461.7 μs and 648-890 μs, for contact detection and pressure evaluation, respectively). The read-out time of ~1 ms is compatible with human response after touch.

This paper challenges the well-established assumption in robotics that in order to control a robot it is necessary to know its kinematic information, that is, the arrangement of links and joints, the link dimensions and the joint positions. We propose a kinematic-free robot control concept that does not require any prior kinematic knowledge. The concept is based on our hypothesis that it is possible to control a robot without explicitly measuring its joint angles, by measuring instead the effects of the actuation on its end-effector. We implement a proof-of-concept encoderless robot controller and apply it for the position control of a physical 2-DOF planar robot arm. The prototype controller is able to successfully control the robot to reach a reference position, as well as to track a continuous reference trajectory. Notably, we demonstrate how this novel controller can cope with something that traditional control approaches fail to do: adapt to drastic kinematic changes such as 100% elongation of a link, 35-degree angular offset of a joint, and even a complete overhaul of the kinematics involving the addition of new joints and links.

Current touch input technologies are best suited for small and flat applications, such as smartphones, tablets and kiosks. In general, they are too expensive to scale to large surfaces, such as walls and furniture, and cannot provide input on objects having irregular and complex geometries, such as tools and toys. We introduce Electrick, a low-cost and versatile sensing technique that enables touch input on a wide variety of objects and surfaces, whether small or large, flat or irregular. This is achieved by using electric field tomography in concert with an electrically conductive material, which can be easily and cheaply added to objects and surfaces. We show that our technique is compatible with commonplace manufacturing methods, such as spray/brush coating, vacuum forming, and casting/molding enabling a wide range of possible uses and outputs. Our technique can also bring touch interactivity to rapidly fabricated objects, including those that are laser cut or 3D printed. Through a series of studies and illustrative example uses, we show that Electrick can enable new interactive opportunities on a diverse set of objects and surfaces that were previously static.


Question: Tailored soft robotic gripper sensor skins for tactile object visualization.

This work introduces a soft robotic system capable of peristaltic movement, inspired by the muscular anatomy of earthworms. The key innovation lies in the antagonistic arrangement of NiTi coil actuators within a flexible braided mesh tube, mimicking the radial and longitudinal muscle groups found in Oligochaeta. This setup allows for sequential contraction, resulting in a peristaltic motion that propels the robot forward. A mathematical model is developed to analyze the deformation of the mesh structure under actuator contraction, elucidating the mechanics of peristaltic locomotion and its robustness. Various modes of peristaltic movement are simulated, experimentally validated, and evaluated based on their locomotion velocity. The entire robotic framework, constructed entirely from flexible materials, can absorb substantial external forces during movement, paving the way for a fully soft robotic solution when integrated with adaptable control systems and power sources. This design not only enhances the robot's adaptability to diverse environments but also demonstrates the potential for advanced soft robotics applications in exploration and manipulation tasks.

In this study, we propose integrated control of a robotic hand and arm using only proximity sensing from the fingertips. An integrated control scheme for the fingers and for the arm enables quick control of the position and posture of the arm by placing the fingertips adjacent to the surface of an object to be grasped. The arm control scheme enables adjustments based on errors in hand position and posture that would be impossible to achieve by finger motions alone, thus allowing the fingers to grasp an object in a laterally symmetric grasp. This can prevent grasp failures such as a finger pushing the object out of the hand or knocking the object over. Proposed control of the arm and hand allowed correction of position errors on the order of several centimeters. For example, an object on a workbench that is in an uncertain positional relation with the robot, with an inexpensive optical sensor such as a Kinect, which only provides coarse image data, would be sufficient for grasping an object.

Bend sensors have been developed based on conductive ink, optical fiber, and electronic textiles. Each type has advantages and disadvantages in terms of performance, ease of use, and cost. This study proposes a new and low-cost bend sensor that can measure a wide range of accumulated bend angles with large curvatures. This bend sensor utilizes a Bowden-cable, which consists of a coil sheath and an inner wire. Displacement changes of the Bowden-cable's inner wire, when the shape of the sheath changes, have been considered to be a position error in previous studies. However, this study takes advantage of this position error to detect the bend angle of the sheath. The bend angle of the sensor can be calculated from the displacement measurement of the sensing wire using a Hall-effect sensor or a potentiometer. Simulations and experiments have shown that the accumulated bend angle of the sensor is linearly related to the sensor signal, with an R-square value up to 0.9969 and a root mean square error of 2% of the full sensing range. The proposed sensor is not affected by a bend curvature of up to 80.0 m(-1), unlike previous bend sensors. The proposed sensor is expected to be useful for various applications, including motion capture devices, wearable robots, surgical devices, or generally any device that requires an affordable and low-cost bend sensor.

Handheld and wearable devices frequently engage users with simple haptic feedback, such as alerting, shaking, and pulsating. Here we explored intermanual apparent tactile motion-illusory movement between two hands-as a means to enrich such feedback. A series of psychophysical experiments determined the control space for generating smooth and consistent motion across the hands while users held the device. Experiment 1 calibrated the system and showed that vibrotactile detection thresholds decreased with increasing frequency, with similar trends for both hands. Experiment 2 measured effects of vibrotactile parameters on perceived motion. Both duration and temporal separation of stimuli, but not frequency and amplitude, affected subjective motion ratings. In Experiment 3, subjective ratings showed that stimuli with gradual onsets produced a stronger percept of motion than those with abrupt onsets. Finally, Experiment 4 determined a multimodal factor to match moving visual cues across the screen to moving tactile motion across hands. Our results showed compression of visual duration by the tactile system by a factor of approximately 1/3 at two test frequencies. The results of this research are useful for media designers and developers to generate reliable motion across the hands and integrate haptic motion with visual media.

This paper presents a flexible and low-power ReadOut Circuit (ROC) with tunable sensitivity, designed to interface a wide range of commercial resistive pressure sensors for robotic applications. The ROC provides contact detection, monitoring small capacitance variations at low pressure (<;100 mbar), and encodes pressure measurement on 8 bit, evaluating resistive variations. Two all-digital circuits implement the conversion of the input resistance and capacitance-to-frequency, exploiting an on-chip ring oscillator as timing reference. A 130 nm RFCMOS prototype (with an active area of 428 × 159 μm2) has a power consumption of 27.2 μW, for VDD 1 V. Using digital control inputs, the ROC allows a wide range tuning of measurement sensitivity (6.7-46.4 mbar/LSB) and adjustable acquisition time (226.6-461.7 μs and 648-890 μs, for contact detection and pressure evaluation, respectively). The read-out time of ~1 ms is compatible with human response after touch.

A textile pressure sensor has been designed for measuring pressure distribution on the human body. Electrodes built with conductive textiles are arranged on both sides of a compressible spacer, forming a variable capacitor. The use of textiles makes unobtrusive, comfortable, lightweight, and washable sensors possible. This simplifies the goal to integrate such sensors into clothing in the future, to be simple, and fast to mount just as getting dressed. Hysteresis induced by the spacer of the sensor has been modeled with the Preisach model to reduce the measurement error from 24% to 5% on average and the maximal error from above 50% to below 10%. Standard textiles that are not specially optimized for low hysteresis can be used for designing the sensor due to the modeling. The model may also be used for other pressure or even strain sensors to reduce their hysteresis. The modeling enhances the accuracy of the textile sensor to those of commercial, nontextile pressure sensing mats. Furthermore, we used the sensor system for the classification of sitting postures in a chair. The data of nine subjects have been classified with Naive Bayes classifier, achieving an average recognition rate of 82%. We show that the textile sensor performs similarly to a commercial, nontextile pressure sensing mat for this application.

This paper addresses the problem of simulating deformations between objects and the hand of a synthetic character during a grasping process. A numerical method based on finite element theory allows us to take into account the active forces of the fingers on the object and the reactive forces of the object on the fingers. The method improves control of synthetic human behavior in a task level animation system because it provides information about the environment of a synthetic human and so can be compared to the sense of touch. Finite element theory currently used in engineering seems one of the best approaches for modeling both elastic and plastic deformation of objects, as well as shocks with or without penetration between deformable objects. We show that intrinsic properties of the method based on composition/decomposition of elements have an impact in computer animation. We also state that the use of the same method for modeling both objects and human bodies improves the modeling both objects and human bodies improves the modeling of the contacts between them. Moreover, it allows a realistic envelope deformation of the human fingers comparable to existing methods. To show what we can expect from the method, we apply it to the grasping and pressing of a ball. Our solution to the grasping problem is based on displacement commands instead of force commands used in robotics and human behavior.

This paper challenges the well-established assumption in robotics that in order to control a robot it is necessary to know its kinematic information, that is, the arrangement of links and joints, the link dimensions and the joint positions. We propose a kinematic-free robot control concept that does not require any prior kinematic knowledge. The concept is based on our hypothesis that it is possible to control a robot without explicitly measuring its joint angles, by measuring instead the effects of the actuation on its end-effector. We implement a proof-of-concept encoderless robot controller and apply it for the position control of a physical 2-DOF planar robot arm. The prototype controller is able to successfully control the robot to reach a reference position, as well as to track a continuous reference trajectory. Notably, we demonstrate how this novel controller can cope with something that traditional control approaches fail to do: adapt to drastic kinematic changes such as 100% elongation of a link, 35-degree angular offset of a joint, and even a complete overhaul of the kinematics involving the addition of new joints and links.

WAVES, a Wearable Asymmetric Vibration Excitation System, is a novel wearable haptic device for presenting three dimensions of translation and rotation guidance cues. In contrast to traditional vibration feedback, which usually requires that users learn to interpret a binary cue, asymmetric vibrations have been shown to induce a pulling sensation in a desired direction. When attached to the fingers, a single voicecoil actuator presents a translation guidance cue and a pair of voicecoil actuators presents a rotation guidance cue. The directionality of mechanoreceptors in the skin led to our choice of the location and orientation of the actuators in order to elicit very strong sensations in certain directions. For example, users distinguished a "left" cue versus a "right" cue 94.5% of the time. When presented with one of six possible direction cues, users on average correctly identified the direction of translation cues 86.1% of the time and rotation cues 69.0% of the time.

During the last few decades, robotic grippers are developed by research community to solve grasping complexities of several objects as their primary objective. Due to the increasing demands of industries, many issues are rising and remain unsolved such as in-hand manipulation, placing object with appropriate posture. Operations like twisting, altering orientation of object, in a hand, requires significant dexterity of the gripper that must be achieved from a compact mechanical design at the first place. In this paper, a newly designed gripper is proposed whose primary goal is to solve in-hand manipulation. The gripper is derived from four identical finger modules; each module has four DOFs, consists of a five bar linkage to grasp and additional two DOFs mechanism similar to ball spline is conceived to manipulate object. Hence the easily constructible gripper is capable to grasp and manipulate plurality of object. As a preliminary inspection, an optimized platform that represents the central concept of the proposed gripper is developed, to the aim of evaluating kinematic feasibilities of manipulation of different objects.

A new method for researching haptic interaction styles is presented, based on a layered interaction model and a classification of existing devices. The method is illustrated by designing a new foot interaction device. The aim of which is to enhance non-verbal communication over a computer network. A layered protocols interaction model allows to consider all aspects of the haptic communication process: the intention to perform an action, limitations of the human body, and specifications of the communication device and the network. We demonstrate how this model can be used to derive design-guidelines by analyzing and classifying existing communication devices. By designing and evaluating a foot interaction device, we not only demonstrate that feet are suited for personal, concealed communication over a network, but also show the added value of the design-guidelines. Results of user tests provide clues for designing stimuli for foot interaction and indicate applications of foot communication devices.


Question: Hardware synthesis system generated from domain-specific languages.

This study delves into a comprehensive comparison of field-programmable gate arrays (FPGAs), graphics processing units (GPUs), and multicore processors, focusing on their performance and energy consumption for applications characterized by sliding windows. The proliferation of accelerator devices has introduced a significant challenge for application designers, who must navigate a vast design space with performance and energy metrics that vary widely across different accelerators, application domains, and specific use cases. To tackle this complexity, numerous research efforts have attempted to assess specific applications across various accelerator types. Here, we concentrate on sliding-window applications and their execution on FPGAs, GPUs, and multicores. For each device, we outline optimization techniques and identify scenarios where each accelerator excels. Our findings reveal that FPGAs can outperform GPUs and multicores by up to 11 times and 57 times, respectively, while simultaneously consuming significantly less energy, often several orders of magnitude lower. This underscores the unique advantages of FPGAs in terms of both performance and energy efficiency for sliding-window applications.

The modern enterprise software stack—a collection of applications supporting bookkeeping, analytics, planning, and forecasting for enterprise data—is in danger of collapsing under its own weight. The task of building and maintaining enterprise software is tedious and laborious; applications are cumbersome for end-users; and adapting to new computing hardware and infrastructures is difficult. We believe that much of the complexity in today’s architecture is accidental, rather than inherent. This tutorial provides an overview of the LogicBlox platform, a ambitious redesign of the enterprise software stack centered around a unified declarative programming model, based on an extended version of Datalog. 1 The Enterprise Hairball Modern enterprise applications involve an enormously complex technology stack composed of many disparate systems programmed in a hodgepodge of programming languages. We refer to this stack, depicted in Figure 1, as “the enterprise hairball.” First, there is an online transaction processing (OLTP) layer that performs bookkeeping of the core business data for an enterprise. Such data could include the current product catalog, recent sales figures, current outstanding invoices, customer account balances, and so forth. This OLTP layer typically includes a relational DBMS—programmed in a combination of a query language (SQL), a stored procedure language (like PL/SQL or TSQL), and a batch programming language like Pro*C—an application server, such as Oracle WebLogic [35], IBM WebSphere [36], or SAP NetWeaver [26]—programmed in an object-oriented language like Java, C#, or ABAP—and a web browser front-end, programmed using HTML and Javascript. In order to track the performance of the enterprise over time, a second business intelligence (BI) layer typically holds five to ten years of historical information that was originally recorded in the OLTP layer and performs read-only analyses on this information. This layer typically includes another DBMS (or, more commonly, a BI variant like Teradata [33] or IBM Netezza [25]) along with a BI application server such as Microstrategy [23], SAP BusinessObjects [5], or IBM Cognos [7], programmed using a vendor-specific declarative language. Fig. 1: Enterprise software components and technology stack example. Data is moved from the transaction layer to the BI layer via so-called extracttransform-load (ETL) tools that come with their own tool-specific programming language. Finally, in order to plan the future actions of an enterprise, there is a planning layer, which supports a class of read-write use cases for which the BI layer is unsuitable. This layer typically includes a planning application server, like Oracle Hyperion [13] or IBM Cognos TM1 [34], that are programmed using a vendor-specific declarative language or a standard language like MDX [21], and spreadsheets like Microsoft Excel that are programmed in a vendor-specific formula language (e.g. A1 = B17 D12) and optionally a scripting language like VBA. In order to enhance or automate decisions made in the planning layer, statistical predictive models are often prototyped using modeling tools like SAS, Matlab, SPSS, or R, and then rewritten for production in C++ or Java so they can be embedded in the OLTP or OLAP layers. In summary, enterprise software developed according to the hairball model must be programmed using a dozen or so different programming languages, running in almost as many system-scale components. Some of the languages are imperative (both object-oriented and not) and some are declarative (every possible flavor). Most of the languages used are vendor-specific and tied to the component in which they run (e.g. ABAP, Excel, R, OPL, etc.). Even the languages that are based on open standards are not easily ported from one component to another because of significant variations in performance or because of vendor specific extensions (e.g., the same SQL query on Oracle will perform very differently on DB2). Recent innovations in infrastructure technology for supporting much larger numbers of users (Web applications) and big data (predictive analytics), including NoSQL [28], NewSQL [27] and analytic databases, have introduced even more components into the technology stack described above, and have not helped reduce its overall complexity. This complexity makes enterprise software hard to build, hard to implement, and hard to change. Simple changes—like extending a product identifier by 3 characters or an employee identifier by 1 digit—often necessitate modifications to most of the different components in the stack, requiring thousands of days of person effort and costing many millions of dollars. An extreme example of the problems caused by this accidental complexity occurred in the lead-up to the year 2000, where the simple problem of adding two digits to the year field (the Y2K problem) cost humanity over $300 billion dollars [24]. Moreover, as a result of the time required for such changes, individuals within an enterprise often resort to ad hoc, error-prone methods to perform the calculations needed in order to make timely business decisions. For example, they often roll their own extensions using spreadsheets, where they incompletely or incorrectly implement such calculations based on copies of the data that is not kept in sync with the OLTP database and thus may no longer accurately reflect the state of their enterprise.

Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture.

Mutation Testing is an approach for assessing the quality of a test case suite by analyzing its ability in distinguishing the product under test from a set of alternative products, the so-called mutants. The mutants are generated from the product under test by applying a set of mutant operators, which produce products with slight syntactical differences. The mutant operators are usually based on typical errors that occurs during the software development and can be related to a fault model. In this paper, we propose a language — named MuDeL — for describing mutant operators aiming not only at automating the mutant generation, but also at providing precision and formality to the operator descriptions. The language was designed using concepts that come from transformational and logical programming paradigms, as well as from context-free grammar theory. The language is illustrated with some simple examples. We also describe the mudelgen system, developed to support this language.

To effectively design a computer system for the worst case power consumption scenario, system architects often use hand-crafted maximum power consuming benchmarks at the assembly language level. These stressmarks, also called power viruses, are very tedious to generate and require significant domain knowledge. In this paper, we propose SYMPO, an automatic SYstem level Max POwer virus generation framework, which maximizes the power consumption of the CPU and the memory system using genetic algorithm and an abstract workload generation framework. For a set of three ISAs, we show the efficacy of the power viruses generated using SYMPO by comparing the power consumption with that of MPrime torture test, which is widely used by industry to test system stability. Our results show that the usage of SYMPO results in the generation of power viruses that consume 14-41% more power compared to MPrime on SPARC ISA. The genetic algorithm achieved this result in about 70 to 90 generations in 11 to 15 hours when using a full system simulator. We also show that the power viruses generated in the Alpha ISA consume 9-24% more power compared to the previous approach of stressmark generation. We measure and provide the power consumption of these benchmarks on hardware by instrumenting a quad-core AMD Phenom II X4 system. The SYMPO power virus consumes more power compared to various industry grade power viruses on x86 hardware. We also provide a microarchitecture independent characterization of various industry standard power viruses.

The increasing complexity of today’s testing scenarios for complex systems demands an integrated, open, and flexible approach to support the management of the overall test process. “Classical” model-based testing approaches, where a complete and precise formal specification serves as a reference for automatic test generation, are often impractical. Reasons are, on the one hand, the absence of a suitable formal specification. As complex systems are composed of several components, either hardware or software, often pre-built and third party, it is unrealistic to assume that a formal specification exists a priori. On the other hand, a sophisticated test execution environment is needed that can handle distributed test cases. This is because the test actions and observations can take place on different subsystems of the overall system. This thesis presents a novel approach to the integrated testing of complex systems. Our approach offers a coarse grained test environment, realized in terms of a component-based test design on top of a library of elementary but intuitively understandable test case fragments. The relations between the fragments are treated orthogonally, delivering a test design and execution environment enhanced by means of light-weight formal verification methods. In this way we are able to shift the test design issues from total experts of the system and the used test tools to experts of the system’s logic only. We illustrate the practical usability of our approach by means of industrial case studies in two different application domains: Computer Telephony Integrated solutions and Web-based applications. As an enhancement of our integrated test approach we provide an algorithm for generating approximate models for complex systems a posteriori. This is done by optimizing a standard machine learning algorithm according to domain-specific structural properties, i.e. properties like prefix-closeness, input-determinism, as well as independency and symmetries of events. The resulting models can never be exact, i.e. reflect the complete and correct behaviour of the considered system. Nevertheless they can be useful in practice, to represent the cumulative knowledge of the system in a consistent description.

In this paper we discuss a software design framework that is capable of realizing network-centricity and the rising multicore technology. Instead of producing static design documents in the form of UML diagrams, we propose automatic generation of a visual simulation model, which represents the target system design. We discuss a design environment that is responsible for the generation and execution of the simulation model.

In this paper we present a polynomial time technology mapping algorithm, called Flow-Map, that optimally solves the LUT-based FPGA technology mapping problem for depth minimization for general Boolean networks. This theoretical breakthrough makes a sharp contrast with the fact that conventional technology mapping problem in library-based designs is NP-hard. A key step in Flow-Map is to compute a minimum height K-feasible cut in a network, solved by network flow computation. Our algorithm also effectively minimizes the number of LUTs by maximizing the volume of each cut and by several postprocessing operations. We tested the Flow-Map algorithm on a set of benchmarks and achieved reductions on both the network depth and the number of LUTs in mapping solutions as compared with previous algorithms.

Ontology have become a relevant representation formalism and many application domains are  considering adopting them. This attention claims for methods for reusing domain knowledge resources in the development of domain ontologies. Accordingly, in this paper we discuss a general methodology to create domain ontology for more than one object oriented language (OOP) like Java, PHP and C++. A lot of software development methods specially Web applications have presented most of these methods that are focusing on the structure of distributed systems and security, in which they are connected through networks and the internet; resulting in more valuable business and critical assets stored, searched and manipulated by World Wide Web. The aims of this study building domain ontology for OOP language classes for different OOP languages or different versions of the same language is an exciting opportunity for researchers to access the information required under the constant increase in the volume of information disseminated on the Internet. By creating Ontology domain for OOP, we can Improve methods of viewing and 1 E-mail: iabuhassan@newsoft.ps 2 E-mail: akram.othman@gmail.com Article Info: Received : October 14, 2012. Revised : November 19, 2012 Published online : December 30, 2012 76 Domain Ontology for Programming Languages organizing information, improve the way of processing, in addition to increasing the vocabulary and their relationship to terminology as well as the rules used in natural language with OOP languages. The clear identification of the properties and relations of terms is the starting point to become Ontology domain. The importance of the domain Ontology among object oriented programming languages is that through the synthesis of these relationships or Ontology an OOP can be achieved through web by any junior programmers.

Due to the breakdown of Dennardian scaling, the percentage of a silicon chip that can switch at full frequency is dropping exponentially with each process generation. This utilization wall forces designers to ensure that, at any point in time, large fractions of their chips are effectively dark or dim silicon, i.e., either idle or significantly underclocked.
 As exponentially larger fractions of a chip's transistors become dark, silicon area becomes an exponentially cheaper resource relative to power and energy consumption. This shift is driving a new class of architectural techniques that "spend" area to "buy" energy efficiency. All of these techniques seek to introduce new forms of heterogeneity into the computational stack. We envision that ultimately we will see widespread use of specialized architectures that leverage these techniques in order to attain orders-of-magnitude improvements in energy efficiency.
 However, many of these approaches also suffer from massive increases in complexity. As a result, we will need to look towards developing pervasively specialized architectures that insulate the hardware designer and the programmer from the underlying complexity of such systems. In this paper, I discuss four key approaches--the four horsemen--that have emerged as top contenders for thriving in the dark silicon age. Each class carries with its virtues deep-seated restrictions that requires a careful understanding of the underlying tradeoffs and benefits.

Robot systems must achieve high level goals while remaining reactive to contingencies and new opportunities. This typically requires robot systems to coordinate concurrent activities, monitor the environment, and deal with exceptions. We have developed a new language to support such task-level control. The language, TDL, is an extension of C++ that provides syntactic support for task decomposition, synchronization, execution monitoring, and exception handling. A compiler transforms TDL into pure C++ code that utilizes a platform-independent task management library. This paper introduces TDL, describes the task treerepresentation that underlies the language, and presents some aspects of its implementation and use in an autonomous mobile robot.


Question: Hardware synthesis from domain-specific languages for system design.

This paper delves into the characteristics and applications of the correntropy function, a localized similarity measure that has gained attention in signal processing. We explore the probabilistic and geometric implications of correntropy, highlighting its distinctiveness from second-order statistics, which are heavily reliant on the Gaussian assumption. A key finding is the strong link between correntropy and M-estimation, a robust statistical estimation method. We also discuss the relationship between correntropy and kernel methods, outlining their similarities and differences. Correntropy, due to its unique properties, offers significant advantages in non-Gaussian signal processing, particularly in environments with impulsive noise. To demonstrate its effectiveness, we provide practical examples that showcase correntropy's potential in tackling complex signal processing challenges.

The paper describes architectural enhancements to Xilinx FPGAs that provide better support for the creation of dynamically reconfigurable designs. These are augmented by a new design methodology that uses pre-routed IP cores for communication between static and dynamic modules and permits static designs to route through regions otherwise reserved for dynamic modules. A new CAD tool flow to automate the methodology is also presented. The new tools initially target the Virtex-II, Virtex-II Pro and Virtex-4 families and are derived from Xilinx's commercial CAD tools

Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture.

We present the tool Q UASY, a quantitative synthesis tool. Q UASY takes qualitative and quantitative specifications and automatic ally onstructs a system that satisfies the qualitative specification and optimizes the qu antitative specification, if such a system exists. The user can choose between a system that satisfies and optimi zes the specifications (a) under all possible environment behaviors or (b) under th most-likely environment behaviors given as a probability distribution on the po ssible input sequences. QUASY solves these two quantitative synthesis problems by reduct ion to instances of 2-player games and Markov Decision Processes (MDPs) with qua ntitative winning objectives. QUASY can also be seen as a game solver for quantitative games. Most notable, it can solve lexicographic mean-payoff games with 2 players, MDPs with meanpayoff objectives, and ergodic MDPs with mean-payoff parit y objectives.

The goal of this paper is to implement an efficient FPGA-based hardware architectures for the design of fast artificial vision systems. The proposed architecture is capable of performing classification operations of a Convolutional Neural Network (CNN) in realtime. To show the effectiveness of the architecture, some design examples such as hand posture recognition, character recognition, and face recognition are provided. Experimental results show that the proposed architecture is well suited for embedded artificial computer vision systems requiring high portability, high computational speed, and accurate classification.

Reverse Engineering (RE) has been historically considered as a powerful approach to understand electronic hardware in order to gain competitive intelligence or accomplish piracy. In recent years, it has also been looked at as a way to authenticate hardware intellectual properties in the court of law. In this paper, we propose a beneficial role of RE in post-silicon validation of integrated circuits (IC) with respect to IC functionality, reliability and integrity. Unlike traditional destructive RE approaches, we propose a fast non-destructive side-channel analysis approach that can hierarchically extract structural information from an IC through its transient current signature. Such a top-down side-channel analysis approach is capable of reliably identifying pipeline stages and functional blocks. It is also suitable to distinguish sequential elements from combinational gates. For extraction of random logic structures (e.g. control blocks and finite state machines) we combine side-channel analysis with logic testing based Boolean function extraction. The proposed approach is amenable to automation, scalable, and can be applied as part of post-silicon validation process to verify that each IC implements exclusively the functionality described in the specification and is free from malicious modification or Trojan attacks. Simulation results on a pipelined DLX processor demonstrate the effectiveness of the proposed approach.

The floating-point unit is one of the most common building block in any computing system and is used for a huge number of applications. By combining two state-of-the-art techniques of imprecise hardware, namely Gate-Level Pruning and Inexact Speculative Adder, and by introducing a novel Inexact Speculative Multiplier architecture, three different approximate FPUs and one reference IEEE-754 compliant FPU have been integrated in a 65 nm CMOS process within a low-power multi-core processor. Silicon measurements show up to 27% power, 36% area and 53 % power-area product savings compared to the IEEE-754 single-precision FPU. Accuracy loss has been evaluated with a high-dynamic-range image tone-mapping algorithm, resulting in small but non-visible errors with image PSNR value of 90 dB.

Writing documentation about software internals is rarely considered a rewarding activity. It is highly time-consuming and the resulting documentation is fragile when the software is continuously evolving in a multi-developer setting. Unfortunately, traditional programming environments poorly support the writing and maintenance of documentation. Consequences are severe as the lack of documentation on software structure negatively impacts the overall quality of the software product. We show that using a controlled natural language with a reasoner and a query engine is a viable technique for verifying the consistency and accuracy of documentation and source code. Using ACE, a state-of-the-art controlled natural language, we present positive results on the comprehensibility and the general feasibility of creating and verifying documentation. As a case study, we used automatic documentation verification to identify and fix severe flaws in the architecture of a non-trivial piece of software. Moreover, a user experiment shows that our language is faster and easier to learn and understand than other formal languages for software documentation.

To effectively design a computer system for the worst case power consumption scenario, system architects often use hand-crafted maximum power consuming benchmarks at the assembly language level. These stressmarks, also called power viruses, are very tedious to generate and require significant domain knowledge. In this paper, we propose SYMPO, an automatic SYstem level Max POwer virus generation framework, which maximizes the power consumption of the CPU and the memory system using genetic algorithm and an abstract workload generation framework. For a set of three ISAs, we show the efficacy of the power viruses generated using SYMPO by comparing the power consumption with that of MPrime torture test, which is widely used by industry to test system stability. Our results show that the usage of SYMPO results in the generation of power viruses that consume 14-41% more power compared to MPrime on SPARC ISA. The genetic algorithm achieved this result in about 70 to 90 generations in 11 to 15 hours when using a full system simulator. We also show that the power viruses generated in the Alpha ISA consume 9-24% more power compared to the previous approach of stressmark generation. We measure and provide the power consumption of these benchmarks on hardware by instrumenting a quad-core AMD Phenom II X4 system. The SYMPO power virus consumes more power compared to various industry grade power viruses on x86 hardware. We also provide a microarchitecture independent characterization of various industry standard power viruses.

General Matrix to Matrix multiplication (GEMM) is the cornerstone for a wide gamut of applications in high performance computing (HPC), scientific computing (SC) and more recently, deep learning. In this work, we present a customizable matrix multiplication framework for the Intel HARPv2 CPU+FPGA platform that includes support for both traditional single precision floating point and reduced precision workloads. Our framework supports arbitrary size GEMMs and consists of two parts: (1) a simple application programming interface (API) for easy configuration and integration into existing software and (2) a highly customizable hardware template. The API provides both compile and runtime options for controlling key aspects of the hardware template including dynamic precision switching; interleaving and block size control; and fused deep learning specific operations. The framework currently supports single precision floating point (FP32), 16, 8, 4 and 2 bit Integer and Fixed Point (INT16, INT8, INT4, INT2) and more exotic data types for deep learning workloads: INT16xTernary, INT8xTernary, BinaryxBinary.
 We compare our implementation to the latest NVIDIA Pascal GPU and evaluate the performance benefits provided by optimizations built into the hardware template. Using three neural networks (AlexNet, VGGNet and ResNet) we illustrate that reduced precision representations such as binary achieve the best performance, and that the HARPv2 enables fine-grained partitioning of computations over both the Xeon and FPGA. We observe up to 50x improvement in execution time compared to single precision floating point, and that runtime configuration options can improve the efficiency of certain layers in AlexNet up to 4x, achieving an overall 1.3x improvement over the entire network.

We propose a method of constructing concurrent programs in which the synchronization skeleton of the program ~s automatically synthesized from a high-level (branching time) Temporal Logic specification. The synchronization skeleton is an abstraction of the actual program where detail irrelevant to synchronization is suppressed. For example, in the synchronization skeleton for a solution to the critical section problem each process's critical section may be viewed as a single node since the internal structure of the critical section is unimportant. Most solutions to synchronization problems in the literature are in fact given as synchronization skeletons. Because synchronization skeletons are in general finite state, the propositional version of Temporal Logic can be used to specify their properties. Our synthesis method exploits the (bounded) finite model property for an appropriate propositional Temporal Logic which asserts that if a formula of the logic is satisfiable, it is satisfiable in a finite model (of size bounded by a function of the length of the formula). Decision procedures have been devised which, given a formula of Temporal Logic, f, will decide whether f is satisfiable or unsatisfiable. If f is satisfiable, a finite model of f is constructed, in our application, unsatisfiability of f means that the specification is inconsistent (and must be reformulated). If the formula f is satisfiable, then the specification it expresses is consistent. A model for f with a finite number of states is constructed by the decision procedure. The synchronization skeleton of a program meeting the specification can be read from this model. The finite model property ensures that any program whose synchronization properties can be expressed in propositional Temporal Logic can be realized by a system of concurrently running processes, each of which is a finite state machine. initially, the synchronization skeletons we synthesize wi]] be for concurrent programs running in a shared-memory environment and for monitors. However, we believe that it is also possible to extend these techniques to synthesize distributed programs. One such application would be the automatic synthesis of network communication protocols from propositional Temporal Logic specifications. Previous efforts toward parallel program synthesis can be found in the work of [LA78] and iRK80]. [LA78] uses a specification language that is essentially predicate


Question: Hardware synthesis system developed from domain-specific languages.

A Comparative Analysis of FPGA and GPU Architectures for Real-Time Optical Flow Processing

Field-Programmable Gate Arrays (FPGAs) have been widely recognized as a powerful alternative to conventional programmable processors for executing complex computations. They are particularly suited for applications that require high degrees of parallelism, straightforward control mechanisms, and basic arithmetic operations. However, the advent of advanced computing devices, including coarse-grain reconfigurable arrays, multi-core processors, and Graphics Processing Units (GPUs), has introduced a new dimension to the realm of high-speed real-time computing tasks. These architectures capitalize on the same features that make FPGAs effective, namely high parallelism and straightforward control flow.

Optical flow computation, a critical component in robotic vision, poses significant challenges due to its high computational demands and data rate requirements. As such, it is an ideal candidate for investigation on both FPGAs and custom computing architectures. In this study, we compare the performance of an FPGA and a GPU in implementing a tensor-based optical flow algorithm. The results reveal that both platforms deliver comparable performance, albeit with the FPGA requiring significantly more development time—approximately 12 times more than the GPU. This disparity in development time is a crucial factor to consider when choosing between FPGAs and GPUs for real-time applications.

Moreover, the paper provides additional comparative data for these two technologies across three other applications derived from MIMO digital communication system design. These examples further illustrate the relative strengths and weaknesses of FPGAs and GPUs in handling real-time computing tasks. The insights gained from this study are invaluable for researchers and engineers seeking to optimize the selection of hardware platforms for high-performance computing tasks, particularly in the domain of robotic vision and MIMO communication systems.

I ncreasingly powerful integrated circuits are making an entire range of new applications possible. Complementary metal-oxide semiconductor (CMOS) sensors, for example, have made the digital camera a commonplace consumer item. These light-sensitive chips, positioned where film would normally be, capture images as reusable digital files that users can upload to their computer, manipulate with software, and distribute electronically. Recent technological advances are enabling a new generation of smart cameras that represent a quantum leap in sophistication. While today's digital cameras capture images, smart cameras capture high-level descriptions of the scene and analyze what they see. These devices could support a wide variety of applications including human and animal detection, surveillance, motion analysis, and facial identification. Video processing has an insatiable demand for real-time performance. Fortunately, Moore's law provides an increasing pool of available computing power to apply to real-time analysis. Smart cameras leverage very large-scale integration (VLSI) to provide such analysis in a low-cost, low-power system with substantial memory. Moving well beyond pixel processing and compression, these systems run a wide range of algorithms to extract meaning from streaming video. Because they push the design space in so many dimensions, smart cameras are a leading-edge application for embedded system research. has developed a first-generation smart camera system that can detect people and analyze their movement in real time. Although there are many approaches to real-time video analysis, we chose to focus initially on human gesture recognition—identifying whether a subject is walking, standing, waving his arms, and so on. Because much work remains to be done on this problem, we sought to design an embedded system that can incorporate future algorithms as well as use those we created exclusively for this application. As Figure 1 shows, our algorithms use both low-level and high-level processing. The low-level component identifies different body parts and categorizes their movement in simple terms. The high-level component, which is application-dependent, uses this information to recognize each body part's action and the person's overall activity based on scenario parameters. The system captures images from the video input, which can be either uncompressed or compressed (MPEG and motion JPEG), and applies four different algorithms to detect and identify human body parts. Region extraction. The first algorithm transforms the pixels of an image, like that shown in Figure 2a, into an M × N bitmap and eliminates the background. It then detects the body part's skin area using a YUV …

Game developers are facing an increasing demand for new games every year. Game development tools can be of great help, but require highly specialized professionals. Also, just as any software development effort, game development has some challenges. Model-Driven Game Development (MDGD) is suggested as a means to solve some of these challenges, but with a loss in flexibility. We propose a MDGD approach that combines multiple domain-specific languages (DSLs) with design patterns to provide flexibility and allow generated code to be integrated with manual code. After experimentation, we observed that, with the approach, less experienced developers can create games faster and more easily, and the product of code generation can be customized with manually written code, providing flexibility. However, with MDGD, developers become less familiar with the code, making manual codification more difficult.

CertiCoq is a mechanically verified, optimizing compiler for Coq that bridges the gap between certified high-level programs and their translation to machine language. We outline its design as well as the main foundational and engineering challenges involved in building and certifying a compiler for Coq in Coq.

Ontology have become a relevant representation formalism and many application domains are  considering adopting them. This attention claims for methods for reusing domain knowledge resources in the development of domain ontologies. Accordingly, in this paper we discuss a general methodology to create domain ontology for more than one object oriented language (OOP) like Java, PHP and C++. A lot of software development methods specially Web applications have presented most of these methods that are focusing on the structure of distributed systems and security, in which they are connected through networks and the internet; resulting in more valuable business and critical assets stored, searched and manipulated by World Wide Web. The aims of this study building domain ontology for OOP language classes for different OOP languages or different versions of the same language is an exciting opportunity for researchers to access the information required under the constant increase in the volume of information disseminated on the Internet. By creating Ontology domain for OOP, we can Improve methods of viewing and 1 E-mail: iabuhassan@newsoft.ps 2 E-mail: akram.othman@gmail.com Article Info: Received : October 14, 2012. Revised : November 19, 2012 Published online : December 30, 2012 76 Domain Ontology for Programming Languages organizing information, improve the way of processing, in addition to increasing the vocabulary and their relationship to terminology as well as the rules used in natural language with OOP languages. The clear identification of the properties and relations of terms is the starting point to become Ontology domain. The importance of the domain Ontology among object oriented programming languages is that through the synthesis of these relationships or Ontology an OOP can be achieved through web by any junior programmers.

The LLVM Compiler Infrastructure (http://llvm.cs. uiuc.edu) is a robust system that is well suited for a wide variety of research and development work. This brief paper introduces the LLVM system and provides pointers to more extensive documentation, complementing the tutorial presented at LCPC. 1 Brief Overview and Goals The LLVM Compiler Infrastructure [2] is a language and target-independent compiler system, designed for both static and dynamic compilation. LLVM (Low Level Virtual Machine) can be used to build both traditional optimizing compilers for high performance programming languages as well as compiler-based tools such as Just-In-Time (JIT) translators, profilers, binary translators, memory sandboxing tools, static analysis tools, and others. A major goal of the LLVM development community is to provide a fast, robust, and well-documented core framework to support high-quality compilers and tools. A second major goal is to develop a broad community of contributors to ensure that the software continues to grow and be relevant, and to maintain its robustness and quality. A third goal is to provide a flexible infrastructure for new compiler development and research. 2 Key LLVM Design Features The LLVM system has three main components: the LLVM Virtual Instruction Set, a collection of reusable libraries for analysis, transformation and code generation; and tools built from these libraries. The LLVM framework is characterized by a clean, simple, and modular design, which allows new users to understand the representation, write new analyses, transformations, and tools easily. The LLVM Virtual Instruction Set is the common intermediate representation shared by all of the LLVM subsystems. It is a simple, mid-level, threeaddress code representation that is designed to be both language-independent and target-independent [1]. The instruction set provides explicit control-flow graphs, explicit dataflow information (in SSA form), and a mid-level, language R. Eigenmann et al. (Eds.): LCPC 2004, LNCS 3602, pp. 15–16, 2005. c © Springer-Verlag Berlin Heidelberg 2005 16 C. Lattner and V. Adve independent type system. The type system is rich enough to support sophisticated, language-independent compiler techniques, including pointer analysis, dependence analysis, and interprocedural dataflow analyses, and transformations based on them. Exactly the same instruction set is used both as a persistent, external representation for compiled code and as the internal representation for all mid-level compiler passes. Making this representation persistent enables all LLVM passes to be used at compile-time, link-time, load-time, run-time, and “idle-time” (between program runs). The key design features and the innovative aspects of the code representation are are described in a paper [2], and the complete instruction set is described in an online reference manual [1]. The LLVM source base mostly consists of modular and reusable libraries. These components include analyses and optimizations, native code generators, JIT compiler support, profile-guided feedback, etc. These compiler components reduce the cost and difficulty of building compilers for new platforms, new source languages, and for building new kinds of tools (debuggers, profilers, etc). The LLVM system also includes several complete tools built from these components, including an ANSI-conforming C/C++ compiler (which uses the GNU Compiler Collection (GCC) parsers). The C/C++ compiler applies a large number of module-level (compile-time) and cross-module (link-time) optimizations. Other LLVM tools include programs to manipulate the IR (e.g. convert between ASCII and binary formats, extract functions from a program, etc), a modular optimizer (which can run any LLVM optimization on an program, driven from the command line), automated compiler debugging tools, and others.

In recent years, hardware Trojans have drawn the attention of governments and industry as well as the scientific community. One of the main concerns is that integrated circuits, e.g., for military or criticalinfrastructure applications, could be maliciously manipulated during the manufacturing process, which often takes place abroad. However, since there have been no reported hardware Trojans in practice yet, little is known about how such a Trojan would look like, and how difficult it would be in practice to implement one. In this paper we propose an extremely stealthy approach for implementing hardware Trojans below the gate level, and we evaluate their impact on the security of the target device. Instead of adding additional circuitry to the target design, we insert our hardware Trojans by changing the dopant polarity of existing transistors. Since the modified circuit appears legitimate on all wiring layers (including all metal and polysilicon), our family of Trojans is resistant to most detection techniques, including fine-grain optical inspection and checking against “golden chips”. We demonstrate the effectiveness of our approach by inserting Trojans into two designs — a digital post-processing derived from Intel’s cryptographically secure RNG design used in the Ivy Bridge processors and a side-channel resistant SBox implementation — and by exploring their detectability and their effects on security.

Software-defined networking (SDN) is a new paradigm for operating and managing computer networks. SDN enables logically-centralized control over network devices through a "controller" software that operates independently from the network hardware, and can be viewed as the network operating system. Network operators can run both inhouse and third-party SDN programs (often called applications) on top of the controller, e.g., to specify routing and access control policies. SDN opens up the possibility of applying formal methods to prove the correctness of computer networks. Indeed, recently much effort has been invested in applying finite state model checking to check that SDN programs behave correctly. However, in general, scaling these methods to large networks is challenging and, moreover, they cannot guarantee the absence of errors.
 We present VeriCon, the first system for verifying that an SDN program is correct on all admissible topologies and for all possible (infinite) sequences of network events. VeriCon either confirms the correctness of the controller program on all admissible network topologies or outputs a concrete counterexample. VeriCon uses first-order logic to specify admissible network topologies and desired network-wide invariants, and then implements classical Floyd-Hoare-Dijkstra deductive verification using Z3. Our preliminary experience indicates that VeriCon is able to rapidly verify correctness, or identify bugs, for a large repertoire of simple core SDN programs. VeriCon is compositional, in the sense that it verifies the correctness of execution of any single network event w.r.t. the specified invariant, and can thus scale to handle large programs. To relieve the burden of specifying inductive invariants from the programmer, VeriCon includes a separate procedure for inferring invariants, which is shown to be effective on simple controller programs. We view VeriCon as a first step en route to practical mechanisms for verifying network-wide invariants of SDN programs.

An implementation of an out-of-order processing unit based on Tomasulo’s algorithm is formally verified using compositional model checking techniques. This demonstrates that finite-state methods can be applied to such algorithms, without recourse to higher-order proof systems. The paper introduces a novel compositional system that supports cyclic environment reasoning and multiple environment abstractions per signal. A proof of Tomasulo’s algorithm is outlined, based on refinement maps, and relying on the novel features of the compositional system. This proof is fully verified by the SMV verifier, using symmetry to reduce the number of assertions that must be verified.

Language Oriented Programming (LOP) is a paradigm that puts domain specific programming languages (DSLs) at the center of the software development process. Currently, there are three main approaches to LOP: (1) the use of internal DSLs, implemented as libraries in a given host language; (2) the use of external DSLs, implemented as interpreters or compilers in an external language; and (3) the use of language workbenches, which are integrated development environments (IDEs) for defining and using external DSLs. In this paper, we contribute: (4) a novel language-oriented approach to LOP for defining and using internal DSLs. While language workbenches adapt internal DSL features to overcome some of the limitations of external DSLs, our approach adapts language workbench features to overcome some of the limitations of internal DSLs. We introduce Cedalion, an LOP host language for internal DSLs, featuring static validation and projectional editing. To validate our approach we present a case study in which Cedalion was used by biologists in designing a DNA microarray for molecular Biology research.

to Abstract This paper discusses practical issues involved in app ing logic built-in self-test (BIST) to four large industria designs. These multi-clock designs, ranging in size fr 200K to 800K gates, pose significant challenges to log BIST methodology, flow, and tools. The paper presents process of generating a BIST-compliant core along with t logic BIST controller for at-speed testing. Comparativ data on fault grades and area overhead between autom test pattern generation (ATPG) and logic BIST a reported. The experimental results demonstrate that w automation of the proposed solutions, logic BIST c achieve test quality approaching that of ATPG with min mal area overhead and few changes to the design flow.


Question: Hardware synthesis system derived from domain-specific languages.

This study conducts a detailed performance evaluation of Field-Programmable Gate Arrays (FPGAs), Graphics Processing Units (GPUs), and Central Processing Units (CPUs) in the domain of image processing, focusing on applications that exhibit high parallelism. FPGAs have demonstrated exceptional performance, despite their relatively low clock speeds, by effectively harnessing parallelism. Modern CPUs, equipped with multi-core architectures and enhanced Single Instruction, Multiple Data (SIMD) capabilities, can also exploit parallelism, albeit requiring explicit programming for optimal performance. Similarly, GPUs, with their massive parallel processing power, offer significant performance gains in a variety of applications. However, the organization of cores in GPUs and the constraints on data transfer between core groups present challenges. Despite the availability of development tools for FPGAs, SIMD instructions on CPUs, and multi-core programming on GPUs, achieving high performance on these platforms remains complex. The paper presents a comparative analysis of the performance of FPGAs, GPUs, and CPUs across three image processing tasks: two-dimensional filtering, stereo-vision, and k-means clustering. The results elucidate the conditions under which each platform outperforms the others, providing valuable insights for hardware selection in image processing applications.

The cognitive dimensions framework is a broad-brush evaluation technique for interactive devices and for non-interactive notations. It sets out a small vocabulary of terms designed to capture the cognitively-relevant aspects of structure, and shows how they can be traded off against each other. The purpose of this paper is to propose the framework as an evaluation technique for visual programming environments. We apply it to two commercially-available dataflow languages (with further examples from other systems) and conclude that it is effective and insightful; other HCI-based evaluation techniques focus on different aspects and would make good complements. Insofar as the examples we used are representative, current VPLs are successful in achieving a good ‘closeness of match’, but designers need to consider the ‘viscosity’ (resistance to local change) and the ‘secondary notation’ (possibility of conveying extra meaning by choice of layout, colour, etc.).

Multidisciplinary dataflow computing is a powerful approach to scientific computing that has led to orders-of-magnitude performance improvements for a wide range of applications.

To effectively design a computer system for the worst case power consumption scenario, system architects often use hand-crafted maximum power consuming benchmarks at the assembly language level. These stressmarks, also called power viruses, are very tedious to generate and require significant domain knowledge. In this paper, we propose SYMPO, an automatic SYstem level Max POwer virus generation framework, which maximizes the power consumption of the CPU and the memory system using genetic algorithm and an abstract workload generation framework. For a set of three ISAs, we show the efficacy of the power viruses generated using SYMPO by comparing the power consumption with that of MPrime torture test, which is widely used by industry to test system stability. Our results show that the usage of SYMPO results in the generation of power viruses that consume 14-41% more power compared to MPrime on SPARC ISA. The genetic algorithm achieved this result in about 70 to 90 generations in 11 to 15 hours when using a full system simulator. We also show that the power viruses generated in the Alpha ISA consume 9-24% more power compared to the previous approach of stressmark generation. We measure and provide the power consumption of these benchmarks on hardware by instrumenting a quad-core AMD Phenom II X4 system. The SYMPO power virus consumes more power compared to various industry grade power viruses on x86 hardware. We also provide a microarchitecture independent characterization of various industry standard power viruses.

In this paper we discuss a software design framework that is capable of realizing network-centricity and the rising multicore technology. Instead of producing static design documents in the form of UML diagrams, we propose automatic generation of a visual simulation model, which represents the target system design. We discuss a design environment that is responsible for the generation and execution of the simulation model.

Compilers for vector or multiprocessor computers must have certain optimization features to successfully generate parallel code.

Convolutional neural networks (CNNs) have gained great success in various computer vision applications. However, state-of-the-art CNN models are computation-intensive and hence are mainly processed on high performance processors like server CPUs and GPUs. Owing to the advantages of high performance, energy efficiency and reconfigurability, Field-Programmable Gate Arrays (FPGAs) have been widely explored as CNN accelerators. In this paper, we propose parallel structures to exploit the inherent parallelism and efficient computation units to perform operations in convolutional and fully-connected layers. Further, an automatic generator is proposed to generate Verilog HDL source code automatically according to high-level hardware description language. Execution time, DSP consumption and performance are analytically modeled based on some critical design variables. We demonstrate the automatic methodology by implementing two representative CNNs (LeNet and AlexNet) and evaluate the execution time models by comparing estimated and measured values. Our results show that the proposed automatic methodology yields hardware design with good performance and saves much developing round time.

Formal synthesis is the process of generating a program satisfying a high-level formal specification. In recent times, effective formal synthesis methods have been proposed based on the use of inductive learning. We refer to this class of methods that learn programs from examples as formal inductive synthesis. In this paper, we present a theoretical framework for formal inductive synthesis. We discuss how formal inductive synthesis differs from traditional machine learning. We then describe oracle-guided inductive synthesis (OGIS), a framework that captures a family of synthesizers that operate by iteratively querying an oracle. An instance of OGIS that has had much practical impact is counterexample-guided inductive synthesis (CEGIS). We present a theoretical characterization of CEGIS for learning any program that computes a recursive language. In particular, we analyze the relative power of CEGIS variants where the types of counterexamples generated by the oracle varies. We also consider the impact of bounded versus unbounded memory available to the learning algorithm. In the special case where the universe of candidate programs is finite, we relate the speed of convergence to the notion of teaching dimension studied in machine learning theory. Altogether, the results of the paper take a first step towards a theoretical foundation for the emerging field of formal inductive synthesis.

We present the Abacus processor family and its compiler framework for the MiniC language that we have developed for teaching processor architectures. Besides typical RISC instructions, Abacus also offers instructions for vector processing and thread synchronization, but it is still small enough to be discussed completely in a class. With reasonable effort, students can therefore modify given implementations of micro-architectures and code generators to deepen their understanding of the theoretical concepts. Moreover, using benchmark examples, they can explore the quantitative aspects of their optimizations. In contrast to commercial and other educational processors, we provide many micro-architectures that are based on a pure concept only rather than on a combination of concepts, and we provide code generators which contain the core ideas of some architectures.

The IEC 611131-3, an open international standard for Programmable Logic Controllers (PLC) defines several domain specific languages for industrial and process automation. Domain specific languages have several features, programming constructs and notations which are different than general purpose languages and hence the traditional source code metrics for general purpose programming languages cannot be directly applied to domain specific languages for writing control programs in the area of industrial automation. We propose source code level metrics to measure size, vocabulary, cognitive complexity and testing complexity of a visual Programmable Logic Controller (PLC) programming language. We present metrics for Ladder Diagram (LD) programming language which is one of the five languages defined in the IEC 61131-3 standard. The proposed metric is based on factors like number of distinct operators and operands, total number of operators and operands, number of rungs, weights of different basic control structures, structure of the program and control flow. We apply Weyukur's property to validate the metrics and evaluate the number of properties satisfied by the proposed metric.

Advancements in new data analysis and visualization technologies have resulted in wide applicability of data-driven decision making. However, raw data from various sources must be wrangled into a suitable form before they are processed by the downstream data tools. People traditionally write data transformation programs to automate this process, and such work is cumbersome and tedious.
 We built a system called FOOFAH for helping the user easily synthesize a desired data transformation program. Our system minimizes the user's effort by only asking for a small illustrative example comprised of the raw input data and the target transformed output; FOOFAH then synthesizes a program that can perform the desired data transformation. This demonstration showcases how the user can apply FOOFAH to real-world data transformation tasks.


Question: A comprehensive challenge corpus for sentence comprehension via inference.

This document details the development of a substantial annotated corpus of the English language, known as the Penn Treebank, which comprises over 4.5 million words of American English. Throughout the initial three-year phase of the Penn Treebank Project (spanning from 1989 to 1992), this corpus has been meticulously annotated with part-of-speech (POS) information. Moreover, more than half of the corpus has received skeletal syntactic structure annotations. This extensive resource, created by the University of Pennsylvania's Department of Computer and Information Science, is available for scholarly use at ScholarlyCommons under the technical report number MSCIS-93-87. The collaborative effort of Mitchell P. Marcus, Beatrice Santorini, and Mary Ann Marcinkiewicz resulted in the creation of this invaluable linguistic tool. Their work has significantly contributed to the field of computational linguistics by providing a richly annotated dataset for linguistic analysis and natural language processing tasks.

**Question**: A Novel Method for Improving the Efficiency of Solar Panels

**Documents**: An investigation into the performance enhancement of dye-sensitized solar cells through the application of nanostructured titanium dioxide
This study explores the enhancement of dye-sensitized solar cell (DSSC) performance through the application of nanostructured titanium dioxide (TiO2). DSSCs are third-generation photovoltaic devices that offer several advantages over traditional silicon-based solar cells, including lower production costs, flexibility, and the potential for higher conversion efficiencies under diffuse light conditions. The use of nanostructured TiO2 as the photoanode material in DSSCs has been shown to significantly increase their power conversion efficiency. This is due to the increased surface area provided by the nanostructured TiO2, which allows for a greater number of dye molecules to be adsorbed onto the photoanode, thus enhancing light absorption and charge generation. The nanostructured TiO2 also facilitates faster electron transport and reduces electron recombination, leading to improved overall cell performance. In this study, we fabricated DSSCs using different concentrations of nanostructured TiO2 and characterized their performance under standard AM 1.5 illumination conditions. The results showed that the DSSCs with higher concentrations of nanostructured TiO2 exhibited higher power conversion efficiencies, with the optimum concentration being 40 mg/ml. This work demonstrates the potential of nanostructured TiO2 as a promising material for enhancing the performance of DSSCs and suggests avenues for further research in this area.

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We propose ClausIE, a novel, clause-based approach to open information extraction, which extracts relations and their arguments from natural language text. ClausIE fundamentally differs from previous approaches in that it separates the detection of ``useful'' pieces of information expressed in a sentence from their representation in terms of extractions. In more detail, ClausIE exploits linguistic knowledge about the grammar of the English language to first detect clauses in an input sentence and to subsequently identify the type of each clause according to the grammatical function of its constituents. Based on this information, ClausIE is able to generate high-precision extractions; the representation of these extractions can be flexibly customized to the underlying application. ClausIE is based on dependency parsing and a small set of domain-independent lexica, operates sentence by sentence without any post-processing, and requires no training data (whether labeled or unlabeled). Our experimental study on various real-world datasets suggests that ClausIE obtains higher recall and higher precision than existing approaches, both on high-quality text as well as on noisy text as found in the web.

Previous studies on causality estimation mainly aquire causal event pairs from a large corpus based on lexico-syntactic patterns and coreference relations, and estimate causality by a statistical method. However, most of the previous studies assume event pairs can be represented by a pair of single words, therefore they cannot estimate multiword causality correctly (e.g.“tired”-“give up”) . In this paper, we create a list of multiword expressions and extend an existing method. Our evaluation demonstrates that the proper treatment of multiword expression events is effective and the proposed method outperforms the state-of-the-art causality estimation model.

How do people acquire skill at comprehending what they read? That is the simple question to which we shall try to make a tentative answer. To begin, we have to acknowledge some complexities about the concept of reading comprehension and what it means to develop it.

Style transfer is the task of automatically transforming a piece of text in one particular style into another. A major barrier to progress in this field has been a lack of training and evaluation datasets, as well as benchmarks and automatic metrics. In this work, we create the largest corpus for a particular stylistic transfer (formality) and show that techniques from the machine translation community can serve as strong baselines for future work. We also discuss challenges of using automatic metrics.

In this paper we address the problem of modeling compositional meaning for phrases and sentences using distributional methods. We experiment with several possible combinations of representation and composition, exhibiting varying degrees of sophistication. Some are shallow while others operate over syntactic structure, rely on parameter learning, or require access to very large corpora. We find that shallow approaches are as good as more computationally intensive alternatives with regards to two particular tests: (1) phrase similarity and (2) paraphrase detection. The sizes of the involved training corpora and the generated vectors are not as important as the fit between the meaning representation and compositional method.

Long and complicated sentences prove to be a stumbling block for current systems relying on NL input. These systems stand to gain from methods that syntactically simplify such sentences. To simplify a sentence, we need an idea of the structure of the sentence, to identify the components to be separated out. Obviously a parser could be used to obtain the complete structure of the sentence. However, full parsing is slow and prone to failure, especially on complex sentences. In this paper, we consider two alternatives to full parsing which could be used for simpli cation. The rst approach uses a Finite State Grammar (FSG) to produce noun and verb groups while the second uses a Supertagging model to produce dependency linkages. We discuss the impact of these two input representations on the simpli cation process. 1 Reasons for Text Simpli cation Long and complicated sentences prove to be a stumbling block for current systems which rely on natural language input. These systems stand to gain from methods that preprocess such sentences so as to make them simpler. Consider, for example, the following sentence: (1) The embattled Major government survived a crucial vote on coal pits closure as its last-minute concessions curbed the extent of Tory revolt over an issue that generated unusual heat in the House of Commons and brought the miners to London streets. Such sentences are not uncommon in newswire texts. Compare this with the multi-sentence version which has been manually simpli ed: (2) The embattled Major government survived a crucial vote on coal pits closure. Its last-minute concessions curbed the extent of On leave from the National Centre for Software Technology, Gulmohar Cross Road No. 9, Juhu, Bombay 400 049, India Tory revolt over the coal-mine issue. This issue generated unusual heat in the House of Commons. It also brought the miners to

Text production is a key component of many NLP applications. In data-driven approaches, it is used for instance, to generate dialogue turns from dialogue moves [Wen et al., 2015, Wen et al., 2016, Novikova et al., 2017], to verbalise the content of Knowledge bases [Gardent et al., 2017a, Gardent et al., 2017b] or to generate natural English sentences from rich linguistic representations, such as dependency trees [Belz et al., 2011, Mille et al., 2018] or Abstract Meaning Representations [May and Priyadarshi, 2017, Konstas et al., 2017, Song et al., ]. In text-driven methods on the other hand, text production is at work in sentence compression [Knight and Marcu, 2000, Cohn and Lapata, 2008, Filippova and Strube, 2008, Pitler, 2010, Filippova et al., 2015, Toutanova et al., 2016]; sentence fusion [McKeown et al., 2010, Filippova, 2010, Thadani and McKeown, 2013]; paraphrasing [Dras, 1999, Barzilay and McKeown, 2001, Bannard and Callison-Burch, 2005, Wubben et al., 2010, Narayan et al., 2016, Dong et al., 2017, Mallinson et al., 2017]; sentence (or text) simplification [Siddharthan et al., 2004, Zhu et al., 2010, Woodsend and Lapata, 2011, Wubben et al., 2012, Narayan and Gardent, 2014, Xu et al., 2015, Narayan and Gardent, 2016, Zhang and Lapata, 2017, Narayan et al., 2017], text summarisation [Wan, 2010, Nenkova and McKeown, 2011, Woodsend and Lapata, 2010, Rush et al., 2015, Cheng and Lapata, 2016, Nallapati et al., 2016, Chen et al., 2016, Tan and Wan, 2017, See et al., 2017, Nallapati et al., 2017, Paulus et al., 2017, Yasunaga et al., 2017, Narayan et al., 2018a, Narayan et al., 2018b, Pasunuru and Bansal, 2018, Celikyilmaz et al., 2018] and end-to-end dialogue systems [Li et al., 2017]. Following the success of encoder-decoder models in modeling sequence-rewriting tasks such as machine translation [Sutskever et al., 2011, Bahdanau et al., 2014], deep learning models have successfully been applied to the various text production tasks. For instance, [Rush et al., 2015] utilize a local attention-based model for abstractive summarisation, [Shang et al., 2015] propose an encoder-decoder model for response generation, [See et al., 2017] uses a hybrid of encoder-decoder model and pointer network [Vinyals et al., 2015] for story highlight generation, [Dong et al., 2017] exploits an encoder-decoder model for question rephrasing and [Konstas et al., 2017] for AMR generation. In this tutorial, we will cover the fundamentals and the state-of-the-art research on neural models for text production. Each text production task raises a slightly different communication goal (e.g, how to take the dialogue context into account when producing a dialogue turn; how to detect and merge relevant information when summarising a text; or how to produce a well-formed text that correctly capture the information contained in some input data in the case of data-to-text generation). We will outline the constraints specific to each subtasks and examine how the existing neural models account for them.

In this paper we describe a method for simplifying sentences using Phrase Based Machine Translation, augmented with a re-ranking heuristic based on dissimilarity, and trained on a monolingual parallel corpus. We compare our system to a word-substitution baseline and two state-of-the-art systems, all trained and tested on paired sentences from the English part of Wikipedia and Simple Wikipedia. Human test subjects judge the output of the different systems. Analysing the judgements shows that by relatively careful phrase-based paraphrasing our model achieves similar simplification results to state-of-the-art systems, while generating better formed output. We also argue that text readability metrics such as the Flesch-Kincaid grade level should be used with caution when evaluating the output of simplification systems.

Supervised word sense disambiguation (WSD) systems are usually the best performing systems when evaluated on standard benchmarks. However, these systems need annotated training data to function properly. While there are some publicly available open source WSD systems, very few large annotated datasets are available to the research community. The two main goals of this paper are to extract and annotate a large number of samples and release them for public use, and also to evaluate this dataset against some word sense disambiguation and induction tasks. We show that the open source IMS WSD system trained on our dataset achieves stateof-the-art results in standard disambiguation tasks and a recent word sense induction task, outperforming several task submissions and strong baselines.

Accurate dependency recovery has recently been reported for a number of wide-coverage statistical parsers using Combinatory Categorial Grammar (CCG). However, overall figures give no indication of a parser’s performance on specific constructions, nor how suitable a parser is for specific applications. In this paper we give a detailed evaluation of a CCG parser on object extraction dependencies found in WSJ text. We also show how the parser can be used to parse questions for Question Answering. The accuracy of the original parser on questions is very poor, and we propose a novel technique for porting the parser to a new domain, by creating new labelled data at the lexical category level only. Using a supertagger to assign categories to words, trained on the new data, leads to a dramatic increase in question parsing accuracy.